公开(公告)号：US09914639B2

公开(公告)日：2018-03-13

申请号：US15074755

申请日：2016-03-18

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Enri Duqi ,  Sebastiano Conti

IPC: B81B7/00 ,  B81B3/00 ,  B81C1/00

CPC classification number: B81B7/0054 ,  B81B3/0051 ,  B81B7/0048 ,  B81B7/008 ,  B81B2201/0264 ,  B81C1/00325 ,  H01L2224/48091 ,  H01L2924/00014

Abstract: A MEMS device is provided with: a supporting base, having a bottom surface in contact with an external environment; a sensor die, which is of semiconductor material and integrates a micromechanical detection structure; a sensor frame, which is arranged around the sensor die and is mechanically coupled to a top surface of the supporting base; and a cap, which is arranged above the sensor die and is mechanically coupled to a top surface of the sensor frame, a top surface of the cap being in contact with an external environment. The sensor die is mechanically decoupled from the sensor frame.

公开(公告)号：US20180067163A1

公开(公告)日：2018-03-08

申请号：US15813000

申请日：2017-11-14

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Alberto Pagani

IPC: G01R31/3177 ,  G01R31/317 ,  G01R31/3185

CPC classification number: G01R31/3177 ,  G01R31/31713 ,  G01R31/318536 ,  G01R31/318563

Abstract: An electronic device having a functional portion and a test portion. The test portion includes a boundary scan register formed by a plurality of test cells arranged in the body according to a register sequence, where first test cells are configured to form a serial-to-parallel converter and second test cells are configured to form a parallel-to-serial converter. The test cells are each coupled to a respective data access pin of the device and to a respective input/output point of the functional part and have a first test input and a test output. The boundary scan register defines two test half-paths formed, respectively, by the first test cells and by the second test cells. The first test cells are directly coupled according to a first sub-sequence, and the second test cells are directly coupled according to a second sub-sequence.

公开(公告)号：US09911810B2

公开(公告)日：2018-03-06

申请号：US15421100

申请日：2017-01-31

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Simona Lorenti ,  Cateno Marco Camalleri ,  Mario Giuseppe Saggio ,  Ferruccio Frisina

IPC: H01L29/78 ,  H01L29/10 ,  H01L21/324 ,  H01L21/02 ,  H01L21/3065 ,  H01L27/088 ,  H01L29/06 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861 ,  H01L29/872 ,  H01L29/04

CPC classification number: H01L21/3247 ,  H01L21/02057 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/3065 ,  H01L21/324 ,  H01L27/088 ,  H01L29/045 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/73 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/8611 ,  H01L29/872

Abstract: Process for manufacturing a semiconductor power device, wherein a trench is formed in a semiconductor body having a first conductivity type; the trench is annealed for shaping purpose; and the trench is filled with semiconductor material via epitaxial growth so as to obtain a first column having a second conductivity type. The epitaxial growth is performed by supplying a gas containing silicon and a gas containing dopant ions of the second conductivity type in presence of a halogenide gas and occurs with uniform distribution of the dopant ions. The flow of the gas containing dopant ions is varied according to a linear ramp during the epitaxial growth; in particular, in the case of selective growth of the semiconductor material in the presence of a hard mask, the flow decreases; in the case of non-selective growth, in the absence of hard mask, the flow increases.

公开(公告)号：US20180053713A1

公开(公告)日：2018-02-22

申请号：US15471472

申请日：2017-03-28

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Fulvio Vittorio Fontana

IPC: H01L23/495 ,  H01L21/48

CPC classification number: H01L23/49568 ,  H01L21/4825 ,  H01L21/4832 ,  H01L21/4842 ,  H01L23/3107 ,  H01L23/4334 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49575 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2924/181 ,  H01L2924/00012

Abstract: A semiconductor device includes: a semiconductor die having first and second opposite surfaces, a die pad having the first surface of the semiconductor die attached thereon, an electrically conductive ground pad at the second surface of the semiconductor die, a device package coupled with the semiconductor die with the ground pad lying between the semiconductor die and the package, and ground wiring or tracks for the semiconductor die between the second surface of the semiconductor die and the ground pad. A further ground connection may be provided between the ground pad at the second surface of the semiconductor die and the die pad having the semiconductor die attached thereon.

公开(公告)号：US20180052132A1

公开(公告)日：2018-02-22

申请号：US15795609

申请日：2017-10-27

Applicant: STMicroelectronics S.R.L.

Inventor： Antonello Santangelo ,  Salvatore Cascino ,  Roberto Modica ,  Viviana Cerantonio ,  Maurizio Moschetti ,  Alessandro Auditore

IPC: G01N27/22 ,  G01N27/00

CPC classification number: G01N27/223 ,  G01N27/00 ,  G01N27/22 ,  G01N27/227 ,  Y10T29/43

Abstract: A sensor of volatile substances includes: a first electrode structure and a second electrode structure capacitively coupled, comb-fingered, and arranged coplanar in a plane; and a sensitive layer, of a sensitive material that is permeable to a volatile substance and has electrical permittivity depending upon a concentration of the volatile substance absorbed by the sensitive material. The sensitive layer extends from opposite sides of the plane.

公开(公告)号：US09899544B1

公开(公告)日：2018-02-20

申请号：US15449655

申请日：2017-03-03

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Massimo Cataldo Mazzillo ,  Piero Fallica ,  Salvatore Lombardo

IPC: H01L31/07 ,  H01L31/0216 ,  H01L27/144 ,  H01L31/107 ,  H01L31/02 ,  G01J1/44

CPC classification number: H01L31/02164 ,  G01J1/44 ,  G01J2001/4466 ,  H01L27/1446 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/14649 ,  H01L31/02027 ,  H01L31/107

Abstract: An array of Geiger-mode avalanche photodiodes is formed in a die and includes: an internal dielectric structure, arranged on the die; and an external dielectric region arranged on the internal dielectric structure. The external dielectric region is formed by an external material that absorbs radiation having a wavelength that falls in a stop-band with low wavelength and transmits radiation having a wavelength that falls in a pass-band with high wavelength, at least part of the pass-band including wavelengths in the infrared. The internal dielectric structure is formed by one or more internal materials that substantially transmit radiation having a wavelength that falls in the stop-band and in the pass-band and have refractive indices that fall in an interval having an amplitude of 0.4. In the stop-band and in the pass-band the external dielectric region has a refractive index with the real part that falls in the above interval.

公开(公告)号：US09899508B1

公开(公告)日：2018-02-20

申请号：US15289828

申请日：2016-10-10

Applicant: STMicroelectronics S.r.l.

Inventor： Antonino Schillaci ,  Paola Maria Ponzio ,  Alessandro Angelo Alfio Palazzo

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/265 ,  H01L29/10 ,  H01L29/08

CPC classification number: H01L29/7802 ,  H01L21/265 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/66545 ,  H01L29/66712

Abstract: Embodiments are directed to super-junction semiconductor devices having an inactive region positioned between active cells. In one embodiment, a semiconductor device is provided that includes a substrate and a drain region on the substrate. The drain region has a first conductivity type. A plurality of first columns is disposed on the drain region, with the first columns having the first conductivity type. A plurality of second columns is disposed on the drain region, with the second columns having a second conductivity type. The first and second columns are alternately arranged such that each of the second columns is positioned between respective first columns. First and second gate structures are included that overlie respective first columns, and a body region is included that has the second conductivity type. The body region abuts at least two second columns and at least one first column positioned between the at least two second columns.

公开(公告)号：US20180048239A1

公开(公告)日：2018-02-15

申请号：US15722398

申请日：2017-10-02

Applicant: STMicroelectronics S.r.l.

Inventor： Claudio Adragna ,  Giovanni Gritti

IPC: H02M3/335 ,  H02M1/32 ,  H02M1/36 ,  H02M1/08 ,  H02M1/00

CPC classification number: H02M3/33523 ,  H02M1/08 ,  H02M1/32 ,  H02M1/36 ,  H02M1/42 ,  H02M1/4258 ,  H02M2001/0009 ,  H02M2001/0058 ,  Y02B70/126 ,  Y02B70/1433 ,  Y02B70/1491

Abstract: The present disclosure is directed to a high power factor quasi resonant converter. The converter converts an AC power line input to a DC output to power a load, generally a string of LEDs. The power input is fed into a transformer being controlled by a power switch. The power switch is driven by a controller having a shaping circuit. The shaping circuit uses a current generator, switched resistor and capacitor to produce a sinusoidal reference voltage signal. The controller drives the power switch based on the voltage reference signal, resulting in a sinusoidal input current in a primary winding of the transformer, resulting in high power factor and low total harmonic distortion for the converter.

公开(公告)号：US20180045885A1

公开(公告)日：2018-02-15

申请号：US15457637

申请日：2017-03-13

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Arturo Luigi CANALI ,  Luigi VERGA ,  Luca MAGGI

IPC: G02B6/12 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC classification number: G02B6/12002 ,  G02B2006/12147 ,  H01L23/5381 ,  H01L24/09 ,  H01L25/0657 ,  H01L25/167 ,  H01L25/50 ,  H01L27/14634 ,  H01L2224/0401 ,  H01L2224/09177 ,  H01L2224/16145 ,  H01L2224/16235 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81191 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2224/92125 ,  H01L2224/92225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06534 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2924/14 ,  H01L2924/15313 ,  H01L2924/00

Abstract: A method of manufacturing semiconductor devices includes: coupling first and the second substrates by coupling a back surface of the second substrate with a front surface of the first substrate, thereby producing a step-like structure, with an uncovered portion of the front surface of the first substrate left uncovered by the second substrate coupling a first integrated circuit with the uncovered portion of the front surface of the first substrate; and coupling a second integrated circuit with the second substrate and the first integrated circuit by arranging the second integrated circuit extending bridge—like between the second substrate and the first integrated circuit.

公开(公告)号：US09893614B2

公开(公告)日：2018-02-13

申请号：US14970836

申请日：2015-12-16

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Donato Tagliavia ,  Calogero Andrea Trecarichi

IPC: H02M3/156 ,  H02M1/32 ,  H02M3/155 ,  H02M3/157 ,  H02M1/00

CPC classification number: H02M3/156 ,  H02M1/32 ,  H02M3/155 ,  H02M3/157 ,  H02M2001/0009 ,  H02M2001/325

Abstract: A method includes generating a control signal for controlling a switch element, and determining at each switching cycle alternation of an ON interval with storage of energy in the inductor element starting from an input voltage, and an OFF interval with transfer of the energy stored in an inductor element into a storage element on which an output voltage is present. The method includes when the inductor current reaches the first threshold value before the end of a first interval, determining the end of the ON interval at the end of the first interval. The method includes following detection of the ON interval having a duration equal to the first interval, the detection being indicative of a possible short-circuit condition at output, determining the OFF interval having a second duration equal to a lengthened interval longer than the first duration.