Receiver and corresponding process
    743.
    发明授权

    公开(公告)号:US09820141B2

    公开(公告)日:2017-11-14

    申请号:US15279765

    申请日:2016-09-29

    Abstract: A receiver for digital signals includes a radiofrequency stage. A feedback loop controls an amplitude of a modulated radiofrequency signal passing through the radiofrequency stage as a function of a comparison of a baseband signal with a reference value. A baseband stage includes an RC network cascaded to the radiofrequency stage and coupled to a baseband detector that generates the baseband signal. The feedback loop includes a circuit for detecting a range of variation of the comparison. The amplitude of the modulated radiofrequency signal is controlled as a function of an end value (e.g., maximum or minimum) of the detected range of variation. A switching circuit operates to selectively short circuit a resistive component of the RC network during receiver start-up.

    MICROELECTROMECHANICAL STRUCTURE WITH ENHANCED REJECTION OF ACCELERATION NOISE

    公开(公告)号:US20170322028A1

    公开(公告)日:2017-11-09

    申请号:US15654584

    申请日:2017-07-19

    CPC classification number: G01C19/5747 G01C19/5712 G01P9/02 Y10T29/49002

    Abstract: An integrated MEMS structure includes a driving assembly anchored to a substrate and actuated with a driving movement. A pair of sensing masses suspended above the substrate and coupled to the driving assembly via elastic elements is fixed in the driving movement and performs a movement along a first direction of detection, in response to an external stress. A coupling assembly couples the pair of sensing masses mechanically to couple the vibration modes. The coupling assembly is formed by a rigid element, which connects the sensing masses and has a point of constraint in an intermediate position between the sensing masses, and elastic coupling elements for coupling the rigid element to the sensing masses to present a first stiffness to a movement in phase-opposition and a second stiffness, greater than the first, to a movement in phase, of the sensing masses along the direction of detection.

    SEMICONDUCTOR DEVICE AND CORRESPONDING METHOD
    746.
    发明申请

    公开(公告)号:US20170317060A1

    公开(公告)日:2017-11-02

    申请号:US15365529

    申请日:2016-11-30

    Abstract: A semiconductor device includes: one or more semiconductor dice, a die pad supporting the semiconductor die or dice, a package molded onto the semiconductor die or dice supported by said die pad, wherein the die pad is exposed at the surface of the package, and the exposed die pad with an etched pattern therein to form at least one electrical contact land in the die pad.

    Tensile Stress Measurement Device with Attachment Plates and Related Methods

    公开(公告)号:US20170315035A1

    公开(公告)日:2017-11-02

    申请号:US15650380

    申请日:2017-07-14

    CPC classification number: G01N3/08 G01L1/005 G01L5/103 G01N3/066 H01L23/3107

    Abstract: A tensile stress measurement device is to be attached to an object to be measured. The tensile stress measurement device may include an IC having a semiconductor substrate and tensile stress detection circuitry, the semiconductor substrate having opposing first and second attachment areas. The tensile stress measurement device may include a first attachment plate coupled to the first attachment area and extending outwardly to be attached to the object to be measured, and a second attachment plate coupled to the second attachment area and extending outwardly to be attached to the object to be measured. The tensile stress detection circuitry may be configured to detect a tensile stress imparted on the first and second attachment plates when attached to the object to be measured.

    SENSE AMPLIFIER FOR MEMORY DEVICE
    749.
    发明申请

    公开(公告)号:US20170301378A1

    公开(公告)日:2017-10-19

    申请号:US15363270

    申请日:2016-11-29

    CPC classification number: G11C7/065 G11C5/14 G11C7/08 G11C8/10

    Abstract: A read-amplifier circuit includes a core with a first input and a second input that are intended to receive in a measurement phase a differential signal arising from a first bit line and from a second bit line of the memory device. The circuit also includes a memory element with two inverters coupled in a crossed manner. The first and second inputs are respectively connected to two of the power supply nodes of the inverters via two transfer capacitors. A first controllable circuit is configured to temporarily render the memory element floating during an initial phase preceding the measurement phase and during the measurement phase.

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