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    Low profile process kit
    72.
    发明授权
    Low profile process kit 有权
    低调的流程套件

    公开(公告)号：US08409355B2

    公开(公告)日：2013-04-02

    申请号：US12109187

    申请日：2008-04-24

    申请人： Muhammad M. Rasheed ,  Teruki Iwashita ,  Hiroshi Otake ,  Yuki Koga ,  Kazutoshi Maehara ,  Xinglong Chen ,  Sudhir Gondhalekar ,  Dmitry Lubomirsky

    发明人： Muhammad M. Rasheed ,  Teruki Iwashita ,  Hiroshi Otake ,  Yuki Koga ,  Kazutoshi Maehara ,  Xinglong Chen ,  Sudhir Gondhalekar ,  Dmitry Lubomirsky

    IPC分类号： C23C16/00 ,  C23F1/00 ,  H01L21/306

    CPC分类号： C23C16/4585 ,  C23C16/4581 ,  H01J37/32082 ,  H01J37/32642 ,  H01L21/68735

    摘要： Embodiments of process kits for substrate supports of semiconductor substrate process chambers are provided herein. In some embodiments, a process kit for a semiconductor process chamber may include an annular body being substantially horizontal and having an inner and an outer edge, and an upper and a lower surface; an inner lip disposed proximate the inner edge and extending vertically from the upper surface; and an outer lip disposed proximate the outer edge and on the lower surface, and having a shape conforming to a surface of the substrate support pedestal. In some embodiments, a process kit for a semiconductor process chamber my include an annular body having an inner and an outer edge, and having an upper and lower surface, the upper surface disposed at a downward angle of between about 5-65 degrees in an radially outward direction from the inner edge toward the outer edge.

    摘要翻译： 本文提供了半导体衬底处理室的衬底支撑件的工艺组件的实施例。 在一些实施例中，用于半导体处理室的处理套件可以包括基本上水平的并具有内部和外部边缘以及上部和下部表面的环形体; 靠近所述内边缘并从所述上表面垂直延伸的内唇缘; 以及设置在所述外边缘和所述下表面附近并且具有与所述基板支撑基座的表面相符的形状的外唇缘。 在一些实施例中，用于半导体处理腔室的处理套件包括具有内边缘和外边缘的环形体，并具有上表面和下表面，上表面以约5-65度的向下角度设置在 从内缘朝向外缘的径向向外方向。

    LOADLOCK BATCH OZONE CURE
    73.
    发明申请
    LOADLOCK BATCH OZONE CURE 有权

    公开(公告)号：US20120145079A1

    公开(公告)日：2012-06-14

    申请号：US13161371

    申请日：2011-06-15

    申请人： Dmitry Lubomirsky ,  Jay D. Pinson, II ,  Kirby H. Floyd ,  Adib Khan ,  Shankar Venkataraman

    发明人： Dmitry Lubomirsky ,  Jay D. Pinson, II ,  Kirby H. Floyd ,  Adib Khan ,  Shankar Venkataraman

    IPC分类号： C23C16/458

    CPC分类号： H01L21/67178 ,  H01L21/67109 ,  H01L21/6719 ,  H01L21/67757

    摘要： A substrate processing chamber for processing a plurality of wafers in batch mode. In one embodiment the chamber includes a vertically aligned housing having first and second processing areas separated by an internal divider, the first processing area positioned directly over the second processing area; a multi-zone heater operatively coupled to the housing to heat the first and second processing areas independent of each other; a wafer transport adapted to hold a plurality of wafers within the processing chamber and move vertically between the first and second processing areas; a gas distribution system adapted to introduce ozone into the second area and steam into the first processing area; and a gas exhaust system configured to exhaust gases introduced into the first and second processing areas.

    摘要翻译： 一种用于以批处理模式处理多个晶片的衬底处理室。 在一个实施例中，所述腔室包括具有由内部分隔器隔开的第一和第二处理区域的垂直排列的壳体，所述第一处理区域直接位于所述第二处理区域上方; 多区加热器，其可操作地耦合到所述壳体以彼此独立地加热所述第一处理区域和所述第二处理区域; 晶片传送器，其适于将多个晶片保持在处理室内并在第一和第二处理区域之间垂直移动; 气体分配系统，其适于将臭氧引入所述第二区域并将蒸汽引入到所述第一处理区域中; 以及排气系统，其被配置为排出引入到第一和第二处理区域中的气体。

    Multi-port pumping system for substrate processing chambers
    75.
    发明授权
    Multi-port pumping system for substrate processing chambers 有权
    用于基板处理室的多端口抽吸系统

    公开(公告)号：US07964040B2

    公开(公告)日：2011-06-21

    申请号：US12265641

    申请日：2008-11-05

    申请人： Muhammad M. Rasheed ,  Dmitry Lubomirsky ,  James Santosa

    发明人： Muhammad M. Rasheed ,  Dmitry Lubomirsky ,  James Santosa

    IPC分类号： B08B5/00

    CPC分类号： H01L21/67069 ,  C23C16/4412 ,  H01J37/32834 ,  H01J37/32862 ,  Y10S134/902 ,  Y10T137/85978 ,  Y10T137/87571

    摘要： An exhaust foreline for purging fluids from a semiconductor fabrication chamber is described. The foreline may include a first, second and third ports independently coupled to the chamber. A semiconductor fabrication system is also described that includes a substrate chamber that has a first, second and third interface port. The system may also include a multi-port foreline that has a first, second and third port, where the first foreline port is coupled to the first interface port, the second foreline port is coupled to the second interface port, and the third foreline port is coupled to the third interface port. The system may further include an exhaust vacuum coupled to the multi-port foreline.

    摘要翻译： 描述了用于从半导体制造室清洗流体的排气前沿。 前排可以包括独立地联接到室的第一，第二和第三端口。 还描述了包括具有第一，第二和第三接口端口的衬底室的半导体制造系统。 该系统还可以包括具有第一，第二和第三端口的多端口前级线，其中第一前级线路端口耦合到第一接口端口，第二前级线路端口耦合到第二接口端口，并且第三前级端口 耦合到第三接口端口。 该系统还可以包括耦合到多端口前级管线的排气真空。

    Internal balanced coil for inductively coupled high density plasma processing chamber
    77.
    发明授权
    Internal balanced coil for inductively coupled high density plasma processing chamber 有权
    用于电感耦合高密度等离子体处理室的内部平衡线圈

    公开(公告)号：US07789993B2

    公开(公告)日：2010-09-07

    申请号：US11670662

    申请日：2007-02-02

    申请人： Robert Chen ,  Canfeng Lai ,  Xinglong Chen ,  Weiyi Luo ,  Zhong Qiang Hua ,  Siqing Lu ,  Muhammad Rasheed ,  Qiwei Liang ,  Dmitry Lubomirsky ,  Ellie Y. Yieh

    发明人： Robert Chen ,  Canfeng Lai ,  Xinglong Chen ,  Weiyi Luo ,  Zhong Qiang Hua ,  Siqing Lu ,  Muhammad Rasheed ,  Qiwei Liang ,  Dmitry Lubomirsky ,  Ellie Y. Yieh

    IPC分类号： C23C16/00 ,  H01L21/306

    CPC分类号： H01J37/321

    摘要： A coil is provided for use in a semiconductor processing system to generate a plasma with a magnetic field in a chamber. The coil comprises a first coil segment, a second coil segment and an internal balance capacitor. The first coils segment has a first end and a second end. The first end of the coil segment is adapted to connect to a power source. The second coil segment has a first and second end. The second end of the first coil segment is adapted to connect to an external balance capacitor. The internal balance capacitor is connected in series between the second end of the first coil segment and the first end of the second coil segment. The internal balance capacitor and the coil segments are adapted to provide a voltage peak along the first coil segment substantially aligned with a virtual ground along the second coil segment.

    摘要翻译： 提供一种用于半导体处理系统中的线圈以在腔室中产生具有磁场的等离子体。 线圈包括第一线圈段，第二线圈段和内部平衡电容器。 第一线圈段具有第一端和第二端。 线圈段的第一端适于连接到电源。 第二线圈段具有第一和第二端。 第一线圈段的第二端适于连接到外部平衡电容器。 内部平衡电容器串联连接在第一线圈段的第二端和第二线圈段的第一端之间。 内部平衡电容器和线圈段适于沿着第一线圈段提供基本上与第二线圈段的虚拟接地对准的电压峰值。

    HIGH DENSITY PLASMA GAPFILL DEPOSITION-ETCH-DEPOSITION PROCESS USING FLUOROCARBON ETCHANT
    78.
    发明申请
    HIGH DENSITY PLASMA GAPFILL DEPOSITION-ETCH-DEPOSITION PROCESS USING FLUOROCARBON ETCHANT 失效
    使用荧光探针的高密度等离子体吸附沉积 - 沉积沉积工艺

    公开(公告)号：US20100041207A1

    公开(公告)日：2010-02-18

    申请号：US12193162

    申请日：2008-08-18

    申请人： Young S. Lee ,  Ying Rui ,  Dmitry Lubomirsky ,  Daniel J. Hoffman ,  Jang Gyoo Yang ,  Anchuan Wang

    发明人： Young S. Lee ,  Ying Rui ,  Dmitry Lubomirsky ,  Daniel J. Hoffman ,  Jang Gyoo Yang ,  Anchuan Wang

    IPC分类号： H01L21/762

    CPC分类号： H01L21/76224 ,  C23C16/045 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02304 ,  H01L21/31116 ,  H01L21/31612

    摘要： A high density plasma dep/etch/dep method of depositing a dielectric film into a gap between adjacent raised structures on a substrate disposed in a substrate processing chamber. The method deposits a first portion of the dielectric film within the gap by forming a high density plasma from a first gaseous mixture flown into the process chamber, etches the deposited first portion of the dielectric film by flowing an etchant gas comprising CxFy, where a ratio of x to y is greater than or equal to 1:2 and then deposits a second portion of the dielectric film over the first portion by forming a high density plasma from a second gaseous mixture flown into the process chamber.

    摘要翻译： 将介电膜沉积在设置在基板处理室中的基板上的相邻凸起结构之间的间隙中的高密度等离子体蚀刻/蚀刻/蚀刻方法。 该方法通过从流入处理室的第一气体混合物形成高密度等离子体，将电介质膜的第一部分沉积在间隙内，通过流过包含CxFy的蚀刻剂气体来蚀刻沉积的电介质膜的第一部分， 的x至y大于或等于1：2，然后通过从流入处理室的第二气态混合物形成高密度等离子体，将第二部分电介质膜沉积在第一部分上。

    CHAMBER COMPONENTS FOR CVD APPLICATIONS
    79.
    发明申请
    CHAMBER COMPONENTS FOR CVD APPLICATIONS 审中-公开
    用于CVD应用的CHAMBER组件

    公开(公告)号：US20100006032A1

    公开(公告)日：2010-01-14

    申请号：US12501195

    申请日：2009-07-10

    申请人： Kimberly Hinckley ,  Yizhen Zhang ,  Manuel A. Hernandez ,  Won B. Bang ,  Dmitry Lubomirsky

    发明人： Kimberly Hinckley ,  Yizhen Zhang ,  Manuel A. Hernandez ,  Won B. Bang ,  Dmitry Lubomirsky

    IPC分类号： C23C16/00

    CPC分类号： C23C16/452 ,  C23C16/4481 ,  C23C16/45512 ,  C23C16/45591

    摘要： Apparatus for use with a processing chamber are provided. In one aspect a blocker plate is provided including an annular plate having an inner portion of a first thickness and the annular plate having an aperture pattern including a center portion, a first patterned portion concentrically disposed around the center portion and comprising a first plurality of apertures having a first number of apertures, an second patterned portion concentrically disposed around the first patterned portion and comprising a second plurality of apertures having a second number of apertures greater than the first number of apertures, a perimeter portion concentrically disposed around the second patterned portion, and an outer portion comprising a raised concentric portion disposed on a perimeter of the annular plate. In another aspect, a second, third, and fourth blocker plates are provided. Additionally, a mixing apparatus and a liquid evaporating apparatus for use in a processing chamber are provided.

    摘要翻译： 提供了一种用于处理室的设备。 在一个方面，提供了阻挡板，其包括具有第一厚度的内部部分的环形板，并且环形板具有包括中心部分的孔图案，第一图案化部分同心地设置在中心部分周围，并且包括第一多个孔 具有第一数量的孔，第二图案部分同心地设置在第一图案化部分周围，并且包括第二多个孔，其具有大于第一数量孔的第二数量的孔，围绕第二图案化部分同心设置的周边部分， 以及包括设置在所述环形板的周边上的升高的同心部分的外部部分。 另一方面，提供第二，第三和第四阻滞板。 此外，提供了一种用于处理室的混合装置和液体蒸发装置。

    FLOWABLE DIELECTRIC EQUIPMENT AND PROCESSES
    80.
    发明申请
    FLOWABLE DIELECTRIC EQUIPMENT AND PROCESSES 有权
    流动电介质设备和工艺

    公开(公告)号：US20090280650A1

    公开(公告)日：2009-11-12

    申请号：US12210982

    申请日：2008-09-15

    申请人： Dmitry Lubomirsky ,  Qiwei Liang ,  Jang Gyoo Yang

    发明人： Dmitry Lubomirsky ,  Qiwei Liang ,  Jang Gyoo Yang

    IPC分类号： H01L21/31 ,  B08B6/00 ,  C23F1/02 ,  H01L21/311

    CPC分类号： B08B7/00 ,  C23C16/4405 ,  C23C16/452 ,  C23C16/45514 ,  C23C16/509 ,  H01J37/32449

    摘要： Methods of depositing and curing a dielectric material on a substrate are described. The methods may include the steps of providing a processing chamber partitioned into a first plasma region and a second plasma region, and delivering the substrate to the processing chamber, where the substrate occupies a portion of the second plasma region. The methods may further include forming a first plasma in the first plasma region, where the first plasma does not directly contact with the substrate, and depositing the dielectric material on the substrate to form a dielectric layer. One or more reactants excited by the first plasma are used in the deposition of the dielectric material. The methods may additional include curing the dielectric layer by forming a second plasma in the second plasma region, where one or more carbon-containing species is removed from the dielectric layer.

    摘要翻译： 描述了在衬底上沉积和固化电介质材料的方法。 该方法可以包括以下步骤：提供分隔成第一等离子体区域和第二等离子体区域的处理室，以及将衬底输送到处理室，其中衬底占据第二等离子体区域的一部分。 所述方法可以进一步包括在第一等离子体区域中形成第一等离子体，其中第一等离子体不直接与衬底接触，并将电介质材料沉积在衬底上以形成电介质层。 在电介质材料的沉积中使用由第一等离子体激发的一种或多种反应物。 所述方法可以包括通过在第二等离子体区域中形成第二等离子体来固化介电层，其中从电介质层去除一个或多个含碳物质。