公开(公告)号：US07413987B2

公开(公告)日：2008-08-19

申请号：US11431076

申请日：2006-05-10

申请人： Katsuhiko Hieda ,  Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Katsuhiko Tachibana ,  Soichi Yamazaki

发明人： Katsuhiko Hieda ,  Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Katsuhiko Tachibana ,  Soichi Yamazaki

IPC分类号： H02L21/302

CPC分类号： H01L21/02222 ,  H01L21/02164 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02318 ,  H01L21/02337 ,  H01L21/31111 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/31612 ,  H01L21/31683 ,  H01L21/76224 ,  H01L21/76229

摘要： There is disclosed a method of manufacturing a semiconductor device, wherein an Si3N4 film is formed as a mask member on the surface of a silicon substrate, then etched to form an STI trench. A solution of perhydrogenated silazane polymer is coated on the surface of the silicon substrate having an STI trench formed thereon to deposit a coated film (PSZ film) thereon. The PSZ film deposited on the mask member is removed, leaving part of the PSZ film inside the trench, wherein the thickness of the PSZ film is controlled to make the height thereof from the bottom of the STI trench become 600 nm or less. Thereafter, the PSZ film is heat-treated in a water vapor-containing atmosphere to convert the PSZ film into a silicon oxide film through a chemical reaction of the PSZ film. Subsequently, the silicon oxide film is heat-treated to densify the silicon oxide film.

摘要翻译： 公开了一种制造半导体器件的方法，其中在硅衬底的表面上形成Si 3 N 4 N 4膜作为掩模构件，然后蚀刻形成 一个STI沟槽。 将过氢化硅氮烷聚合物的溶液涂布在其上形成有STI沟槽的硅衬底的表面上，以在其上沉积涂膜（PSZ膜）。 去除沉积在掩模构件上的PSZ膜，使PSZ膜的一部分留在沟槽内，其中控制PSZ膜的厚度使其从STI沟槽底部的高度变为600nm以下。 然后，在含水蒸汽的气氛中对PSZ膜进行热处理，通过PSZ膜的化学反应将PSZ膜转换成氧化硅膜。 随后，对氧化硅膜进行热处理以使氧化硅膜致密化。

公开(公告)号：US20080073635A1

公开(公告)日：2008-03-27

申请号：US11858731

申请日：2007-09-20

申请人： Masahiro Kiyotoshi ,  Akihito Yamamoto ,  Yoshio Ozawa ,  Fumitaka Arai ,  Riichiro Shirota

发明人： Masahiro Kiyotoshi ,  Akihito Yamamoto ,  Yoshio Ozawa ,  Fumitaka Arai ,  Riichiro Shirota

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L27/249 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/28282 ,  H01L21/30604 ,  H01L21/31055 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/762 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/115 ,  H01L27/11568 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582 ,  H01L27/24 ,  H01L27/2409 ,  H01L27/2436 ,  H01L29/513 ,  H01L29/518 ,  H01L45/04 ,  H01L45/06 ,  H01L45/12 ,  H01L45/1226 ,  H01L45/126 ,  H01L45/141 ,  H01L45/144 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1633

摘要： A semiconductor memory includes a plurality of stripe-like active areas formed by stacking, in a direction perpendicular to a substrate, a plurality of layers extending parallel to the substrate, a first gate electrode formed on first side surfaces of the active areas, the first side surfaces being perpendicular to the substrate, a second gate electrode formed on second side surfaces of the active areas, the second side surfaces being perpendicular to the substrate. The layers are patterned in self-alignment with each other, intersections of the active areas and the first gate electrode form a plurality of memory cells, and the plurality of memory cells in an intersecting plane share the first gate electrode.

摘要翻译： 半导体存储器包括通过在垂直于衬底的方向上堆叠平行于衬底延伸的多个层而形成的多个条状有源区域，形成在有源区域的第一侧表面上的第一栅极电极，第一栅极电极 侧表面垂直于衬底，形成在有源区的第二侧表面上的第二栅电极，第二侧表面垂直于衬底。 这些层彼此自对准地构图，有源区和第一栅电极的交点形成多个存储单元，并且交叉平面中的多个存储单元共享第一栅电极。

公开(公告)号：US20080032481A1

公开(公告)日：2008-02-07

申请号：US11882554

申请日：2007-08-02

申请人： Masahiro Kiyotoshi

发明人： Masahiro Kiyotoshi

IPC分类号： H01L21/02

CPC分类号： H01L28/82 ,  H01L21/8221 ,  H01L23/5223 ,  H01L23/53238 ,  H01L23/53295 ,  H01L27/0688 ,  H01L27/0805 ,  H01L28/86 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor structure formed above the semiconductor substrate and comprising a first electrode, a second electrode provided below the first electrode, a third electrode provided below the second electrode, a first dielectric film provided between the first electrode and the second electrode, and a second dielectric film provided between the second electrode and the third electrode, an insulating film covering the capacitor structure and having a first hole reaching the first electrode, a second hole reaching the second electrode, and a third hole reaching the third electrode, a first conductive connection electrically connecting the first electrode and the third electrode and having portions buried in the first and third holes, and a second conductive connection formed separately from the first conductive connection and having a portion buried in the second hole.

摘要翻译： 公开了一种半导体器件，包括半导体衬底，形成在半导体衬底上方的电容器结构，包括第一电极，设置在第一电极下方的第二电极，设置在第二电极下方的第三电极，设置在第一电极之间的第一电介质膜 电极和第二电极，以及设置在第二电极和第三电极之间的第二电介质膜，覆盖电容器结构的绝缘膜，具有到达第一电极的第一孔，到达第二电极的第二孔和第三孔 到达第三电极，电连接第一电极和第三电极并且具有埋在第一和第三孔中的部分的第一导电连接，以及与第一导电连接分开形成并具有埋在第二孔中的部分的第二导电连接 。

公开(公告)号：US07312118B2

公开(公告)日：2007-12-25

申请号：US11360503

申请日：2006-02-24

申请人： Masahiro Kiyotoshi

发明人： Masahiro Kiyotoshi

IPC分类号： H01L21/8242

CPC分类号： H01L28/82 ,  H01L21/8221 ,  H01L23/5223 ,  H01L23/53238 ,  H01L23/53295 ,  H01L27/0688 ,  H01L27/0805 ,  H01L28/86 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed is a semiconductor device comprising a semiconductor substrate, a capacitor structure formed above the semiconductor substrate and comprising a first electrode, a second electrode provided below the first electrode, a third electrode provided below the second electrode, a first dielectric film provided between the first electrode and the second electrode, and a second dielectric film provided between the second electrode and the third electrode, an insulating film covering the capacitor structure and having a first hole reaching the first electrode, a second hole reaching the second electrode, and a third hole reaching the third electrode, a first conductive connection electrically connecting the first electrode and the third electrode and having portions buried in the first and third holes, and a second conductive connection formed separately from the first conductive connection and having a portion buried in the second hole.

摘要翻译： 公开了一种半导体器件，包括半导体衬底，形成在半导体衬底上方的电容器结构，包括第一电极，设置在第一电极下方的第二电极，设置在第二电极下方的第三电极，设置在第一电极之间的第一电介质膜 电极和第二电极，以及设置在第二电极和第三电极之间的第二电介质膜，覆盖电容器结构的绝缘膜，具有到达第一电极的第一孔，到达第二电极的第二孔和第三孔 到达第三电极，电连接第一电极和第三电极并且具有埋在第一和第三孔中的部分的第一导电连接，以及与第一导电连接分开形成并具有埋在第二孔中的部分的第二导电连接 。

公开(公告)号：US20070274814A1

公开(公告)日：2007-11-29

申请号：US11797528

申请日：2007-05-04

申请人： Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Shoko Ito ,  Makiko Katano ,  Ayako Mizuno

发明人： Atsuko Kawasaki ,  Masahiro Kiyotoshi ,  Shoko Ito ,  Makiko Katano ,  Ayako Mizuno

IPC分类号： H01L21/677

CPC分类号： H01L21/67276 ,  H01L21/67271 ,  H01L21/67727 ,  H01L21/6773

摘要： A local clean robot-transport plant includes: a plurality of manufacturing apparatuses; a plurality of closed-type transport containers; a container discrimination/selection apparatus; an apparatus group control server. Each of the plurality of closed-type transport containers stores and transports an intermediate product of manufacturing processes along a plurality of interprocess transport paths defined among the plurality of manufacturing apparatuses in accordance with a flow of the manufacturing processes. The container discrimination/selection apparatus is configured to discriminate and select the closed-type transport container of transport type 1 and the closed-type transport container of transport type 2, respectively, from among the plurality of closed-type transport containers. The apparatus group control server is configured to collectively control operation of the plurality of manufacturing apparatuses and the container discrimination/selection apparatus to move the closed-type transport container of transport type 2 to a specific interprocess transport path and to move the closed-type transport container of transport type 1 to the interprocess transport path other than the specific interprocess transport path.

摘要翻译： 本地清洁机器人运输设备包括：多个制造装置; 多个封闭式运输容器; 容器辨认/选择装置; 设备组控制服务器。 多个封闭式运输容器中的每一个根据制造过程的流程，沿着多个制造装置之间限定的多个处理间传送路径来存储和传送制造过程的中间产品。 容器识别/选择装置被配置为分别从多个封闭式运输集装箱中分别选择运输类型1的封闭式运输集装箱和运输类型2的封闭式运输集装箱。 设备组控制服务器被配置为共同地控制多个制造设备和容器识别/选择设备的操作，以将传送类型2的封闭式运输容器移动到特定的处理间传送路径，并且移动封闭式传送 1类运输集装箱到特定进程间运输路径以外的进程间运输路径。

公开(公告)号：US20070207590A1

公开(公告)日：2007-09-06

申请号：US11708059

申请日：2007-02-20

申请人： Masahiro Kiyotoshi ,  Atsuko Kawasaki

发明人： Masahiro Kiyotoshi ,  Atsuko Kawasaki

IPC分类号： H01L21/76

CPC分类号： H01L21/823481 ,  H01L21/76229 ,  H01L21/823475

摘要： According to an aspect of the invention, there is provided a manufacturing method of a semiconductor device including forming an isolation trench in a semiconductor substrate, filling an insulating film in the isolation trench, and annealing the filled insulating film in a vacuum or an inert gas atmosphere at a temperature that is not lower than 300° C. and less than 700° C.

摘要翻译： 根据本发明的一个方面，提供了一种半导体器件的制造方法，包括在半导体衬底中形成隔离沟槽，填充隔离沟槽中的绝缘膜，以及在真空或惰性气体中退火填充的绝缘膜 气温不低于300℃且小于700℃

公开(公告)号：US20070066005A1

公开(公告)日：2007-03-22

申请号：US11472282

申请日：2006-06-22

申请人： Katsuhiko Hieda ,  Masahiro Kiyotoshi

发明人： Katsuhiko Hieda ,  Masahiro Kiyotoshi

IPC分类号： H01L21/8238

CPC分类号： H01L21/02222 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/3125 ,  H01L21/316 ,  H01L21/76229

摘要： According to the present invention, there is a provided a semiconductor device fabrication method having, forming a mask material in a surface portion of a semiconductor substrate, and forming a step having a projection by using the mask material; forming a dielectric film on the semiconductor substrate so as to fill the step and planarize an entire surface; annealing the dielectric film; etching back the dielectric film such that a surface of the dielectric film is positioned between upper and lower surfaces of the mask material; and removing the mask material to expose a surface of the projection of the semiconductor substrate.

摘要翻译： 根据本发明，提供了一种半导体器件制造方法，其具有在半导体衬底的表面部分中形成掩模材料，并且通过使用掩模材料形成具有突起的台阶; 在所述半导体衬底上形成电介质膜，以填充所述台阶并使整个表面平坦化; 电介质膜退火; 蚀刻介电膜，使得电介质膜的表面位于掩模材料的上表面和下表面之间; 以及去除所述掩模材料以暴露所述半导体衬底的所述突起的表面。

公开(公告)号：US20060281336A1

公开(公告)日：2006-12-14

申请号：US11439993

申请日：2006-05-25

申请人： Osamu Arisumi ,  Masahiro Kiyotoshi

发明人： Osamu Arisumi ,  Masahiro Kiyotoshi

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/022 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/312 ,  H01L21/31612 ,  H01L21/76801 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76837

摘要： A method of manufacturing a semiconductor device, includes forming a first insulating film containing silicon oxide as a main ingredient, on an underlying region, adhering water to the first insulating film, forming a polymer solution layer containing a silicon-containing polymer on the water-adhered first insulating film, and forming a second insulating film containing silicon oxide as a main ingredient from the polymer solution layer, wherein forming the second insulating film includes forming silicon oxide by a reaction between the polymer and water adhered to the first insulating film.

公开(公告)号：US06982472B2

公开(公告)日：2006-01-03

申请号：US10654472

申请日：2003-09-04

申请人： Masahiro Kiyotoshi

发明人： Masahiro Kiyotoshi

IPC分类号： H01L29/00

CPC分类号： H01L28/40 ,  H01L23/5223 ,  H01L24/18

摘要： A semiconductor device comprises a semiconductor substrate and a capacitor provided above the semiconductor substrate, the capacitor comprises a lower electrode containing metal, a dielectric film containing tantalum oxide or niobium oxide, an upper electrode containing metal, and at least one of a lower barrier layer which is provided between the lower electrode and the dielectric film and an upper barrier layer which is provided between the upper electrode and the dielectric film, the lower barrier layer and the upper barrier layer being insulating layers which contain silicon and oxygen and containing the oxygen at least in a portion on a side contacting the dielectric film.

摘要翻译： 半导体器件包括半导体衬底和设置在半导体衬底之上的电容器，电容器包括含有金属的下电极，含有氧化钽或氧化铌的电介质膜，含有金属的上电极以及下阻挡层 其设置在下电极和电介质膜之间，上阻挡层设置在上电极和电介质膜之间，下阻挡层和上阻挡层是含有硅和氧并含有氧的绝缘层 至少在与电介质膜接触的一侧的一部分中。

公开(公告)号：US09076722B2

公开(公告)日：2015-07-07

申请号：US13547567

申请日：2012-07-12

申请人： Kiwamu Sakuma ,  Masahiro Kiyotoshi ,  Atsuhiro Kinoshita ,  Haruka Kusai

发明人： Kiwamu Sakuma ,  Masahiro Kiyotoshi ,  Atsuhiro Kinoshita ,  Haruka Kusai

IPC分类号： H01L29/76 ,  H01L29/788 ,  H01L29/66 ,  H01L29/792 ,  H01L27/24 ,  H01L21/8234 ,  H01L27/115 ,  H01L27/22 ,  H01L21/84 ,  H01L27/12 ,  H01L27/06

CPC分类号： H01L45/1233 ,  H01L21/823431 ,  H01L21/845 ,  H01L27/0688 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11578 ,  H01L27/1211 ,  H01L27/222 ,  H01L27/2454 ,  H01L27/2481 ,  H01L29/7881 ,  H01L29/792 ,  H01L45/1206 ,  H01L45/1253

摘要： According to one embodiment, a nonvolatile semiconductor memory device includes fin-type stacked layer structures. Each of the structures includes semiconductor layers stacked in a perpendicular direction. Assist gate electrodes are disposed in an in-plane direction and divided on a surface in the perpendicular direction of the structures.

摘要翻译： 根据一个实施例，非易失性半导体存储器件包括鳍式堆叠层结构。 每个结构包括沿垂直方向堆叠的半导体层。 辅助栅电极沿面内方向设置，并在结构垂直方向的一个表面上划分。