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71.
公开(公告)号:US20180239703A1
公开(公告)日:2018-08-23
申请号:US15958563
申请日:2018-04-20
发明人: Md KAMRUZZAMAN
IPC分类号: G06F12/0831 , G06F12/122 , G06F12/128 , G06F12/0806 , G06F12/0804
CPC分类号: G06F12/0833 , G06F12/0804 , G06F12/0806 , G06F12/12 , G06F12/122 , G06F12/123 , G06F12/128 , G06F2212/1016 , G06F2212/1021 , G06F2212/621
摘要: A method and apparatus for reducing write-backs to memory is disclosed herein. The method includes determining whether a read/write request entering a lower level cache is a cache line containing modified data, and responsive to determining that the read/write request is not a cache line containing modified data, manipulating age information of the cache line to reduce a number of write-backs to memory.
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公开(公告)号:US20180165195A1
公开(公告)日:2018-06-14
申请号:US15894797
申请日:2018-02-12
发明人: Aayush Gupta , James L. Hafner , Mohit Saxena
IPC分类号: G06F12/0806 , G06F12/0871
CPC分类号: G06F12/0806 , G06F12/0871 , G06F2212/621 , H04L67/1097 , H04L67/2842 , H04L67/2852
摘要: In one embodiment, a computer-implemented method includes selecting a cache block descriptor (CBD) from amongst a plurality of CBDs stored to a cache storage device to defragment based on a determination of utilization of a particular fine block descriptor (FBD) having a first size that is allocated to the selected CBD. The cache storage device includes a free pool of FBDs having various sizes that is available for use in the plurality of CBDs. Also, the particular FBD having the first size has a lowest availability in the free pool of FBDs. Other methods, systems, and computer program products are described in accordance with additional embodiments.
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公开(公告)号:US20180143937A1
公开(公告)日:2018-05-24
申请号:US15692613
申请日:2017-08-31
申请人: Intel Corporation
IPC分类号: G06F13/42 , G06F8/71 , G06F8/77 , G06F9/30 , G06F9/445 , G06F9/46 , G06F12/0806 , G06F12/0813 , G06F12/0815 , G06F12/0831 , G06F13/40 , H04L12/933
CPC分类号: G06F13/22 , G06F1/3287 , G06F8/71 , G06F8/73 , G06F8/77 , G06F9/30145 , G06F9/44505 , G06F9/466 , G06F11/1004 , G06F12/0806 , G06F12/0808 , G06F12/0813 , G06F12/0815 , G06F12/0831 , G06F12/0833 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F13/4273 , G06F13/4282 , G06F13/4286 , G06F13/4291 , G06F2212/1016 , G06F2212/2542 , G06F2212/622 , H04L9/0662 , H04L12/4641 , H04L45/74 , H04L49/15 , Y02D10/13 , Y02D10/14 , Y02D10/151 , Y02D10/40 , Y02D10/44 , Y02D30/30
摘要: Transaction data is identified and a flit is generated to include three or more slots and a floating field to be used as an extension of any one of two or more of the slots. The flit is sent over a serial data link to a device for processing, based at least in part on the three or more slots.
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74.
公开(公告)号:US09952973B2
公开(公告)日:2018-04-24
申请号:US14927410
申请日:2015-10-29
发明人: Md Kamruzzaman
IPC分类号: G06F12/00 , G06F12/0831 , G06F12/0806 , G06F12/122 , G06F12/128 , G06F12/0804 , G06F12/123 , G06F13/00 , G06F13/28 , G06F12/12
CPC分类号: G06F12/0833 , G06F12/0804 , G06F12/0806 , G06F12/12 , G06F12/122 , G06F12/123 , G06F12/128 , G06F2212/1016 , G06F2212/1021 , G06F2212/621
摘要: A method and apparatus for reducing write-backs to memory is disclosed herein. The method includes determining whether a read/write request entering a lower level cache is a cache line containing modified data, and responsive to determining that the read/write request is not a cache line containing modified data, manipulating age information of the cache line to reduce a number of write-backs to memory.
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公开(公告)号:US20180089082A1
公开(公告)日:2018-03-29
申请号:US15280650
申请日:2016-09-29
申请人: Intel Corporation
发明人: Andrzej Jakowski , Maciej Kaminski
IPC分类号: G06F12/0808 , G06F3/06 , G06F12/128 , G06F12/0806
CPC分类号: G06F3/0685 , G06F12/0246 , G06F12/0804 , G06F12/0868 , G06F12/12
摘要: In one embodiment, a request to access a first storage location of a storage device may be received, wherein the storage device comprises a data storage and a cache. The cache may be accessed to obtain data for one or more second storage locations of the storage device, wherein the data for the one or more second storage locations has not been written to the data storage, and wherein the first storage location and the one or more second storage locations are located near each other on the data storage. The data storage may then be accessed in response to the request to access the first storage location of the storage device. The data storage may also be accessed to write the data for the one or more second storage locations obtained from the cache.
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公开(公告)号:US20180004661A1
公开(公告)日:2018-01-04
申请号:US15616102
申请日:2017-06-07
申请人: FUJITSU LIMITED
发明人: Kenta UMEHARA , Toru HIKICHI , Hideaki TOMATSURI
IPC分类号: G06F12/0808 , G06F12/0806 , G06F12/0891 , G06F12/0815
摘要: An apparatus includes: a processor core to execute an instruction; a first cache to retain data used by the processor core; and a second cache to be coupled to the first cache, wherein the second cache includes a data-retaining circuit to include storage areas to retain data, an information-retaining circuit to retain management information that includes first state information for indicating a state of data retained in the data-retaining circuit, a state-determining circuit to determine, based on the management information, whether requested data that is requested with a read request from the first cache is retained in the data-retaining circuit, and an eviction-processing circuit to, where the state-determining circuit determines the requested data not to be retained in the data-retaining circuit with no enough space in the storage areas to store the requested data, evict data from the storage areas without issuing an eviction request based on the read request.
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公开(公告)号:US09830284B2
公开(公告)日:2017-11-28
申请号:US14809423
申请日:2015-07-27
申请人: Intel Corporation
IPC分类号: G06F13/20 , G06F12/0806 , G06F12/06 , G06F12/02 , G06F3/06 , G06F13/28 , G06F13/40 , G06F15/76 , G06F15/173 , G11C7/10 , G06F12/10 , G06F12/109
CPC分类号: G06F13/20 , G06F3/0622 , G06F3/0661 , G06F3/0679 , G06F12/0223 , G06F12/0284 , G06F12/06 , G06F12/0806 , G06F12/10 , G06F12/109 , G06F13/28 , G06F13/4027 , G06F15/17318 , G06F15/76 , G06F2212/1041 , G06F2212/206 , G06F2212/251 , G11C7/1033 , G11C7/1072
摘要: The disclosure includes, in general, among other aspects, an apparatus having multiple programmable units integrated within a processor. The apparatus has circuitry to map addresses in a single address space to resources within the multiple programmable units where the single address space includes addresses for different ones of the resources in different ones of the multiple programmable units and where there is a one-to-one correspondence between respective addresses in the single address space and resources within the multiple programmable units.
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公开(公告)号:US20170315914A1
公开(公告)日:2017-11-02
申请号:US15522372
申请日:2014-10-31
IPC分类号: G06F12/0806 , G06F12/0811 , G06F13/16
CPC分类号: G06F12/0806 , G06F12/0804 , G06F12/0811 , G06F12/084 , G06F13/161 , G06F13/1642 , G06F2212/1024 , G06F2212/283 , G06F2212/502 , G06F2212/621 , G11C7/00
摘要: A method to access a memory chip having memory banks includes processing read requests in a read queue, and when a write queue is filled beyond a high watermark, stopping the processing of the read requests in the read queue and draining the write queue until the write queue is under a low watermark. Draining the write queue include issuing write requests in an order based on information in the read queue. When the write queue is under the low watermark, the method includes stopping the draining of the write queue and again processing the read requests in the read queue.
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公开(公告)号:US20170308469A1
公开(公告)日:2017-10-26
申请号:US15521383
申请日:2015-02-11
申请人: ZTE Corporation
发明人: Huang LIU , Qi XU , Changjiang YANG
CPC分类号: G06F12/0806 , G06F11/0724 , G06F11/0751 , G06F11/1425 , G06F11/2028 , G06F11/2092 , G06F12/02 , H04L41/0645 , H04L43/10
摘要: A resource processing method and device for a multi-controller system are provided. The method includes that: when a controller in the multi-controller system may not sense existence of a peer controller, the controller judges whether the peer controller loads a first resource pool according to a first use tag stored in the first resource pool previously loaded by the peer controller.
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公开(公告)号:US09787739B2
公开(公告)日:2017-10-10
申请号:US14694673
申请日:2015-04-23
申请人: Sonos, Inc.
发明人: Andrej Sarkic , Danielle Storlie , Diane Roberts , Ron Kuper , Dayn Wilberding , Carl Fristrom
IPC分类号: G06F15/16 , H04L29/06 , G06F12/0806 , H04W4/20 , H04N21/436 , G06Q30/06 , G06Q50/00 , G06F17/30
CPC分类号: H04L65/60 , G06F12/0806 , G06F17/30516 , G06Q30/0601 , G06Q50/01 , H04L65/4084 , H04N21/43615 , H04W4/21
摘要: An example implementation may involve a control device displaying, on a graphical interface, a prompt for login credentials. The example implementation may also involve the control device detecting input data at the prompt indicating a login credential for a given account of a social networking service. The example implementation may further involve the control device querying the social networking service for streaming media services that are associated with the given account of the social networking service. In response to the query, the control device may receive data indicating a first streaming media service that is associated with the given account of the social networking service. The example implementation may involve registering the first streaming media service with a media playback system and populating a queue of the media playback system with one or more particular media items from the first streaming media service.
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