公开(公告)号：US08046706B2

公开(公告)日：2011-10-25

申请号：US11496455

申请日：2006-08-01

Applicant: Jong-ho Lee ,  Kwang-kee Lee ,  Un-gyo Jung ,  Glenn A. Adams

Inventor： Jong-ho Lee ,  Kwang-kee Lee ,  Un-gyo Jung ,  Glenn A. Adams

IPC: G06F3/048

CPC classification number: G09G5/14 ,  G09G2340/0407 ,  G09G2340/0464 ,  G09G2340/10 ,  G09G2340/12 ,  G09G2340/125 ,  H04N5/445 ,  H04N5/44591 ,  H04N5/45 ,  H04N21/4312 ,  H04N21/4314 ,  H04N21/4316 ,  H04N21/443 ,  H04N21/4622

Abstract: An apparatus for providing multiple screens and a method of dynamically configuring multiple screens are provided. The apparatus for providing multiple screens includes a service processing module producing at least one of logical screens and display screens for displaying a service, and an output module mapping the logical screens to arbitrary locations on the display screens and providing the display screens to a plurality of physical display devices.

Abstract translation: 提供了一种用于提供多个屏幕的装置和一种动态配置多个屏幕的方法。 用于提供多个屏幕的装置包括产生用于显示服务的逻辑屏幕和显示屏幕中的至少一个的服务处理模块，以及将逻辑屏幕映射到显示屏幕上的任意位置并将显示屏幕提供给多个屏幕的输出模块 物理显示设备。

公开(公告)号：US08037707B2

公开(公告)日：2011-10-18

申请号：US11710574

申请日：2007-02-26

Applicant: Jong Ho Lee ,  Moon Shin Kim

Inventor： Jong Ho Lee ,  Moon Shin Kim

IPC: F25D21/14

CPC classification number: F24F1/025 ,  F24F13/222 ,  F24F2013/205 ,  F24F2013/227 ,  F24F2140/30

Abstract: An air conditioner is provided. The air conditioner according to an embodiment of the present invention includes: a base pan constituting a lower appearance: and a condensed water detector detecting the amount of condensed water collected on the base pan. The air conditioner according to another embodiment of the present invention includes: a base pan constituting a lower appearance; a blower unit provided at one side of the base pan to guide a flow of air; and a motor providing a fan with a rotational power, wherein a motor support supporting the motor is further installed on the base pan.

Abstract translation: 提供空调。 根据本发明实施例的空调器包括：底盘，其形状较低;以及冷凝水检测器，其检测在底盘上收集的冷凝水的量。 根据本发明的另一实施例的空调器包括：构成较低外观的底盘; 鼓风机单元，设置在底盘的一侧以引导空气流; 以及提供具有旋转动力的风扇的电动机，其中支撑电动机的电动机支架进一步安装在底盘上。

公开(公告)号：US08035157B2

公开(公告)日：2011-10-11

申请号：US12312717

申请日：2007-11-19

Applicant: Jong-Ho Lee

Inventor： Jong-Ho Lee

IPC: H01L29/792

CPC classification number: H01L29/42332 ,  H01L27/115 ,  H01L27/11519 ,  H01L29/42348 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7854 ,  H01L29/7881 ,  H01L29/7887 ,  H01L29/792 ,  H01L29/7923

Abstract: The present invention provides a flash memory device having a high degree of integration and high performance. The flash memory device has a double/triple gate structure where a channel is formed in a wall-shaped body. The flash memory device has no source/drain regions. In addition, although the flash memory device has the source/drain regions, the source/drain region are formed not to be overlapped with a control electrode. Accordingly, an inversion layer is induced by a fringing field generated from the control electrode, so that cell devices can be electrically connected to each other. The flash memory device includes a charge storage node for storing charges formed under the control electrode, so that miniaturization characteristics of cell device can be improved. According to the present invention, there is proposed a new device capable of improving the miniaturization characteristics of a MOS-based flash memory device and increasing memory capacity.

Abstract translation: 本发明提供一种具有高集成度和高​​性能的闪速存储器件。 闪存装置具有双/三栅结构，其中通道形成在壁形体中。 闪存器件没有源极/漏极区域。 另外，尽管闪存器件具有源极/漏极区域，但是源极/漏极区域形成为不与控制电极重叠。 因此，通过从控制电极产生的边缘场引起反转层，使得电池器件可以彼此电连接。 闪速存储装置包括用于存储形成在控制电极下面的电荷的电荷存储节点，从而可以提高电池装置的小型化特性。 根据本发明，提出了能够提高基于MOS的闪速存储器件的小型化特性并提高存储容量的新器件。

公开(公告)号：US20110210351A1

公开(公告)日：2011-09-01

申请号：US13034136

申请日：2011-02-24

Applicant: Je Won KIM ,  Tae Sung JANG ,  Jong Gun WOO ,  Jong Ho LEE

Inventor： Je Won KIM ,  Tae Sung JANG ,  Jong Gun WOO ,  Jong Ho LEE

IPC: H01L33/08

CPC classification number: H01L33/08 ,  H01L27/156 ,  H01L33/50 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor light emitting device includes: a substrate; a plurality of light emitting cells arranged on the substrate, each of the light emitting cells including a first-conductivity-type semiconductor layer, a second-conductivity-type semiconductor layer, and an active layer disposed therebetween to emit blue light; an interconnection structure electrically connecting at least one of the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer of the light emitting cell to at least one of the first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer of another light emitting cell; and a light conversion part formed in at least a portion of a light emitting region defined by the plurality of light emitting cells, the light conversion part including at least one of a red light conversion part having a red light conversion material and a green light conversion part having a green light conversion material.

Abstract translation: 一种半导体发光器件，包括：衬底; 布置在基板上的多个发光单元，每个发光单元包括第一导电型半导体层，第二导电型半导体层和设置在其间的有源层，以发射蓝色光; 互连结构，将所述发光单元的所述第一导电型半导体层和所述第二导电型半导体层中的至少一个电连接到所述第一导电型半导体层和所述第二导电型半导体层中的至少一个， 型半导体层; 以及形成在由所述多个发光单元限定的发光区域的至少一部分中的光转换部分，所述光转换部分包括具有红光转换材料的红光转换部分和绿光转换部分中的至少一个 具有绿光转换材料的部分。

公开(公告)号：US20110193228A1

公开(公告)日：2011-08-11

申请号：US12916677

申请日：2010-11-01

Applicant: Hae-jung Yu ,  Hyeong-seob Kim ,  Jong-ho Lee ,  Jin-woo Park

Inventor： Hae-jung Yu ,  Hyeong-seob Kim ,  Jong-ho Lee ,  Jin-woo Park

IPC: H01L23/50

CPC classification number: H01L23/13 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/562 ,  H01L2224/16225 ,  H01L2224/73203 ,  H01L2924/3511 ,  H05K1/0271 ,  H05K3/1225 ,  H05K3/284 ,  H05K2201/09063 ,  H05K2203/1316

Abstract: A molded underfill flip chip package may include a printed circuit board, a semiconductor chip mounted on the printed circuit board, and a sealant. The printed circuit board has at least one resin passage hole passing through the printed circuit board and at least one resin channel on a bottom surface of the printed circuit board, the at least one resin channel extending from the at least one resin passage hole passing through the printed circuit board. The sealant seals a top surface of the printed circuit board, the semiconductor chip, the at least one resin passage hole, and the at least one resin channel.

Abstract translation: 模制底部填充倒装芯片封装可以包括印刷电路板，安装在印刷电路板上的半导体芯片和密封剂。 印刷电路板具有穿过印刷电路板的至少一个树脂通孔和印刷电路板的底表面上的至少一个树脂通道，所述至少一个树脂通道从至少一个树脂通道孔延伸通过 印刷电路板。 密封剂密封印刷电路板，半导体芯片，至少一个树脂通孔和至少一个树脂通道的顶表面。

公开(公告)号：US20110193181A1

公开(公告)日：2011-08-11

申请号：US13089603

申请日：2011-04-19

Applicant: Hyung-suk JUNG ,  Jong-ho LEE ,  Sung-kee HAN ,  Ha-jin LIM

Inventor： Hyung-suk JUNG ,  Jong-ho LEE ,  Sung-kee HAN ,  Ha-jin LIM

IPC: H01L29/772

CPC classification number: H01L21/02178 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/02362 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3142 ,  H01L21/31645 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517

Abstract: A semiconductor includes a channel region in a semiconductor substrate, a gate dielectric film on the channel region, and a gate on the gate dielectric film. The gate includes a doped metal nitride film, formed from a nitride of a first metal and doped with a second metal which is different from the first metal, and a conductive polysilicon layer formed on the doped metal nitride film. The gate may further include a metal containing capping layer interposed between the doped metal nitride film and the conductive polysilicon layer.

Abstract translation: 半导体包括半导体衬底中的沟道区域，沟道区上的栅极电介质膜和栅极电介质膜上的栅极。 栅极包括由第一金属的氮化物形成并掺杂有与第一金属不同的第二金属的掺杂金属氮化物膜和形成在掺杂金属氮化物膜上的导电多晶硅层。 栅极还可以包括插入在掺杂的金属氮化物膜和导电多晶硅层之间的含金属的覆盖层。

公开(公告)号：US20110121396A1

公开(公告)日：2011-05-26

申请号：US13010360

申请日：2011-01-20

Applicant: Jong-Ho LEE

Inventor： Jong-Ho LEE

IPC: H01L29/78

CPC classification number: G11C11/403 ,  H01L27/10876 ,  H01L29/42392 ,  H01L29/7827 ,  H01L29/7831 ,  H01L29/78642 ,  H01L29/78648

Abstract: A pillar-type field effect transistor having low leakage current is provided. The pillar-type field effect transistor includes: a semiconductor body, source and drain formed in a semiconductor pillar; a gate insulating layer formed on a surface of the semiconductor body; a gate electrode formed on a surface of the gate insulating layer. The gate electrode includes a first gate electrode and a second gate electrode being electrically connected with the first gate electrode. The first gate electrode has a work function higher than that of the second gate electrode. Accordingly, the gate induced drain leakage (GIDL) can be reduced, so that an off-state leakage current can be greatly reduced.

Abstract translation: 提供了具有低泄漏电流的柱型场效应晶体管。 柱型场效应晶体管包括：半导体本体，形成在半导体柱中的源极和漏极; 形成在所述半导体主体的表面上的栅极绝缘层; 形成在栅极绝缘层的表面上的栅电极。 栅电极包括与第一栅电极电连接的第一栅电极和第二栅电极。 第一栅电极具有比第二栅电极高的功函数。 因此，可以减小栅极感应漏极泄漏（GIDL），从而可以大大降低截止状态的漏电流。

公开(公告)号：US20110079897A1

公开(公告)日：2011-04-07

申请号：US12894540

申请日：2010-09-30

Applicant: Jin-Woo PARK ,  Eun-Chul Ahn ,  Dong-Kil Shin ,  Sun-Won Kang ,  Jong-Ho Lee

Inventor： Jin-Woo PARK ,  Eun-Chul Ahn ,  Dong-Kil Shin ,  Sun-Won Kang ,  Jong-Ho Lee

IPC: H01L23/48

CPC classification number: H01L24/06 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L2224/02125 ,  H01L2224/03464 ,  H01L2224/0401 ,  H01L2224/05011 ,  H01L2224/05018 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/05655 ,  H01L2224/06051 ,  H01L2224/13018 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13116 ,  H01L2224/1403 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2924/00012

Abstract: In an integrated circuit (IC) chip and a flip chip package having the same, no wiring line is provided and the first electrode pad does not make contact with the wiring line in a pad area of the IC chip. Thus, the first bump structure makes contact with the first electrode regardless of the wiring line in the pad area. The second electrode pad makes contact with the wiring line in a pseudo pad area of the IC chip. Thus, the second bump structure in the pseudo pad area makes contact with an upper surface of the second electrode at a contact point(s) spaced apart from the wiring line under the second electrode.

Abstract translation: 在集成电路（IC）芯片和具有其的倒装芯片封装中，不设置布线，并且第一电极焊盘不与IC芯片的焊盘区域中的布线接触。 因此，与焊盘区域中的布线无关，第一凸块结构与第一电极接触。 第二电极焊盘与IC芯片的伪焊盘区域中的布线接触。 因此，伪焊盘区域中的第二凸块结构在与第二电极下方的布线间隔开的接触点处与第二电极的上表面接触。

公开(公告)号：US07906814B2

公开(公告)日：2011-03-15

申请号：US12310532

申请日：2007-08-27

Applicant: Jong Ho Lee

Inventor： Jong Ho Lee

IPC: H01L29/76

CPC classification number: H01L29/7851 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/7853 ,  H01L29/7854

Abstract: Provided is a fin field effect transistor (FinFET) having low leakage current and a method of manufacturing the same. The FinFET includes: a bulk silicon substrate; a fence-shaped body formed by patterning the substrate; an insulating layer formed on a surface of the substrate to a first height of the fence-shaped body; a gate insulating layer formed at side walls and an upper surface of the fence-shaped body at which the insulating layer is not formed; a gate electrode formed on the gate insulating layer; source/drain formed at regions of the fence-shaped body where the gate electrode is not formed. The gate electrode includes first and second gate electrodes which are in contact with each other and have different work functions. Particularly, the second gate electrode having a low work function is disposed to be close to the drain. As a result, the FinFET according to the present invention increases a threshold voltage by using a material having the high work function for the gate electrode and lowers the work function of the gate electrode overlapping with the drain, so that gate induced drain leakage (GIDL) can be reduced.

Abstract translation: 提供了具有低漏电流的鳍式场效应晶体管（FinFET）及其制造方法。 FinFET包括：体硅衬底; 通过图案化基板形成的栅栏体; 在所述基板的表面上形成到所述栅栏状体的第一高度的绝缘层; 在侧壁形成的栅极绝缘层和不形成绝缘层的栅栏状体的上表面; 形成在所述栅极绝缘层上的栅电极; 源极/漏极形成在栅极体的不形成栅电极的区域处。 栅电极包括彼此接触并具有不同功函数的第一和第二栅电极。 特别地，具有低功函数的第二栅电极设置成靠近漏极。 结果，根据本发明的FinFET通过使用具有用于栅电极的高功函数的材料来增加阈值电压，并降低与漏极​​重叠的栅电极的功函数，从而导致漏极漏极（GIDL ）可以减少。

公开(公告)号：US20110052425A1

公开(公告)日：2011-03-03

申请号：US12616643

申请日：2009-11-11

Applicant: Seogjin YOON ,  Jong Ho Lee ,  Yoonghwa Park

Inventor： Seogjin YOON ,  Jong Ho Lee ,  Yoonghwa Park

IPC: F04B49/00 ,  F04B17/00

CPC classification number: B60W10/02 ,  F01P7/08 ,  F04D13/024 ,  F04D15/00 ,  F04D15/0209 ,  F16D27/02 ,  Y10T477/753

Abstract: A clutch water pump may include a pulley, a brake pad attached on an interior surface of the clutch compartment of the pulley, a clutch disk disposed corresponding to the brake pad in the clutch compartment, a hub rotatably mounted into the penetrating hole and coupled to the clutch disk through a plurality of spring pins, the plurality of spring pins connecting slidably the clutch disk to the hub, a magnetic actuator fixed to the hub and disposed to the clutch disk to selectively move the clutch disk toward or away from the brake pad, and a main shaft, one end of which is fixed to the center of the hub and the other end of which is fixed to an impeller. Furthermore, a method of controlling the clutch water pump according to the engine rotation speed, the coolant temperature, and a condition of the coolant temperature sensor is provided.

Abstract translation: 离合器水泵可以包括滑轮，附接在滑轮的离合器室的内表面上的制动衬块，与离合器室中的制动衬块相对设置的离合器盘，可旋转地安装到穿透孔中并联接到 所述离合器盘通过多个弹簧销，所述多个弹簧销将所述离合器盘可滑动地连接到所述轮毂;磁性致动器，其固定到所述轮毂并且设置在所述离合器盘上，以选择性地将离合器盘朝向或远离制动片移动 ，主轴一端固定在轮毂的中心，另一端固定在叶轮上。 此外，提供了根据发动机转速，冷却剂温度和冷却剂温度传感器的状态来控制离合器水泵的方法。