公开(公告)号：US20200235321A1

公开(公告)日：2020-07-23

申请号：US16597905

申请日：2019-10-10

Applicant: BOE Technology Group Co., Ltd.

Inventor： Shipei LI ,  Qi YAO ,  Wusheng LI ,  Jiangnan LU ,  Huili WU ,  Fang HE ,  Renquan GU ,  Dongsheng YIN ,  Sheng XU ,  Wei HE

IPC: H01L51/00 ,  H01L27/32 ,  H01L51/52 ,  H01L51/56

Abstract: A display panel is provided, including a substrate on a base, a transistor stack on the substrate, and a fluorescent layer between the base and the transistor stack. The fluorescent layer is configured to prevent light from damaging an active layer in the transistor stack in a laser lift-off process, and an orthographic projection of the fluorescent layer on the base overlaps an orthographic projection of the active layer on the base. A display device comprising the display panel, and a manufacturing method of the display panel are further provided.

公开(公告)号：US20190198348A1

公开(公告)日：2019-06-27

申请号：US16322308

申请日：2018-05-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Haixu LI ,  Zhanfeng CAO ,  Qi YAO ,  Jianguo WANG ,  Fanna MENG

IPC: H01L21/3213 ,  H01L29/786 ,  H01L21/311

CPC classification number: H01L21/32134 ,  H01L21/31111 ,  H01L21/32139 ,  H01L29/78606

Abstract: Provided in an embodiment of the present invention are a manufacturing method of an electrode pattern, a thin film transistor and a manufacturing method thereof, and a display panel. The manufacturing method of an electrode pattern includes: forming a metal thin film; performing processing on the metal thin film to form a partner layer over a surface of the metal thin film, the partner layer being configured to react with a photoresist to form a hydrogen bond; and performing patterning to form an electrode.

公开(公告)号：US20190148561A1

公开(公告)日：2019-05-16

申请号：US16036099

申请日：2018-07-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shengguang BAN ,  Zhanfeng CAO ,  Qi YAO ,  Dapeng XUE

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L21/027

Abstract: The present disclosure provides a method for manufacturing an LTPS thin film transistor which includes: forming a light shielding pattern and an active layer of the LTPS thin film transistor on a base substrate through one single patterning process, in which an orthogonal projection of the active layer on the base substrate falls within an orthogonal projection of the light shielding pattern on the base substrate, and the light shielding pattern is made of a semiconductor material.

公开(公告)号：US20190027511A1

公开(公告)日：2019-01-24

申请号：US15968835

申请日：2018-05-02

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Haixu LI ,  Zhanfeng CAO ,  Qi YAO

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1251 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/127 ,  H01L29/78606

Abstract: The present disclosure provides an array substrate, a fabricating method thereof, and a display device. The array substrate includes a base substrate which has a first region and a second region respectively provided with a first transistor and a second transistor. The first transistor has a first active layer of low-temperature polysilicon, and the second transistor has a second active layer of metal oxide semiconductor. The first active layer, an interlayer dielectric layer and the second active layer are sequentially disposed on the base substrate, and a barrier layer is disposed between the interlayer dielectric layer and the second active layer.

公开(公告)号：US20170174921A1

公开(公告)日：2017-06-22

申请号：US15118234

申请日：2015-12-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaolong HE ,  Qi YAO ,  Seongyeol YOO ,  Shi SHU ,  Zhanfeng CAO ,  Wei XU

IPC: C09D11/50 ,  C09D11/38 ,  C09D11/36 ,  C09K11/70 ,  C09K11/02 ,  C09K11/88 ,  C09K11/87 ,  C09K11/74 ,  C09D11/52 ,  H01L51/00

CPC classification number: H01B1/20 ,  C09D11/322 ,  C09D11/36 ,  C09D11/38 ,  C09D11/50 ,  C09D11/52 ,  C09K11/025 ,  C09K11/70 ,  C09K11/7492 ,  C09K11/876 ,  C09K11/883 ,  H01L51/0005 ,  H01L51/0052 ,  H01L51/006 ,  H01L51/0061 ,  H01L51/0067 ,  H01L51/0069 ,  H01L51/007 ,  H01L51/0072 ,  H01L51/502 ,  H01L51/5056 ,  H01L51/5072 ,  H01L51/56 ,  H01L2051/0063

Abstract: A quantum dot ink, a manufacturing method thereof and a quantum dot light emitting diode device are provided. The quantum dot ink includes a non-polar organic solvent, a surface tension modifier and a hydrophobic quantum dot, the quantum dot ink further includes a carrier transport material, wherein phase separation is present between the hydrophobic quantum dot and the carrier transport material. After completing ink-jet printing the quantum dot ink, phase separation occurs between the hydrophobic quantum dot and the carrier transport material. Thus, the two-layer structure of a hydrophobic quantum dot layer and a carrier transport material layer is formed through one process. Not only a quantum dot light emitting device is manufactured by the method of ink-jet printing, but also the operation is simplified, and the manufacturing cost of the quantum dot light emitting device is reduced.

公开(公告)号：US20160351585A1

公开(公告)日：2016-12-01

申请号：US14895352

申请日：2015-05-15

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhanfeng CAO ,  Feng ZHANG ,  Qi YAO ,  Jincheng GAO ,  Bin ZHANG ,  Xiaolong HE ,  Zhengliang LI ,  Wei ZHANG

IPC: H01L27/12 ,  G02F1/1345

CPC classification number: H01L27/124 ,  G02F1/1345 ,  G02F1/13452 ,  G02F1/13454 ,  G02F1/136204 ,  H01L27/12

Abstract: An array substrate and a display device are provided. The array substrate comprises a plurality of signal lines (40), a plurality of connecting lines (50) and a driving module (60) in a peripheral region (1) outside a display region (2); the connecting lines (50) are configured for connecting the signal lines (40) and the driving module (60), to transmit signal from the signal lines (40) to the driving module (60), wherein, at least one of the connecting lines (50) and at least one of the signal lines (40) are designed to intersect with and insulated from each other in a first region (N). The at least one of the signal lines (40) includes, in a second region (O) other than the first region (N), a first electrode line layer (401) and a second electrode line layer (402), while, in the first region (N), includes the first electrode line layer (401) but does not include the second electrode line layer (402). The array substrate may prevent problems of electrostatic accumulation or short circuit from occurring between the connecting lines (50) and the second electrode line layer (402).

Abstract translation: 提供阵列基板和显示装置。 阵列基板包括在显示区域（2）外部的周边区域（1）中的多条信号线（40），多条连接线（50）和驱动模块（60）。 连接线（50）被配置用于连接信号线（40）和驱动模块（60），以将信号从信号线（40）发送到驱动模块（60），其中至少一个连接 线路（50）和信号线（40）中的至少一个被设计成在第一区域（N）中与彼此相交和绝缘。 信号线（40）中的至少一个在除了第一区域（N）之外的第二区域（O）中包括第一电极线层（401）和第二电极线层（402），而在 第一区域（N）包括第一电极线层（401），但不包括第二电极线层（402）。 阵列基板可以防止在连接线（50）和第二电极线层（402）之间发生静电积聚或短路的问题。

公开(公告)号：US20160336373A1

公开(公告)日：2016-11-17

申请号：US15088177

申请日：2016-04-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Jincheng GAO ,  Zhanfeng CAO ,  Xiangchun KONG ,  Qi YAO ,  Zhengliang LI ,  Bin Zhang ,  Xiaolong HE

IPC: H01L27/146 ,  G01T1/24 ,  G01T1/20

CPC classification number: H01L27/14663 ,  G01T1/2018 ,  G01T1/241 ,  H01L27/14612

Abstract: The present disclosure provides an X-ray flat panel detector including: a base substrate; thin film transistors (TFTs), a pixel electrode layer, photodiodes, a transparent electrode layer, and an X-ray conversion layer which are arranged on the base substrate; and an electric field application portion configured to generate an electric field, wherein the photodiodes are arranged in the electric field, and a moving direction of negative charges when visible light rays are converted to electrical signals by the photodiodes is substantially same as a direction of the electric field. In this detector, it is applied a direction of the electric field which is substantially same as the moving direction of negative charges in the photodiode, so that movement of holes and electrons of the photodiode may be accelerated under an influence of the electric field, and thus the electrical signal may promptly arrive at the pixel electrode. As a result, it is improved the quantum detection efficiency and the sensitivity of the X-ray flat panel detector.

Abstract translation: 本公开提供了一种X射线平板检测器，包括：基底; 设置在基底基板上的薄膜晶体管（TFT），像素电极层，光电二极管，透明电极层和X射线转换层; 以及电场施加部，被配置为产生电场，其中所述光电二极管被布置在电场中，并且当可见光被所述光电二极管转换为电信号时，所述负电荷的移动方向基本上与所述电场的方向相同 电场。 在该检测器中，施加与光电二极管中的负电荷的移动方向基本相同的电场的方向，从而可以在电场的影响下加速光电二极管的空穴和电子的移动，并且 因此电信号可以迅速到达像素电极。 结果，提高了X射线平板检测器的量子检测效率和灵敏度。

公开(公告)号：US20160293875A1

公开(公告)日：2016-10-06

申请号：US14369653

申请日：2013-12-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng ZHANG ,  Qi YAO

IPC: H01L51/50 ,  H01L51/56 ,  H01L51/52 ,  H01L27/32

Abstract: The present invention provides a method for manufacturing a quantum dot light-emitting element and a display device. The method comprises mixing a quantum dot light-emitting material and a hole-transporting material or mixing the quantum dot light-emitting material and an electron-transporting material, and dissolving a mixture into an organic solvent to form a mixed solvent, applying the mixed solvent to a substrate for manufacturing a quantum dot light-emitting element, removing the organic solvent form the mixed solvent to stratify the quantum dot light-emitting material and the hole-transporting material or the electron-transporting material on the substrate for manufacturing a quantum dot light-emitting element to form a quantum dot light-emitting layer and a hole-transporting layer or an electron-transporting layer.

Abstract translation: 本发明提供一种量子点发光元件和显示装置的制造方法。 该方法包括混合量子点发光材料和空穴传输材料或混合量子点发光材料和电子传输材料，并将混合物溶解在有机溶剂中以形成混合溶剂，将混合的 溶剂施加到用于制造量子点发光元件的基板，从混合溶剂中除去有机溶剂，以将量子点发光材料和空穴传输材料或电子传输材料分层在制造量子基板上 点阵发光元件形成量子点发光层和空穴传输层或电子传输层。

公开(公告)号：US20160254388A1

公开(公告)日：2016-09-01

申请号：US14768992

申请日：2014-11-27

Applicant: BOE Technology Group Co., Ltd

Inventor： Feng ZHANG ,  Zhanfeng CAO ,  Qi YAO

IPC: H01L29/786 ,  H01L29/66 ,  G02F1/1368 ,  H01L27/12

CPC classification number: H01L29/78606 ,  G02F1/1368 ,  G02F2201/40 ,  H01L21/76801 ,  H01L21/76829 ,  H01L21/76831 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0529

Abstract: A thin film transistor is disclosed in the present invention. The thin film transistor comprises: a substrate, an active layer, a first etching barrier layer, a second etching barrier layer, a source and a drain, wherein: the active layer is disposed over the substrate; the first etching barrier layer is disposed over the active layer; the second etching barrier layer is disposed over the first etching barrier layer; the source and the drain are disposed over the second etching barrier layer, and are connected to each other through the active layer by means of via holes formed in the first etching barrier layer and the second etching barrier layer by etching; and a length of the first etching barrier layer at a channel position is less than a length of the second etching barrier layer. A method of manufacturing the thin film transistor, an array substrate and a display apparatus are also disclosed in the present invention. A length of a channel of the thin film transistor according to the present invention is less than the length of the channel of the conventional thin film transistor. Thereby, size and energy consumption of the thin film transistor are reduced, an aperture ratio of a liquid crystal panel is increased, and a turn-on current of the thin film transistor is increased, so that whole performance of the thin film transistor is further improved.

Abstract translation: 在本发明中公开了一种薄膜晶体管。 薄膜晶体管包括：衬底，有源层，第一蚀刻阻挡层，第二蚀刻阻挡层，源极和漏极，其中：有源层设置在衬底上; 第一蚀刻阻挡层设置在有源层上; 所述第二蚀刻阻挡层设置在所述第一蚀刻阻挡层上; 源极和漏极设置在第二蚀刻阻挡层之上，并且通过通过蚀刻在第一蚀刻阻挡层和第二蚀刻阻挡层中形成的通孔而通过有源层彼此连接; 并且沟道位置处的第一蚀刻阻挡层的长度小于第二蚀刻阻挡层的长度。 在本发明中还公开了制造薄膜晶体管，阵列基板和显示装置的方法。 根据本发明的薄膜晶体管的沟道的长度小于常规薄膜晶体管的沟道的长度。 因此，薄膜晶体管的尺寸和能量消耗减小，液晶面板的开口率增加，薄膜晶体管的导通电流增加，薄膜晶体管的整体性能进一步提高 改进。

公开(公告)号：US20150340455A1

公开(公告)日：2015-11-26

申请号：US14376028

申请日：2013-11-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhanfeng CAO ,  Qi YAO ,  Luke DING ,  Bing SUN ,  Xiangchun KONG

IPC: H01L29/423 ,  H01L29/51 ,  H01L29/786 ,  H01L29/49 ,  G02F1/1368 ,  H01L27/12

CPC classification number: H01L29/42364 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/78606 ,  H01L29/7869 ,  H01L2029/42388

Abstract: The present invention provides a thin film transistor and a method of fabricating the thin film transistor, an array substrate and a method of fabricating the array substrate, and a display device. The thin film transistor includes a substrate and a gate, an insulation layer, an active layer, a source and a drain which are provided on the substrate. A spacer layer is also provided between the gate and the active layer, and the spacer layer overlaps at least with one of the gate and the active layer having a smaller area in an orthographic projection direction. The spacer layer can effectively prevent material forming the gate from being diffused into the active layer, thereby ensuring stability of performance of the thin film transistor. In the array substrate utilizing the thin film transistor, the spacer layer further extends to a region corresponding to a gate line.

Abstract translation: 本发明提供一种薄膜晶体管和制造薄膜晶体管的方法，阵列基板和制造阵列基板的方法以及显示装置。 薄膜晶体管包括设置在基板上的基板和栅极，绝缘层，有源层，源极和漏极。 间隔层还设置在栅极和有源层之间，并且间隔层至少与栅极和有源层中的一个重叠，在正投影方向上具有较小的面积。 间隔层可以有效地防止形成栅极的材料扩散到有源层中，从而确保薄膜晶体管的性能的稳定性。 在利用薄膜晶体管的阵列基板中，间隔层进一步延伸到对应于栅极线的区域。