公开(公告)号：US20230411526A1

公开(公告)日：2023-12-21

申请号：US18240775

申请日：2023-08-31

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Masami JINTYOU ,  Yukinori SHIMA ,  Takashi HAMOCHI ,  Yasutaka NAKAZAWA

IPC: H01L29/786 ,  G02F1/1339 ,  G02F1/1333 ,  G02F1/1335 ,  H01L27/12 ,  H01L29/10 ,  H01L29/45 ,  G02F1/1368

CPC classification number: H01L29/78606 ,  G02F1/13394 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  H01L27/124 ,  H01L27/1225 ,  H01L27/1233 ,  H01L27/1251 ,  H01L29/1033 ,  H01L29/45 ,  H01L29/7869 ,  H01L29/78648 ,  H01L29/78696 ,  G02F1/1368 ,  H10K59/1213

Abstract: A semiconductor device comprising an oxide semiconductor film, a gate electrode, a first insulating film, a source electrode, a drain electrode, and a second insulating film is provided. Each of a top surface of the gate electrode, a top surface of the source electrode, and a top surface of the drain electrode comprises a region in contact with the second insulating film. A top surface of the first insulating film comprises a region in contact with the gate electrode and a region in contact with the second insulating film and overlapping with the oxide semiconductor film in a cross-sectional view of the oxide semiconductor film. The oxide semiconductor film comprises a region in contact with the first insulating film and a region in contact with the second insulating film and adjacent to the region in contact with the first insulating film in the cross-sectional view.

公开(公告)号：US20230411410A1

公开(公告)日：2023-12-21

申请号：US18239928

申请日：2023-08-30

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

IPC: H01L27/12 ,  G09G3/20 ,  G09G3/3291 ,  H01L29/786 ,  H03K19/003 ,  H03K19/096 ,  G11C19/28 ,  H03K17/16 ,  G09G3/36 ,  G11C19/18

CPC classification number: H01L27/1255 ,  G09G3/3233 ,  G09G3/3291 ,  H01L27/1225 ,  H01L29/7869 ,  H01L27/1222 ,  H03K19/00315 ,  H03K19/096 ,  G09G3/2092 ,  G11C19/28 ,  H03K17/161 ,  G09G3/36 ,  G11C19/184 ,  H01L27/124 ,  G09G3/20

Abstract: To reduce a leakage current of a transistor so that malfunction of a logic circuit can be suppressed. The logic circuit includes a transistor which includes an oxide semiconductor layer having a function of a channel formation layer and in which an off current is 1×10−13 A or less per micrometer in channel width. A first signal, a second signal, and a third signal that is a clock signal are input as input signals. A fourth signal and a fifth signal whose voltage states are set in accordance with the first to third signals which have been input are output as output signals.

公开(公告)号：US20230410738A1

公开(公告)日：2023-12-21

申请号：US18036221

申请日：2021-11-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Tatsuya ONUKI

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2310/08 ,  G09G2300/0814 ,  G09G2330/021 ,  G09G2330/10 ,  G09G2320/0626

Abstract: A display device excellent in downsizing, reduction in power consumption, or layout flexibility of an arithmetic device is provided. The display device includes a pixel circuit, a driver circuit, and a functional circuit. The driver circuit has a function of outputting an image signal for performing display in the pixel circuit. The functional circuit includes a CPU including a CPU core including a flip-flop electrically connected to a backup circuit. The display device includes a first layer and a second layer. The first layer includes the driver circuit and the CPU. The second layer includes the pixel circuit and the backup circuit. The first layer includes a semiconductor layer including silicon in a channel formation region. The second layer includes a semiconductor layer including a metal oxide in a channel formation region. The CPU has a function of correcting the image signal in accordance with the amount of current flowing through the pixel circuit.

公开(公告)号：US20230403876A1

公开(公告)日：2023-12-14

申请号：US18233361

申请日：2023-08-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Satoshi SEO ,  Koji KUSUNOKI ,  Kei TAKAHASHI

IPC: H10K50/115 ,  G09G3/3225 ,  H10K59/121

CPC classification number: H10K50/115 ,  G09G3/3225 ,  H10K59/1213 ,  G09G2300/0842

Abstract: A display device having a high display quality is provided. A display device that can perform desired display without image data conversion is provided. The display device includes a first pixel. The first pixel includes a first light-emitting element, a color conversion layer, and a first memory circuit. The first light-emitting element exhibits blue light. The color conversion layer has a function of converting light emitted by the first light-emitting element into light having a longer wavelength. A first image signal and a first correction signal are supplied to the first pixel. The first memory circuit has a function of retaining the first correction signal and a function of adding the first correction signal to the first image signal. The first pixel has a function of displaying an image using the first image signal and the first correction signal.

公开(公告)号：US20230397447A1

公开(公告)日：2023-12-07

申请号：US18235995

申请日：2023-08-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Kiyoshi KATO

IPC: H10B99/00 ,  H01L27/12 ,  H01L29/24 ,  H01L29/16 ,  G11C11/405 ,  G11C16/04 ,  H01L27/105 ,  H01L27/118 ,  H10B41/20 ,  H10B41/70 ,  H10B69/00 ,  H01L29/786

CPC classification number: H10B99/00 ,  H01L27/1207 ,  H01L29/24 ,  H01L29/16 ,  G11C11/405 ,  G11C16/0433 ,  H01L27/105 ,  H01L27/11803 ,  H01L27/1225 ,  H10B41/20 ,  H10B41/70 ,  H10B69/00 ,  H01L29/7869 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/247 ,  H01L29/78693 ,  H01L29/78696 ,  G11C2211/4016 ,  H01L21/8221

Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.

公开(公告)号：US20230397427A1

公开(公告)日：2023-12-07

申请号：US18024285

申请日：2021-09-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Hitoshi KUNITAKE ,  Yuji EGI ,  Fumito ISAKA

IPC: H10B51/30 ,  H10B51/40 ,  H10B53/30 ,  H10B53/40 ,  H01L29/78 ,  H10B63/10 ,  H10N50/10

CPC classification number: H10B51/30 ,  H10B51/40 ,  H10B53/30 ,  H10B53/40 ,  H01L29/78391 ,  H10B63/10 ,  H10N50/10

Abstract: A semiconductor device that has lower power consumption and is capable of non-destructive reading is provided. The semiconductor device includes a first transistor, a first FTJ element, and a second FTJ element. A first terminal of the first transistor is electrically connected to an output terminal of the first FTJ element and an input terminal of the second FTJ element. In data writing, polarization is caused in each of the first FTJ element and the second FTJ element in accordance with the data. In data reading, voltage with which the polarization does not change is applied between the output terminal of the first FTJ element and the input terminal of the second FTJ element. At this time, the first transistor is turned on, whereby a differential current between current flowing through the first FTJ element and current flowing through the second FTJ element flows through the first transistor. Obtaining the differential current using a read circuit or the like enables the data written to the first FTJ element and the second FTJ element to be read.

公开(公告)号：US20230389332A1

公开(公告)日：2023-11-30

申请号：US18032651

申请日：2021-10-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yasuhiro JINBO ,  Toshikazu OHNO ,  Yuichi SATO ,  Sachie ETO ,  Shinobu KAWAGUCHI

IPC: H10B53/30

CPC classification number: H10B53/30

Abstract: A ferroelectric device having favorable ferroelectricity is provided. The ferroelectric device includes a first conductor over a first insulator, a ferroelectric layer over the first conductor, a second conductor over the ferroelectric layer, a second insulator over the second conductor, and a third insulator surrounding the first conductor, the ferroelectric layer, the second conductor, and the second insulator. The second insulator has a function of capturing or fixing hydrogen, and the third insulator has a function of inhibiting hydrogen diffusion.

公开(公告)号：US20230387451A1

公开(公告)日：2023-11-30

申请号：US18228732

申请日：2023-08-01

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI

IPC: H01M10/0525 ,  H01M50/449 ,  H01M50/457

CPC classification number: H01M10/0525 ,  H01M50/449 ,  H01M50/126 ,  Y02T10/70 ,  H01M50/457

Abstract: To provide a novel structure of a separator in a secondary battery. A nonaquesous secondary battery includes a positive electrode, a negative electrode, an electrolyte solution, a first separator, and a second separator. The first separator and the second separator are provided between the positive electrode and the negative electrode. The first separator is provided with a first pore, the second separator is provided with a second pore, and the size of the first pore is different from the size of the second pore. Furthermore, the proportion of the volume of the first pores in the first separator is different from the proportion of the volume of the second pores in the second separator.

公开(公告)号：US20230387217A1

公开(公告)日：2023-11-30

申请号：US18228134

申请日：2023-07-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yasuharu HOSAKA ,  Yukinori SHIMA ,  Junichi KOEZUKA ,  Kenichi OKAZAKI

IPC: H01L29/24 ,  H01L29/423 ,  H01L29/786 ,  H01L29/49 ,  H01L29/06 ,  H01L29/10

CPC classification number: H01L29/24 ,  H01L29/42384 ,  H01L29/78648 ,  H01L29/4908 ,  H01L29/0692 ,  H01L29/1037 ,  H01L29/7869 ,  H01L29/78696

Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.

公开(公告)号：US20230380175A1

公开(公告)日：2023-11-23

申请号：US18031421

申请日：2021-10-07

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Hajime KIMURA ,  Takayuki IKEDA

IPC: H10B51/30 ,  H10B53/30 ,  G11C11/22

CPC classification number: H10B51/30 ,  H10B53/30 ,  G11C11/22

Abstract: A semiconductor device that has lower power consumption and is capable of non-destructive reading is provided. The semiconductor device includes first to fourth transistors and first and second FTJ elements. The first FTJ element and the second FTJ element each include an input terminal, a tunnel insulating film, a dielectric, and an output terminal. One of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the third transistor, a gate of the fourth transistor, and the output terminal of the first FTJ element. One of a source and a drain of the second transistor is electrically connected to one of a source and a drain of the fourth transistor, a gate of the third transistor, and the output terminal of the second FTJ element.