公开(公告)号：US06194775B1

公开(公告)日：2001-02-27

申请号：US09007155

申请日：1998-01-14

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L2986

CPC分类号： H01L27/11 ,  H01L21/3185 ,  H01L27/1112 ,  Y10S257/904

摘要： In a method of manufacturing a semiconductor device, an insulating film is formed on a semiconductor substrate. A semiconductor film pattern is formed on the insulating film. A direct thermal nitriding method is performed to at least a portion of the semiconductor film pattern. The direct thermal nitriding method is performed by lamp annealing in a gas composed of nitrogen such that a thermally nitrided film has a film thickness of equal to or thicker than 1.5 nm. Thus, invasion of a hydrogen atom or ion into the semiconductor film pattern can be prevented.

摘要翻译： 在制造半导体器件的方法中，在半导体衬底上形成绝缘膜。 在绝缘膜上形成半导体膜图形。 对半导体膜图案的至少一部分进行直接热氮化方法。 直接热氮化方法通过在由氮组成的气体中进行灯退火，使得热氮化膜具有等于或大于1.5nm的膜厚度来进行。 因此，可以防止氢原子或离子侵入到半导体膜图案中。

公开(公告)号：US06187662B1

公开(公告)日：2001-02-13

申请号：US09229213

申请日：1999-01-13

申请人： Tatsuya Usami ,  Noriaki Oda

发明人： Tatsuya Usami ,  Noriaki Oda

IPC分类号： H01L21316

CPC分类号： H01L21/76801 ,  H01L21/02129 ,  H01L21/02131 ,  H01L21/02134 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/3124 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/31629 ,  H01L21/76834

摘要： A semiconductor device includes a first insulating film formed on a semiconductor substrate. Wiring patterns are partially formed on the first interlayer insulating film. A second insulating film is formed to cover the first insulating film and the wiring patterns. A third insulating film is formed on the second insulating film. In this case, at least an upper surface portion of the first insulating film has a moisture containing percentage lower than that of the second insulating film.

摘要翻译： 半导体器件包括形成在半导体衬底上的第一绝缘膜。 部分地在第一层间绝缘膜上形成布线图案。 形成第二绝缘膜以覆盖第一绝缘膜和布线图案。 在第二绝缘膜上形成第三绝缘膜。 在这种情况下，第一绝缘膜的至少上表面部的含水率比第二绝缘膜低。

公开(公告)号：US6140225A

公开(公告)日：2000-10-31

申请号：US104714

申请日：1998-06-25

申请人： Tatsuya Usami ,  Hidemitsu Aoki ,  Yasuaki Tsuchiya ,  Shinya Yamasaki

发明人： Tatsuya Usami ,  Hidemitsu Aoki ,  Yasuaki Tsuchiya ,  Shinya Yamasaki

IPC分类号： H01L21/302 ,  H01L21/033 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/312 ,  H01L21/3205 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/522 ,  H01L21/4753 ,  H01L21/461

CPC分类号： H01L21/32139 ,  H01L21/0332 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3205 ,  H01L21/32136 ,  H01L21/76802 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/3124

摘要： A first insulating film with a dielectric constant lower than that of a silicon oxide film is formed on a semiconductor substrate. Next, a second insulating film, which has degrees of moisture absorption and deformation in an oxygen plasma process and exposure to a resist releasing solution equal to or less than those of a silicon oxide film, is formed on the first insulating film. Then, a third insulating film, which has degrees of moisture absorption and deformation in an oxygen plasma process and exposure to a resist releasing solution equal to or less than those of a silicon oxide film are formed on the second insulating film. Thereafter, the third insulating film is patterned to a prescribed pattern. An opening is formed in the first and second insulating films using the third insulating film as a mask.

摘要翻译： 在半导体衬底上形成介电常数比氧化硅膜低的第一绝缘膜。 接下来，在第一绝缘膜上形成第二绝缘膜，其在氧等离子体处理中具有吸湿变形程度，并且暴露于等于或小于氧化硅膜的抗蚀剂释放溶液。 然后，在第二绝缘膜上形成第三绝缘膜，其在氧等离子体处理中具有吸湿变形程度，并且暴露于等于或小于氧化硅膜的抗蚀剂释放溶液。 此后，将第三绝缘膜图案化为规定的图案。 使用第三绝缘膜作为掩模在第一绝缘膜和第二绝缘膜中形成开口。

公开(公告)号：US08435828B2

公开(公告)日：2013-05-07

申请号：US13006034

申请日：2011-01-13

申请人： Hironori Yamamoto ,  Yoshihiro Hayashi ,  Jun Kawahara ,  Tatsuya Usami ,  Koichi Ohto

发明人： Hironori Yamamoto ,  Yoshihiro Hayashi ,  Jun Kawahara ,  Tatsuya Usami ,  Koichi Ohto

IPC分类号： H01L51/40

CPC分类号： H01L21/76832 ,  H01L21/02126 ,  H01L21/022 ,  H01L21/02203 ,  H01L21/02274 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76883

摘要： A method of manufacturing a semiconductor device includes forming a first insulating film over an underlying film by plasma polymerization of cyclic siloxane, and forming a second insulating film on the first insulating film by plasma polymerization of the cyclic siloxane continuously, after forming the first insulating film. The deposition rate of the first insulating film is slower than the deposition rate of the second insulating film.

摘要翻译： 一种制造半导体器件的方法包括：通过环状硅氧烷的等离子体聚合在下面的膜上形成第一绝缘膜，并且在形成第一绝缘膜之后，通过环状硅氧烷的等离子体聚合在第一绝缘膜上形成第二绝缘膜 。 第一绝缘膜的沉积速度比第二绝缘膜的沉积速度慢。

公开(公告)号：US08242014B2

公开(公告)日：2012-08-14

申请号：US13078605

申请日：2011-04-01

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/76801 ,  H01L21/7682 ,  H01L21/76822 ,  H01L21/76825 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76886 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is manufactured by forming a first reinforcing insulating film and a first sacrificial interlayer. A first trench is formed and then filled with an interconnect covered with a cap metal. First and second sacrificial barrier dielectrics are formed, and the second sacrificial interlayer and the sacrificial barrier dielectric are selectively removed to form a hole exposing the cap metal. A conductive via connects the interconnect by forming a conductor in the hole, and a second cap metal covers the via. The interconnect exposes the via by selectively removing the sacrificial interlayers and dielectric. An insulating film covers the side wall and the upper portion of the interconnect, and the side wall of the conductive via which is connected to the interconnect from the side wall of the interconnect through the side wall of the via. An air-gap is provided in the insulating film.

摘要翻译： 通过形成第一加强绝缘膜和第一牺牲中间层来制造半导体器件。 形成第一沟槽，然后填充覆盖有帽金属的互连。 形成第一和第二牺牲阻挡电介质，并且选择性地去除第二牺牲中间层和牺牲阻挡电介质以形成露出帽金属的孔。 导电通孔通过在孔中形成导体来连接互连，并且第二帽金属覆盖通孔。 互连通过选择性地去除牺牲中间层和电介质来暴露通孔。 绝缘膜覆盖互连的侧壁和上部，以及导电通孔的侧壁，其通过通孔的侧壁从互连的侧壁连接到互连。 在绝缘膜中设置气隙。

公开(公告)号：US08115318B2

公开(公告)日：2012-02-14

申请号：US12773493

申请日：2010-05-04

申请人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

发明人： Koichi Ohto ,  Toshiyuki Takewaki ,  Tatsuya Usami ,  Nobuyuki Yamanishi

IPC分类号： H01L23/48

CPC分类号： H01L21/022 ,  H01L21/02074 ,  H01L21/02118 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/02203 ,  H01L21/02211 ,  H01L21/02274 ,  H01L21/3124 ,  H01L21/3148 ,  H01L21/31633 ,  H01L21/318 ,  H01L21/3185 ,  H01L21/32136 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/76883 ,  H01L21/76886 ,  H01L21/76889 ,  H01L23/53233 ,  H01L23/53238 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.

摘要翻译： 在半导体器件中，在绝缘底层上形成具有凹槽的绝缘中间层。 不含金属硅化物的硅扩散金属层埋入槽内。 在硅扩散金属层和绝缘中间层上形成金属扩散阻挡层。

公开(公告)号：US20120009789A1

公开(公告)日：2012-01-12

申请号：US13137847

申请日：2011-09-16

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/768

CPC分类号： H01L21/76811 ,  H01L21/76808 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of producing a semiconductor device includes forming, on a first insulating film formed on a substrate, a first groove in an element-forming region to form one of a via and a wiring therein, and a first seal ring groove in a seal ring part, forming one of a via and a wiring in the first groove and a first metal layer in the first seal ring groove, and then removing the metal material in a part exposed to an outside of the first groove and the first seal ring groove, forming a second insulating film on the first insulating film, forming, on the second insulating film, a second groove, and a second seal ring groove in the seal ring part on the first seal ring groove, and forming one of a via and a wiring in the second groove and a second metal layer.

摘要翻译： 一种制造半导体器件的方法包括在形成在基板上的第一绝缘膜上形成元件形成区域中的第一槽，以在其中形成通孔和布线之一，以及密封环中的第一密封环槽 在第一槽中形成通孔和配线之一，在第一密封环槽中形成第一金属层，然后在暴露于第一槽和第一密封环槽的外侧的部分除去金属材料， 在所述第一绝缘膜上形成第二绝缘膜，在所述第二绝缘膜上形成所述第一密封环槽中的所述密封环部分中的第二槽和第二密封环槽，并且形成通孔和布线 在第二槽和第二金属层中。

公开(公告)号：US20110207318A1

公开(公告)日：2011-08-25

申请号：US13064940

申请日：2011-04-27

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/768

CPC分类号： H01L21/76826 ,  H01L21/76822 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76883 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/30105 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device, includes burying a conductive pattern in an insulating film made of SiOH, SiCOH or organic polymer, treating surfaces of the insulating film and the conductive pattern with plasma which includes a hydrocarbon gas as a treatment gas, and forming a diffusion barrier film, which is formed of an SiCH film, an SiCHN film, an SiCHO film or an SiCHON film, over the insulating film and the conductive pattern with performing a plasma CVD by adding an Si-containing gas to the treatment gas while increasing the addition amount gradually or in a step-by-step manner.

摘要翻译： 一种制造半导体器件的方法，包括将导电图案埋入由SiOH，SiCOH或有机聚合物制成的绝缘膜中，用包括烃气体的等离子体处理绝缘膜和导电图案作为处理气体，并形成 在绝缘膜和导电图案上由SiCH膜，SiCHN膜，SiCHO膜或SiCHON膜形成的扩散阻挡膜，通过向处理气体中添加含Si气体进行等离子体CVD，同时 逐渐或逐步增加添加量。

公开(公告)号：US20100270683A1

公开(公告)日：2010-10-28

申请号：US12662335

申请日：2010-04-12

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L23/48 ,  H01L21/768

CPC分类号： H01L21/7682 ,  H01L21/76834 ,  H01L21/76885 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interconnect is provided in a first insulating layer and the upper surface of the interconnect is higher than the upper surface of the first insulating layer. An air gap is disposed between the interconnect and the first insulating layer. An etching stopper film is formed over the first insulating layer, the air gap, and the interconnect. A second insulating layer is formed over the etching stopper film. A via is provided in the second insulating layer and is connected to the interconnect. A portion of the etching stopper film that is disposed over the air gap is thicker than another portion that is disposed over the interconnect.

摘要翻译： 在第一绝缘层中提供互连，并且互连的上表面高于第一绝缘层的上表面。 在互连和第一绝缘层之间设置气隙。 在第一绝缘层，气隙和互连件之上形成蚀刻阻挡膜。 在蚀刻停止膜上形成第二绝缘层。 通孔设置在第二绝缘层中并连接到互连。 设置在气隙上的蚀刻阻挡膜的一部分比设置在互连上的另一部分厚。

公开(公告)号：US07745937B2

公开(公告)日：2010-06-29

申请号：US11355003

申请日：2006-02-16

申请人： Tatsuya Usami ,  Koichi Ohto ,  Toshiyuki Takewaki

发明人： Tatsuya Usami ,  Koichi Ohto ,  Toshiyuki Takewaki

IPC分类号： H01L23/48

CPC分类号： H01L21/76867 ,  H01L21/02203 ,  H01L21/02329 ,  H01L21/3143 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76849 ,  H01L21/76886

摘要： A first gas including a silicon-containing compound is introduced into a vacuum chamber, to expose a semiconductor substrate placed in the chamber to the first gas atmosphere (silicon processing step). Then the pressure inside the vacuum chamber is reduced to a level lower than the pressure at the time of starting the silicon processing step (depressurizing step). Thereafter, a second gas including a nitrogen-containing compound is introduced into the vacuum chamber, and the semiconductor substrate is irradiated with the second gas plasma (nitrogen plasma step).

摘要翻译： 将包含含硅化合物的第一气体引入真空室中，以将放置在室内的半导体衬底暴露于第一气体气氛（硅处理步骤）。 然后将真空室内的压力降低到低于开始硅处理步骤（减压步骤）时的压力的水平。 此后，将包含含氮化合物的第二气体引入真空室中，并用第二气体等离子体（氮等离子体步骤）照射半导体衬底。