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公开(公告)号：US09085455B2
公开(公告)日：2015-07-21
申请号：US13893058
申请日：2013-05-13
Inventor： Chun-Wen Cheng , Chia-Hua Chu
CPC classification number: B81B7/04 , B81B7/0032 , B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2201/0257 , B81B2201/0264 , B81C1/00293 , B81C1/00309 , B81C3/001 , B81C2203/0118
Abstract: Embodiments of the present disclosure include MEMS devices and methods for forming MEMS devices. An embodiment is a method for forming a microelectromechanical system (MEMS) device, the method including forming a MEMS wafer having a first cavity, the first cavity having a first pressure, and bonding a carrier wafer to a first side of the MEMS wafer, the bonding forming a second cavity, the second cavity having a second pressure, the second pressure being greater than the first pressure. The method further includes bonding a cap wafer to a second side of the MEMS wafer, the second side being opposite the first side, the bonding forming a third cavity, the third cavity having a third pressure, the third pressure being greater than the first pressure and less than the second pressure.
Abstract translation: 本公开的实施例包括MEMS器件和用于形成MEMS器件的方法。 一个实施例是用于形成微机电系统（MEMS）装置的方法，该方法包括形成具有第一腔的MEMS晶片，第一腔具有第一压力，并将载体晶片接合到MEMS晶片的第一侧， 接合形成第二腔，所述第二腔具有第二压力，所述第二压力大于所述第一压力。 该方法还包括将盖晶片接合到MEMS晶片的第二侧，第二侧与第一侧相对，接合形成第三腔，第三腔具有第三压力，第三压力大于第一压力 并且小于第二压力。
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82.发明授权公开(公告)号：US09040334B2
公开(公告)日：2015-05-26
申请号：US13894821
申请日：2013-05-15
Inventor： Chia-Hua Chu , Chun-Wen Cheng
CPC classification number: B81C1/00293 , B81B3/0021 , B81B7/0041 , B81B7/007 , B81B7/02 , B81B7/04 , B81B2201/0235 , B81B2201/0242 , B81B2201/025 , B81B2201/0264 , B81C1/00134 , B81C1/00309 , B81C2201/013 , B81C2203/0118 , G01C19/56 , G01C19/5769 , G01L9/0044 , G01L19/0076 , G01L19/0092 , G01P15/00 , G01P15/0802 , G01P15/125
Abstract: A method embodiment includes providing a micro-electromechanical (MEMS) wafer including a polysilicon layer having a first and a second portion. A carrier wafer is bonded to a first surface of the MEMS wafer. Bonding the carrier wafer creates a first cavity. A first surface of the first portion of the polysilicon layer is exposed to a pressure level of the first cavity. A cap wafer is bonded to a second surface of the MEMS wafer opposite the first surface of the MEMS wafer. The bonding the cap wafer creates a second cavity comprising the second portion of the polysilicon layer and a third cavity. A second surface of the first portion of the polysilicon layer is exposed to a pressure level of the third cavity. The first cavity or the third cavity is exposed to an ambient environment.
Abstract translation: 方法实施例包括提供包括具有第一和第二部分的多晶硅层的微机电（MEMS）晶片。 载体晶片结合到MEMS晶片的第一表面。 粘合载体晶片产生第一腔。 多晶硅层的第一部分的第一表面暴露于第一腔的压力水平。 帽晶片结合到MEMS晶片的与MEMS晶片的第一表面相对的第二表面。 接合盖晶片产生包括多晶硅层的第二部分和第三腔的第二腔。 多晶硅层的第一部分的第二表面暴露于第三腔的压力水平。 第一腔或第三腔暴露于周围环境。
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公开(公告)号：US20140353776A1
公开(公告)日：2014-12-04
申请号：US14296729
申请日：2014-06-05
Inventor： Kai-Chih Liang , Jiou-Kang Lee , Chung-Hsien Lin , Te-Hao Lee , Chia-Hua Chu
IPC: B81B3/00
CPC classification number: B81B3/0078 , B81B3/0021 , B81B2203/01 , B81B2203/0118 , B81B2207/09 , B81C1/00182 , H01L29/84
Abstract: A MEMS structure incorporating multiple joined substrates and a method for forming the MEMS structure are disclosed. An exemplary MEMS structure includes a first substrate having a bottom surface and a second substrate having a top surface substantially parallel to the bottom surface of the first substrate. The bottom surface of the first substrate is connected to the top surface of the second substrate by an anchor, such that the anchor does not extend through either the bottom surface of the first substrate or the top surface of the second substrate. The MEMS structure may include a bonding layer in contact with the bottom surface of the first substrate, and shaped to at least partially envelop the anchor.
Abstract translation: 公开了一种结合多个接合的基板的MEMS结构和用于形成MEMS结构的方法。 示例性MEMS结构包括具有底表面的第一基底和具有基本上平行于第一基底的底表面的顶表面的第二基底。 第一基板的底表面通过锚固件连接到第二基板的顶表面，使得锚固件不延伸穿过第一基板的底表面或第二基板的顶表面。 MEMS结构可以包括与第一基板的底表面接触的结合层，并且成形为至少部分地包围锚固件。
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84.发明授权公开(公告)号：US08895360B2
公开(公告)日：2014-11-25
申请号：US13773224
申请日：2013-02-21
Inventor： Kuei-Sung Chang , Chun-Wen Cheng , Alex Kalnitsky , Chia-Hua Chu
IPC: H01L23/48 , H01L25/065 , H01L23/00
CPC classification number: H01L24/09 , H01L21/76898 , H01L23/481 , H01L23/64 , H01L24/08 , H01L24/13 , H01L24/16 , H01L24/24 , H01L24/80 , H01L24/81 , H01L24/82 , H01L24/83 , H01L24/92 , H01L25/0657 , H01L25/16 , H01L25/50 , H01L2224/0401 , H01L2224/05548 , H01L2224/05567 , H01L2224/08145 , H01L2224/13022 , H01L2224/13124 , H01L2224/13147 , H01L2224/24011 , H01L2224/24051 , H01L2224/24105 , H01L2224/24145 , H01L2224/80896 , H01L2224/81 , H01L2224/821 , H01L2224/9202 , H01L2224/9212 , H01L2225/06513 , H01L2225/06541 , H01L2225/06544 , H01L2225/06565 , H01L2924/00014 , H01L2924/01322 , H01L2924/1205 , H01L2924/1305 , H01L2924/13091 , H01L2924/15787 , H01L2924/00 , H01L2224/82 , H05K3/4661 , H01L2224/05552 , H01L2224/8203 , H01L2224/80001
Abstract: The present disclosure provides one embodiment of a stacked semiconductor device. The stacked semiconductor device includes a first substrate; a first bond pad over the first substrate; a second substrate including a second electrical device fabricated thereon; a second bond pad over the second electrical device over the second substrate, the second bond pad electrically connecting to the second electrical device; a second insulation layer over the second bond pad having a top surface, the second insulation layer being bonded toward the first bond pad of the first substrate; and a through-substrate-via (“TSV”) extending from a surface opposite to the first bond pad through the first substrate and through the top surface of the second insulation layer to the second bond pad.
Abstract translation: 本公开提供了堆叠半导体器件的一个实施例。 叠层半导体器件包括第一衬底; 第一衬底上的第一接合焊盘; 第二基板，包括在其上制造的第二电气装置; 在所述第二基板上方的所述第二电气装置上的第二接合焊盘，所述第二接合焊盘电连接到所述第二电气装置; 所述第二接合焊盘上的第二绝缘层具有顶表面，所述第二绝缘层朝向所述第一基板的所述第一接合焊盘接合; 以及从第一接合焊盘相反的表面穿过第一基板延伸并穿过第二绝缘层的顶表面延伸到第二接合焊盘的贯通基板通孔（“TSV”）。
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公开(公告)号：US20140264661A1
公开(公告)日：2014-09-18
申请号：US13893058
申请日：2013-05-13
Inventor： Chun-Wen Cheng , Chia-Hua Chu
CPC classification number: B81B7/04 , B81B7/0032 , B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2201/0257 , B81B2201/0264 , B81C1/00293 , B81C1/00309 , B81C3/001 , B81C2203/0118
Abstract: Embodiments of the present disclosure include MEMS devices and methods for forming MEMS devices. An embodiment is a method for forming a microelectromechanical system (MEMS) device, the method including forming a MEMS wafer having a first cavity, the first cavity having a first pressure, and bonding a carrier wafer to a first side of the MEMS wafer, the bonding forming a second cavity, the second cavity having a second pressure, the second pressure being greater than the first pressure. The method further includes bonding a cap wafer to a second side of the MEMS wafer, the second side being opposite the first side, the bonding forming a third cavity, the third cavity having a third pressure, the third pressure being greater than the first pressure and less than the second pressure.
Abstract translation: 本公开的实施例包括MEMS器件和用于形成MEMS器件的方法。 一个实施例是用于形成微机电系统（MEMS）装置的方法，该方法包括形成具有第一腔的MEMS晶片，第一腔具有第一压力，并将载体晶片接合到MEMS晶片的第一侧， 接合形成第二腔，所述第二腔具有第二压力，所述第二压力大于所述第一压力。 该方法还包括将盖晶片接合到MEMS晶片的第二侧，第二侧与第一侧相对，接合形成第三腔，第三腔具有第三压力，第三压力大于第一压力 并且小于第二压力。
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Patent Agency Ranking
86.发明申请公开(公告)号：US20140264474A1
公开(公告)日：2014-09-18
申请号：US13906080
申请日：2013-05-30
Inventor： Chia-Hua Chu , Chun-Wen Cheng
IPC: H01L25/065 , H01L25/00
CPC classification number: B81B7/0041 , B81C1/00158 , B81C1/00238 , B81C1/00301 , B81C2201/019 , B81C2203/00 , B81C2203/0714 , B81C2203/0792 , H01L23/10 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/83 , H01L25/50 , H01L2224/04026 , H01L2224/2745 , H01L2224/27452 , H01L2224/27831 , H01L2224/29011 , H01L2224/291 , H01L2224/29124 , H01L2224/29147 , H01L2224/32145 , H01L2224/83805 , H01L2224/8382 , H01L2924/01322 , H01L2924/1461 , H01L2924/00014 , H01L2924/00
Abstract: A stacked semiconductor device includes a CMOS device and a MEMS device. The CMOS device includes a multilayer interconnect with metal elements disposed over the multilayer interconnect. The MEMS device includes metal sections with a first dielectric layer disposed over the metal sections. A cavity in the first dielectric layer exposes portions of the metal sections. A dielectric stop layer is disposed at least over the interior surface of the cavity. A movable structure is disposed over a front surface of the first dielectric layer and suspending over the cavity. The movable structure includes a second dielectric layer over the front surface of the first dielectric layer and suspending over the cavity, metal features over the second dielectric layer, and a flexible dielectric membrane over the metal features. The CMOS device is bonded to the MEMS device with the metal elements toward the flexible dielectric membrane.
Abstract translation: 叠层半导体器件包括CMOS器件和MEMS器件。 CMOS器件包括多层互连，金属元件设置在多层互连上。 MEMS器件包括具有设置在金属部分上方的第一介电层的金属部分。 第一电介质层中的空腔露出金属部分的部分。 电介质停止层至少设置在空腔的内表面上方。 可移动结构设置在第一介电层的前表面上并且悬挂在空腔上。 可移动结构包括在第一电介质层的前表面上并悬挂在空腔上的第二电介质层，在第二介电层上方的金属特征以及金属特征上的柔性介电膜。 CMOS器件通过金属元件接合到MEMS器件朝向柔性介电膜。
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87.发明申请Dual Layer Microelectromechanical Systems Device and Method of Manufacturing Same 有权双层微机电系统设备及其制造方法相同公开(公告)号：US20140206123A1
公开(公告)日：2014-07-24
申请号：US13749033
申请日：2013-01-24
Inventor： Chia-Hua Chu , Te-Hao Lee , Jiou-Kang Lee , Kai-Chih Liang , Chung-Hsien Lin , Chun-wen Cheng
IPC: B81C1/00
CPC classification number: B81C1/00269 , B81B2201/0235 , B81B2201/0242 , B81B2201/0257 , B81B2203/0307 , B81B2207/012 , B81C1/00039 , B81C1/00261 , B81C2203/035
Abstract: Exemplary microelectromechanical system (MEMS) devices, and methods for fabricating such are disclosed. An exemplary method includes providing a silicon-on-insulator (SOI) substrate, wherein the SOI substrate includes a first silicon layer separated from a second silicon layer by an insulator layer; processing the first silicon layer to form a first structure layer of a MEMS device; bonding the first structure layer to a substrate; and processing the second silicon layer to form a second structure layer of the MEMS device.
Abstract translation: 公开了示例性微机电系统（MEMS）装置及其制造方法。 一种示例性方法包括提供绝缘体上硅（SOI）衬底，其中SOI衬底包括通过绝缘体层与第二硅层分离的第一硅层; 处理所述第一硅层以形成MEMS器件的第一结构层; 将第一结构层接合到基板上; 以及处理所述第二硅层以形成所述MEMS器件的第二结构层。
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公开(公告)号：US08763220B2
公开(公告)日：2014-07-01
申请号：US13765556
申请日：2013-02-12
Inventor： Tien-Kan Chung , Chung-Hsien Lin , Yao-Te Huang , Chia-Hua Chu , Chia-Ming Hung , Wen-Chuan Tai , Chang-Yi Yang
IPC: H01L41/22 , H01L41/311 , H01L41/113 , H01L41/312 , B81C1/00
CPC classification number: H01L41/311 , B81B3/0021 , B81C1/00 , H01L41/113 , H01L41/1136 , H01L41/1138 , H01L41/22 , H01L41/312 , H02K35/04 , H02N2/186 , Y10T29/42 , Y10T29/49005 , Y10T29/49073 , Y10T29/49075 , Y10T29/49146
Abstract: Provided is a manufacturing method for a micro device. The manufacturing method includes forming a micro-electronic-mechanical system (MEMS) movable structure, forming a plurality of metal loops over the MEMS movable structure, forming a piezoelectric element over the MEMS movable structure, and a magnet disposed over the plurality of metal loops. The method also includes encapsulating the MEMS movable structure, the plurality of metal loops, and the piezoelectric element.
Abstract translation: 提供了一种微型器件的制造方法。 制造方法包括形成微电子机械系统（MEMS）可移动结构，在MEMS可移动结构上形成多个金属环，在MEMS可移动结构上形成压电元件，以及设置在多个金属环上的磁体 。 该方法还包括封装MEMS可移动结构，多个金属环和压电元件。
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公开(公告)号：US20130285170A1
公开(公告)日：2013-10-31
申请号：US13929623
申请日：2013-06-27
Inventor： Chung-Hsien Lin , Chia-Hua Chu , Li-Cheng Chu , Yuan-Chih Hsieh , Chun-Wen Cheng
IPC: B81B7/00
CPC classification number: B81B7/0032 , B81B2207/092 , B81C1/00269 , B81C1/00357 , B81C2203/0109 , B81C2203/0792 , H01L2924/0002 , H01L2924/00
Abstract: A MEMS device is described. The device includes a micro-electro-mechanical systems (MEMS) substrate including a first bonding layer, a semiconductor substrate including a second bonding layer, and a cap including a third bonding layer, the cap coupled to the semiconductor substrate by bonding the second bonding layer to the third bonding layer. The first bonding layer includes silicon, the semiconductor substrate is electrically coupled to the MEMS substrate by bonding the first bonding layer to the second bonding layer, and the MEMS substrate is hermetically sealed between the cap and the semiconductor substrate.
Abstract translation: 描述了MEMS器件。 该装置包括微电子机械系统（MEMS）基板，其包括第一接合层，包括第二接合层的半导体基板和包括第三接合层的盖，所述盖通过接合第二接合 层到第三粘合层。 第一结合层包括硅，半导体衬底通过将第一结合层结合到第二结合层而电耦合到MEMS衬底，并且MEMS衬底气密地密封在帽和半导体衬底之间。
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公开(公告)号：US20130126989A1
公开(公告)日：2013-05-23
申请号：US13721734
申请日：2012-12-20
Inventor： Chung-Hsien Lin , Chun-Wen Cheng , Chia-Hua Chu , Yi Heng Tsai
IPC: H01L29/84
CPC classification number: H01L29/84 , B81B2203/0109 , B81B2203/0118 , B81B2203/0307 , B81C1/00571
Abstract: A microelectromechanical system (MEMS) device includes a substrate and an oxide layer formed on the substrate. A cavity is etched in the oxide layer. A microstructure device layer is bonded to the oxide layer, over the cavity. The microstructure device layer includes a substantially solid microstructure MEMS device formed in the microstructure device layer and suspended over a portion of the cavity. An anchor is formed in the device layer and configured to support the microstructure device, the anchor having an undercut in the oxide layer. The undercut has a length along the anchor that is less than one-half a length of an outer boundary dimension of the microstructure MEMS device.
Abstract translation: 微机电系统（MEMS）器件包括衬底和形成在衬底上的氧化物层。 在氧化物层中蚀刻空腔。 微结构器件层在空腔上结合到氧化物层。 微结构器件层包括形成在微结构器件层中并悬浮在空腔的一部分上的基本上实心的微结构MEMS器件。 锚固件形成在装置层中并且构造成支撑微结构装置，锚固体在氧化物层中具有底切。 底切部分具有沿着锚固件的长度小于微结构MEMS器件的外边界尺寸的一半长度。
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