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    Nonvolatile memory device and method for driving same
    81.
    发明授权
    Nonvolatile memory device and method for driving same 失效
    非易失存储器件及其驱动方法

    公开(公告)号：US08274822B2

    公开(公告)日：2012-09-25

    申请号：US13018757

    申请日：2011-02-01

    申请人： Takayuki Tsukamoto ,  Yoichi Minemura ,  Natsuki Kikuchi ,  Mitsuru Sato ,  Hiroshi Kanno ,  Takafumi Shimotori

    发明人： Takayuki Tsukamoto ,  Yoichi Minemura ,  Natsuki Kikuchi ,  Mitsuru Sato ,  Hiroshi Kanno ,  Takafumi Shimotori

    IPC分类号： G11C11/00

    CPC分类号： H01L45/04 ,  G11C5/147 ,  G11C13/0007 ,  G11C13/0038 ,  G11C13/0064 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2213/71 ,  G11C2213/72 ,  H01L45/145

    摘要： According to one embodiment, a nonvolatile memory device includes a memory unit and a control unit. The memory unit includes first and second interconnects, and a memory cell. The second interconnect is non-parallel to the first interconnect. The memory cell includes a resistance change layer provided at an intersection between the first and second interconnects. The control unit is connected to the first and second interconnects to supply voltage and current to the resistance change layer. The control unit increases an upper limit of a current supplied to the first interconnect based on a change of a potential of the first interconnect when applying a set operation voltage to the first interconnect in a set operation of changing the resistance change layer from a first state with a first resistance value to a second state with a second resistance value being less than the first resistance value.

    摘要翻译： 根据一个实施例，非易失性存储器件包括存储器单元和控制单元。 存储单元包括第一和第二互连以及存储单元。 第二互连与第一互连不平行。 存储单元包括设置在第一和第二互连之间的交叉点处的电阻变化层。 控制单元连接到第一和第二互连以向电阻变化层提供电压和电流。 控制单元在将电阻变化层从第一状态变化的设定动作中，基于第一配线的电位的变化来增大提供给第一配线的电流的上限， 具有第一电阻值到第二状态，其中第二电阻值小于第一电阻值。

    SEMICONDUCTOR MEMORY DEVICE
    82.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号：US20120012807A1

    公开(公告)日：2012-01-19

    申请号：US13182095

    申请日：2011-07-13

    申请人： Takeshi YAMAGUCHI ,  Hirofumi Inoue ,  Reika Ichihara ,  Takayuki Tsukamoto ,  Takashi Shigeoka ,  Katsuyuki Sekine ,  Shinya Aoki

    发明人： Takeshi YAMAGUCHI ,  Hirofumi Inoue ,  Reika Ichihara ,  Takayuki Tsukamoto ,  Takashi Shigeoka ,  Katsuyuki Sekine ,  Shinya Aoki

    IPC分类号： H01L45/00

    CPC分类号： H01L45/146 ,  H01L27/2409 ,  H01L45/08 ,  H01L45/1233

    摘要： A semiconductor memory device in an embodiment comprises memory cells, each of the memory cells disposed between a first line and a second line and having a variable resistance element and a switching element connected in series. The variable resistance element includes a variable resistance layer configured to change in resistance value thereof between a low-resistance state and a high-resistance state. The variable resistance layer is configured by a transition metal oxide. A ratio of transition metal and oxygen configuring the transition metal oxide varies between 1:1 and 1:2 along a first direction directed from the first line to the second line.

    摘要翻译： 实施例中的半导体存储器件包括存储单元，每个存储单元设置在第一线和第二线之间，并且具有串联连接的可变电阻元件和开关元件。 可变电阻元件包括可变电阻层，其被配置为在低电阻状态和高电阻状态之间改变其电阻值。 可变电阻层由过渡金属氧化物构成。 构成过渡金属氧化物的过渡金属和氧的比例沿着从第一线指向第二线的第一方向在1:1和1:2之间变化。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    83.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
    非易失性半导体存储器件

    公开(公告)号：US20110235401A1

    公开(公告)日：2011-09-29

    申请号：US13052214

    申请日：2011-03-21

    申请人： Tetsuji KUNITAKE ,  Takashi Shigeoka ,  Takayuki Tsukamoto ,  Hironori Wakai ,  Hisashi Kato

    发明人： Tetsuji KUNITAKE ,  Takashi Shigeoka ,  Takayuki Tsukamoto ,  Hironori Wakai ,  Hisashi Kato

    IPC分类号： G11C11/00 ,  H05K13/00

    CPC分类号： H01L27/24 ,  G11C8/08 ,  G11C13/0007 ,  G11C13/0023 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0083 ,  H01L27/1021

    摘要： A nonvolatile semiconductor memory device according to an embodiment herein includes a memory cell array. The memory cell array includes memory cells each provided between a first line and a second line and each including a variable resistor. A control circuit applies through the first and second lines a voltage necessary for a forming operation of the memory cell. A current limiting circuit limits a value of a current flowing across the memory cell during the forming operation to a certain limit value. The control circuit repeats an operation of applying the voltage by setting the limit value to a certain value and an operation of changing the limit value from the certain value, until forming of the memory cell is achieved.

    摘要翻译： 根据本文实施例的非易失性半导体存储器件包括存储单元阵列。 存储单元阵列包括各自设置在第一线路和第二线路之间并且各自包括可变电阻器的存储器单元。 控制电路通过第一和第二行施加存储单元的形成操作所需的电压。 电流限制电路将在成形操作期间流过存储器单元的电流的值限制到某一极限值。 控制电路重复通过将极限值设定为一定值来施加电压的操作和从该特定值改变极限值的操作，直到实现存储单元的形成。

    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
    84.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
    非易失性半导体存储器件

    公开(公告)号：US20110216574A1

    公开(公告)日：2011-09-08

    申请号：US12886931

    申请日：2010-09-21

    申请人： Reika ICHIHARA ,  Takayuki Tsukamoto

    发明人： Reika ICHIHARA ,  Takayuki Tsukamoto

    IPC分类号： G11C11/00

    CPC分类号： G11C11/00 ,  G11C2013/0083

    摘要： A nonvolatile semiconductor memory device in accordance with an embodiment comprises a plurality of first, second lines, a plurality of memory cells, and a control circuit. The plurality of second lines extend so as to intersect the first lines. The plurality of memory cells are disposed at intersections of the first, second lines, and each includes a variable resistor. The control circuit is configured to control a voltage applied to the memory cells. The control circuit applies a first pulse voltage to the variable resistor during a forming operation. In addition, the control circuit applies a second pulse voltage to the variable resistor during a setting operation, the second pulse voltage having a polarity opposite to the first pulse voltage. Furthermore, the control circuit applies a third pulse voltage to the variable resistor during a resetting operation, the third pulse voltage having a polarity identical to the first pulse voltage.

    摘要翻译： 根据实施例的非易失性半导体存储器件包括多个第一，第二线，多个存储单元和控制电路。 多个第二线延伸以与第一线相交。 多个存储单元设置在第一和第二线的交点处，并且每个都包括可变电阻器。 控制电路被配置为控制施加到存储器单元的电压。 控制电路在成形操作期间向可变电阻器施加第一脉冲电压。 此外，控制电路在设定操作期间向可变电阻施加第二脉冲电压，第二脉冲电压具有与第一脉冲电压相反的极性。 此外，控制电路在复位操作期间向可变电阻器施加第三脉冲电压，第三脉冲电压具有与第一脉冲电压相同的极性。

    NON-VOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME
    85.
    发明申请
    NON-VOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US20110073927A1

    公开(公告)日：2011-03-31

    申请号：US12886079

    申请日：2010-09-20

    申请人： Takeshi ARAKI ,  Takeshi Yamaguchi ,  Mariko Hayashi ,  Kohichi Kubo ,  Takayuki Tsukamoto

    发明人： Takeshi ARAKI ,  Takeshi Yamaguchi ,  Mariko Hayashi ,  Kohichi Kubo ,  Takayuki Tsukamoto

    IPC分类号： H01L29/772 ,  H01L21/28

    CPC分类号： G11B9/1472 ,  B82Y10/00 ,  G11B5/746 ,  G11B9/04 ,  G11B9/149 ,  G11C13/0007 ,  G11C2213/56 ,  G11C2213/71 ,  G11C2213/77 ,  H01L27/101 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16 ,  H01L45/1625 ,  H01L45/1675

    摘要： According to one embodiment, a non-volatile memory device includes a stacked structure including a memory portion and an electrode having a surface facing the memory portion; and a voltage application portion to apply a voltage to the memory portion to change resistance. The surface includes first and second regions. The first region contains a first nonmetallic element and at least one element of a metallic element, Si, Ga, and As. The second region contains a second nonmetallic element and the at least one element. The second region has a content ratio of the second nonmetallic element higher than that in the first region. A difference in electronegativity between the second nonmetallic element and the at least one element is greater than that between the first nonmetallic element and the at least one element. At least one of the first and second regions has an anisotropic shape.

    摘要翻译： 根据一个实施例，非易失性存储器件包括堆叠结构，其包括存储器部分和具有面向存储器部分的表面的电极; 以及电压施加部分，用于向存储器部分施加电压以改变电阻。 表面包括第一和第二区域。 第一区域包含第一非金属元素和金属元素Si，Ga和As的至少一种元素。 第二区域包含第二非金属元素和至少一个元素。 第二区域的第二非金属元素的含量比率高于第一区域。 第二非金属元素与至少一种元素之间的电负性的差异大于第一非金属元素与至少一种元素之间的电负性。 第一和第二区域中的至少一个具有各向异性形状。

    INFORMATION RECORDING AND REPRODUCING DEVICE
    86.
    发明申请
    INFORMATION RECORDING AND REPRODUCING DEVICE 有权
    信息记录和复制设备

    公开(公告)号：US20110031459A1

    公开(公告)日：2011-02-10

    申请号：US12886254

    申请日：2010-09-20

    申请人： Kohichi KUBO ,  Chikayoshi Kamata ,  Takayuki Tsukamoto ,  Shinya Aoki ,  Takahiro Hirai ,  Tsukasa Nakai ,  Toshiro Hiraoka

    发明人： Kohichi KUBO ,  Chikayoshi Kamata ,  Takayuki Tsukamoto ,  Shinya Aoki ,  Takahiro Hirai ,  Tsukasa Nakai ,  Toshiro Hiraoka

    IPC分类号： H01L45/00

    CPC分类号： B82Y10/00 ,  G11B9/04 ,  G11B9/1481 ,  G11B9/149 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2213/51 ,  G11C2213/53 ,  G11C2213/55 ,  G11C2213/56 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/75 ,  G11C2213/79 ,  H01L27/101

    摘要： According to one embodiment, an information recording and reproducing device includes a first layer, a second layer and a recording layer. The recording layer is provided between the first layer and the second layer and being capable of reversibly changing between a first state having a first resistance and a second state having a second resistance higher than the first resistance. The recording layer includes a first compound layer and a second compound layer. The first compound layer contains a first compound. The first compound includes a first cation element and a second cation element of a type different from the first cation element. The second compound layer contains a second compound. The second compound includes a transition element having a d-orbital partially filled with electron, and the second compound includes a void site capable of storing at least one of the first cation element and the second cation element.

    摘要翻译： 根据一个实施例，信息记录和再现装置包括第一层，第二层和记录层。 记录层设置在第一层和第二层之间，并且能够在具有第一电阻的第一状态和具有高于第一电阻的第二电阻的第二状态之间可逆地改变。 记录层包括第一化合物层和第二化合物层。 第一化合物层含有第一化合物。 第一化合物包括第一阳离子元件和不同于第一阳离子元件的第二阳离子元件。 第二化合物层含有第二化合物。 第二化合物包括具有部分填充有电子的d轨道的过渡元素，并且第二化合物包括能够存储第一阳离子元件和第二阳离子元素中的至少一种的空隙位置。

    Phase change memory including a plurality of electrically conductive bodies, and manufacturing method thereof
    87.
    发明授权
    Phase change memory including a plurality of electrically conductive bodies, and manufacturing method thereof 有权
    包括多个导电体的相变存储器及其制造方法

    公开(公告)号：US07883930B2

    公开(公告)日：2011-02-08

    申请号：US12184428

    申请日：2008-08-01

    申请人： Takayuki Tsukamoto ,  Katsuyuki Naito ,  Sumio Ashida

    发明人： Takayuki Tsukamoto ,  Katsuyuki Naito ,  Sumio Ashida

    IPC分类号： H01L21/00

    CPC分类号： H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/144 ,  H01L45/16 ,  Y10S438/90

    摘要： A phase change memory including at least a storage cell which includes a first electrode, an electrically conductive portion provided on the first electrode and having at least two electrically conductive bodies with approximately the same shape provided on the first electrode, the electrically conductive bodies being spaced by a high resistance film with a high resistance, a recording layer provided on the electrically conductive portion and having phase change material which can change between a first phase state with a first specific resistance and a second phase state with a second specific resistance different from the first specific resistance, and a second electrode provided on the recording layer.

    摘要翻译： 一种相变存储器，至少包括存储单元，该存储单元包括第一电极，设置在第一电极上的导电部分，并且具有设置在第一电极上的具有大致相同形状的至少两个导电体，导电体间隔开 通过具有高电阻的高电阻膜，设置在导电部分上并具有相变材料的记录层，其可以在具有第一电阻率的第一相位状态和第二相位状态之间变化，具有不同于第二电阻率的第二电阻率 第一电阻率和设置在记录层上的第二电极。

    Phase change memory and manufacturing method thereof
    89.
    发明申请
    Phase change memory and manufacturing method thereof 审中-公开
    相变记忆及其制造方法

    公开(公告)号：US20060261379A1

    公开(公告)日：2006-11-23

    申请号：US11272751

    申请日：2005-11-15

    申请人： Takayuki Tsukamoto ,  Katsuyuki Naito ,  Sumio Ashida

    发明人： Takayuki Tsukamoto ,  Katsuyuki Naito ,  Sumio Ashida

    IPC分类号： H01L29/768

    CPC分类号： H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/1273 ,  H01L45/144 ,  H01L45/16 ,  Y10S438/90

    摘要： Even if sizes of storage cells are reduced in a phase change memory, properties of the respective storage cells can be set to be approximately equal to one another and a current amount required for phase change can be reduced sufficiently. The phase change memory includes at least a storage cell. The storage cell includes a first electrode, an electrically conductive portion provided on the first electrode and having at least two electrically conductive bodies with approximately the same shape provided on the first electrode, the electrically conductive bodies being spaced by a high resistance film with a high resistance, a recording layer provided on the electrically conductive portion and having phase change material which can change between a first phase state with a first specific resistance and a second phase state with a second specific resistance different from the first specific resistance, and a second electrode provided on the recording layer.

    摘要翻译： 即使存储单元的尺寸在相变存储器中减少，各个存储单元的特性可以被设置为大致相等，并且可以充分地减少相变所需的电流量。 相变存储器至少包括存储单元。 存储单元包括第一电极，设置在第一电极上的导电部分，并且具有至少两个导电体，其具有设置在第一电极上的大致相同的形状，导电体由高电阻膜隔开，高电阻 电阻，设置在导电部分上并具有能够在具有第一电阻率的第一相位状态与第二相位状态之间变化的相变材料的记录层，其具有不同于第一电阻率的第二电阻率;以及第二电极 提供在记录层上。