公开(公告)号：US5157675A

公开(公告)日：1992-10-20

申请号：US813003

申请日：1991-12-24

申请人： Takeshi Takagi

发明人： Takeshi Takagi

IPC分类号： G02F3/02 ,  H01L33/06 ,  H01L33/30 ,  H01L33/38 ,  H01L33/40 ,  H01S5/042 ,  H01S5/06 ,  H01S5/062 ,  H01S5/223 ,  H01S5/34 ,  H03K19/14

CPC分类号： H01L33/40 ,  B82Y20/00 ,  G02F3/026 ,  H01S5/0601 ,  H01S5/34 ,  H03K19/14 ,  H01L33/06 ,  H01L33/30 ,  H01L33/38 ,  H01S5/0425 ,  H01S5/06 ,  H01S5/0602 ,  H01S5/06213 ,  H01S5/0622 ,  H01S5/06243 ,  H01S5/2231

摘要： Disclosed is an apparatus utilizing a light emitting semiconductor device which has a pumped region and an unpumped absorber region and in which an active layer has a quantum well structure. In this light emitting semiconductor device, driving current/light output characteristics have dependence on the pulse width of a driving current. A logic unit or a noise reducing apparatus is realized utilizing this property. Furthermore, in the above described light emitting semiconductor device, the central wavelength of emitted light has dependence on a driving current or dependence on driving time. A light beam scanner can be realized utilizing this property.

公开(公告)号：US4275862A

公开(公告)日：1981-06-30

申请号：US55072

申请日：1979-07-05

申请人： Takeshi Takagi ,  Tokushi Abo

发明人： Takeshi Takagi ,  Tokushi Abo

IPC分类号： H05K5/02 ,  A45D27/29 ,  A47K1/00 ,  A47K1/09 ,  B26B19/48 ,  F16M13/02 ,  F16M13/00

CPC分类号： A45D27/29

摘要： A foldable wall hanging holder for electric shaver comprises an integral plate of a synthetic resin which is foldably or bendably divided into fixing, holding and bracing plate parts respectively by means of first and second hinge parts. The respective plate parts are bent at the hinge parts to form a right-angled triangle, with the holding plate part braced by the bracing plate part at right angles with respect to the fixing plate part to be fixed to a wall surface or the like, for holding the shaver in a hole of the holding part and in an aperture of the bracing plate part aligned with the hole.

摘要翻译： 一种用于电动剃须刀的可折叠壁挂架包括合成树脂的整体板，其通过第一和第二铰链部分分别可折叠地或可弯曲地分成固定，保持和支撑板部件。 相应的板部分在铰链部分处弯曲以形成直角三角形，其中支撑板部分由相对于固定板部分成直角的支撑板部分支撑以固定到壁表面等， 用于将剃须刀保持在保持部分的孔中并且在与孔对准的支撑板部分的孔中。

公开(公告)号：USD250212S

公开(公告)日：1978-11-07

申请号：US806228

申请日：1977-06-13

申请人： Takeshi Takagi ,  Hisatane Ohi ,  Yoshio Mizobata

设计人： Takeshi Takagi ,  Hisatane Ohi ,  Yoshio Mizobata

公开(公告)号：US09310342B2

公开(公告)日：2016-04-12

申请号：US13122602

申请日：2009-10-06

申请人： Toshikatsu Sakai ,  Akira Sezaki ,  Takeshi Takagi ,  Takuya Yotani ,  Makoto Takahara ,  Takayuki Oka

发明人： Toshikatsu Sakai ,  Akira Sezaki ,  Takeshi Takagi ,  Takuya Yotani ,  Makoto Takahara ,  Takayuki Oka

IPC分类号： G01N30/24 ,  G01N30/26 ,  G01N30/20 ,  G01N30/88 ,  B01D15/16 ,  G01N30/74

CPC分类号： G01N30/24 ,  B01D15/16 ,  G01N30/26 ,  G01N30/34 ,  G01N30/74 ,  G01N2030/201 ,  G01N2030/202 ,  G01N2030/207 ,  G01N2030/8822

摘要： A liquid chromatography apparatus is provided with a sample preparation unit, a column that separates components of a sample, an eluent supplier that includes a feeder for supplying eluents to the column, a flow path directional valve capable of introducing fixed amounts of the sample and the eluents to the column, an analyzer for analyzing a test solution composed of the sample components separated by the column and one of the eluents, and a controller, wherein the eluent supplier supplies the eluents to the flow path directional valve in an unmixed state. As a result of employing this configuration, analysis time is shortened and eluent consumption is reduced.

摘要翻译： 液相色谱装置具有样品制备单元，分离样品组分的柱，包括用于向柱供给洗脱液的供给器的洗脱液供给器，能够引入固定量的样品的流路切换阀和 用于分析由柱分离的样品组分和洗脱液之一组成的测试溶液的分析器和控制器，其中洗脱剂供体以未混合的状态将洗脱液供应到流路换向阀。 由于采用这种结构，分析时间缩短，洗脱液消耗减少。

公开(公告)号：US20140061579A1

公开(公告)日：2014-03-06

申请号：US13995383

申请日：2012-10-22

申请人： Zhiqiang Wei ,  Takeshi Takagi ,  Koji Katayama

发明人： Zhiqiang Wei ,  Takeshi Takagi ,  Koji Katayama

IPC分类号： H01L45/00 ,  H01L27/24

CPC分类号： H01L45/145 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2013/0083 ,  G11C2213/15 ,  H01L27/101 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/146 ,  H01L45/1625

摘要： A variable resistance nonvolatile memory element includes a first electrode, a second electrode, and a variable resistance layer including: a first oxide layer including a metal oxide having non-stoichiometric composition and including p-type carriers; a second oxide layer located between and in contact with the first oxide layer and a second electrode and including a metal oxide having non-stoichiometric composition and including n-type carriers; an oxygen reservoir region located in the first oxide layer, having no contact with the first electrode, and having an oxygen content atomic percentage higher than that of the first oxide layer; and a local region located in the second oxide layer, having contact with the oxygen reservoir region, and having an oxygen content atomic percentage lower than that of the second oxide layer.

摘要翻译： 可变电阻非易失性存储元件包括第一电极，第二电极和可变电阻层，包括：包含具有非化学计量组成的金属氧化物并包括p型载流子的第一氧化物层; 位于第一氧化物层之间并与第一氧化物层接触的第二氧化物层和第二电极，并且包括具有非化学计量组成并包括n型载体的金属氧化物; 位于所述第一氧化物层中的与第一电极没有接触并且氧含量原子百分比高于第一氧化物层的氧储存区; 以及位于所述第二氧化物层中的与氧储存区接触并且氧含量原子百分比低于第二氧化物层的原子百分比的局部区域。

公开(公告)号：US08619460B2

公开(公告)日：2013-12-31

申请号：US13509616

申请日：2011-10-26

申请人： Yoshihiko Kanzawa ,  Takeshi Takagi

发明人： Yoshihiko Kanzawa ,  Takeshi Takagi

IPC分类号： G11C11/00

CPC分类号： G11C13/0007 ,  G11C13/0033 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2013/0076 ,  G11C2213/56 ,  G11C2213/76

摘要： A nonvolatile memory device (800) includes a variable resistance nonvolatile memory element (100) and a control circuit (810). The control circuit (810) determines whether a resistance value of the nonvolatile memory element (100) in a high resistance state is equal to or greater than a predetermined threshold value. Moreover, if the resistance value of the nonvolatile memory element (100) in the high resistance state is smaller than the threshold value, the control circuit (810) applies a first voltage (VL1) to the nonvolatile memory element (100) to change a resistance state of the nonvolatile memory element (100) from the high resistance state to the low resistance state. Moreover, if the resistance value of the nonvolatile memory element (100) in the high resistance state is equal to or greater than the threshold value, the control circuit (810) applies to the nonvolatile memory element (100) a second voltage (VL2) an absolute value of which is smaller an absolute value of the first voltage (VL1) to change the resistance state of the nonvolatile memory element (100) from the high resistance state to the low resistance state.

摘要翻译： 非易失性存储器件（800）包括可变电阻非易失性存储元件（100）和控制电路（810）。 控制电路（810）确定高电阻状态下的非易失性存储元件（100）的电阻值是否等于或大于预定阈值。 此外，如果高电阻状态下的非易失性存储元件（100）的电阻值小于阈值，则控制电路（810）向非易失性存储元件（100）施加第一电压（VL1） 非易失性存储元件（100）从高电阻状态到低电阻状态的电阻状态。 此外，如果高电阻状态下的非易失性存储元件（100）的电阻值为阈值以上，则控制电路（810）向非易失性存储元件（100）施加第二电压（VL2） 其绝对值对于将非易失性存储元件（100）的电阻状态从高电阻状态改变为低电阻状态的第一电压（VL1）的绝对值较小。

公开(公告)号：US08559205B2

公开(公告)日：2013-10-15

申请号：US13563321

申请日：2012-07-31

申请人： Takumi Mikawa ,  Takeshi Takagi

发明人： Takumi Mikawa ,  Takeshi Takagi

IPC分类号： G11C17/00

CPC分类号： H01L27/101 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/72 ,  G11C2213/73 ,  H01L27/0688 ,  H01L27/112 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1683

摘要： A nonvolatile semiconductor memory apparatus including a substrate, lower-layer electrode wires provided on the substrate, an interlayer insulating layer provided with contact holes at locations respectively opposite to the lower-layer electrode wires, resistance variable layers which are respectively connected to the lower-layer electrode wires; and non-ohmic devices which are respectively provided on the resistance variable layers. The non-ohmic devices each has a laminated-layer structure including plural semiconductor layers, a laminated-layer structure including a metal electrode layer and an insulator layer, or a laminated-layer structure including a metal electrode layer and a semiconductor layer. One layer of the laminated-layer structure is embedded to fill each of the contact holes and the semiconductor layer or the insulator layer which is the other layer of the laminated-layer structure has a larger area than an opening of each of the contact holes and is provided on the interlayer insulating layer.

摘要翻译： 一种非易失性半导体存储装置，包括基板，设置在基板上的下层电极布线，在与下层电极布线分别相对的位置设置有接触孔的层间绝缘层，分别与下层电极布线连接的电阻变化层， 层电极线; 以及分别设置在电阻变化层上的非欧姆器件。 非欧姆性器件各自具有包括多个半导体层的层压层结构，包括金属电极层和绝缘体层的层叠层结构，或者包括金属电极层和半导体层的层叠结构。 嵌入层叠层结构的一层以填充每个接触孔，作为层叠层结构的另一层的半导体层或绝缘体层的面积比每个接触孔的开口大， 设置在层间绝缘层上。

公开(公告)号：US08395930B2

公开(公告)日：2013-03-12

申请号：US13596154

申请日：2012-08-28

申请人： Shunsaku Muraoka ,  Takeshi Takagi ,  Satoru Mitani ,  Koji Katayama

发明人： Shunsaku Muraoka ,  Takeshi Takagi ,  Satoru Mitani ,  Koji Katayama

IPC分类号： G11C11/21

CPC分类号： G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/72 ,  G11C2213/79 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

摘要： A method includes applying a first polarity writing voltage pulse to a metal oxide layer to change its resistance state from high to low into a write state, applying a second polarity erasing voltage pulse different from the first polarity to the metal oxide layer to change its resistance state from low to high into an erase state, and applying an initial voltage pulse having the second polarity to the metal oxide layer before first application of the writing voltage pulse, to change an initial resistance value of the metal oxide layer. R0>RH>RL and |V0|>|Ve|≧|Vw| are satisfied where R0, RL, and RH are the resistance values of the initial, write, and erase states, respectively, of the metal oxide layer, and V0, Vw, and Ve are voltage values of the initial, writing, and erasing voltage pulses, respectively.

摘要翻译： 一种方法包括：将第一极性写入电压脉冲施加到金属氧化物层，以将其电阻状态从高变为低电平变为写入状态，将不同于第一极性的第二极性擦除电压脉冲施加到金属氧化物层以改变其电阻 状态从低到高进入擦除状态，以及在首次施加写入电压脉冲之前将具有第二极性的初始电压脉冲施加到金属氧化物层，以改变金属氧化物层的初始电阻值。 R0> RH> RL和| V0 |> | Ve |≥| Vw | 满足R0，RL和RH分别是金属氧化物层的初始，写入和擦除状态的电阻值，V0，Vw和Ve是初始，写入和擦除电压的电压值 脉冲。

公开(公告)号：US20130037775A1

公开(公告)日：2013-02-14

申请号：US13567646

申请日：2012-08-06

申请人： Satoru Mitani ,  Yoshihiko Kanzawa ,  Koji Katayama ,  Takeshi Takagi

发明人： Satoru Mitani ,  Yoshihiko Kanzawa ,  Koji Katayama ,  Takeshi Takagi

IPC分类号： H01L45/00 ,  H01L21/02

CPC分类号： G11C13/0069 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/71 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

摘要： A nonvolatile memory element of the present invention comprises a first electrode (103), a second electrode (108); a resistance variable layer (107) which is interposed between the first electrode (103) and the second electrode (107) and is configured to switch a resistance value reversibly in response to an electric signal applied between the electrodes (103) and (108), and the resistance variable layer (107) has at least a multi-layer structure in which a first hafnium-containing layer having a composition expressed as HfOx (0.9≦x≦1.6), and a second hafnium-containing layer having a composition expressed as HfOy (1.8≦y≦2.0) are stacked together.

摘要翻译： 本发明的非易失性存储元件包括第一电极（103），第二电极（108） 介于第一电极（103）和第二电极（107）之间的电阻变化层（107），其被配置成响应于施加在电极（103）和（108）之间的电信号可逆地切换电阻值， ，并且电阻变化层（107）具有至少多层结构，其中具有表示为HfO x（0.9＆nlE; x＆nlE; 1.6）的组成的第一含铪层和具有组成的第二含铪层 表示为HfOy（1.8＆nlE; y＆nlE; 2.0）堆叠在一起。

公开(公告)号：US20130010522A1

公开(公告)日：2013-01-10

申请号：US13509616

申请日：2011-10-26

申请人： Yoshihiko Kanzawa ,  Takeshi Takagi

发明人： Yoshihiko Kanzawa ,  Takeshi Takagi

IPC分类号： G11C11/00

CPC分类号： G11C13/0007 ,  G11C13/0033 ,  G11C13/004 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2013/0076 ,  G11C2213/56 ,  G11C2213/76

摘要： A nonvolatile memory device (800) includes a variable resistance nonvolatile memory element (100) and a control circuit (810). The control circuit (810) determines whether a resistance value of the nonvolatile memory element (100) in a high resistance state is equal to or greater than a predetermined threshold value. Moreover, if the resistance value of the nonvolatile memory element (100) in the high resistance state is smaller than the threshold value, the control circuit (810) applies a first voltage (VL1) to the nonvolatile memory element (100) to change a resistance state of the nonvolatile memory element (100) from the high resistance state to the low resistance state. Moreover, if the resistance value of the nonvolatile memory element (100) in the high resistance state is equal to or greater than the threshold value, the control circuit (810) applies to the nonvolatile memory element (100) a second voltage (VL2) an absolute value of which is smaller an absolute value of the first voltage (VL1) to change the resistance state of the nonvolatile memory element (100) from the high resistance state to the low resistance state.

摘要翻译： 非易失性存储器件（800）包括可变电阻非易失性存储元件（100）和控制电路（810）。 控制电路（810）确定高电阻状态下的非易失性存储元件（100）的电阻值是否等于或大于预定阈值。 此外，如果高电阻状态下的非易失性存储元件（100）的电阻值小于阈值，则控制电路（810）向非易失性存储元件（100）施加第一电压（VL1） 非易失性存储元件（100）从高电阻状态到低电阻状态的电阻状态。 此外，如果高电阻状态下的非易失性存储元件（100）的电阻值为阈值以上，则控制电路（810）向非易失性存储元件（100）施加第二电压（VL2） 其绝对值对于将非易失性存储元件（100）的电阻状态从高电阻状态改变为低电阻状态的第一电压（VL1）的绝对值较小。