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公开(公告)号：US20160111347A1
公开(公告)日：2016-04-21
申请号：US14984519
申请日：2015-12-30
申请人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
发明人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
IPC分类号： H01L23/31 , H01L23/538
CPC分类号： H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.
摘要翻译： 提供半导体封装及其制造方法。 封装基板包括孔，其可用于形成没有任何空隙的模具层。 可以部分去除模具层以暴露下部导电图案。 因此，可以提高焊球的布线性。
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公开(公告)号：US09252095B2
公开(公告)日：2016-02-02
申请号：US13922722
申请日：2013-06-20
申请人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
发明人： Jongkook Kim , Su-min Park , Soojeoung Park , Bona Baek , Hohyeuk Im , Byoungwook Jang , Yoonha Jung
IPC分类号： H01L23/498 , H01L21/56 , H01L23/00 , H01L23/13 , H01L25/065 , H01L25/10 , H01L23/31
CPC分类号： H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.
摘要翻译： 提供半导体封装及其制造方法。 封装基板包括孔，其可用于形成没有任何空隙的模具层。 可以部分去除模具层以暴露下部导电图案。 因此，可以提高焊球的布线性。
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3.发明申请SEMICONDUCTOR PACKAGES HAVING SEMICONDUCTOR CHIPS DISPOSED IN OPENING IN SHIELDING CORE PLATE 有权在屏蔽核心板中打开半导体芯片的半导体封装公开(公告)号：US20150028477A1
公开(公告)日：2015-01-29
申请号：US14283828
申请日：2014-05-21
申请人： Yoonha Jung , Jongkook Kim , Bona Baek , Heeseok Lee , Kyoungsei Choi
发明人： Yoonha Jung , Jongkook Kim , Bona Baek , Heeseok Lee , Kyoungsei Choi
CPC分类号： H01L23/5389 , H01L23/3114 , H01L23/49816 , H01L23/49822 , H01L23/5383 , H01L23/5384 , H01L23/5386 , H01L23/552 , H01L24/13 , H01L24/16 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/83 , H01L25/105 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/3224 , H01L2224/32245 , H01L2224/33181 , H01L2224/48091 , H01L2224/48105 , H01L2224/48227 , H01L2224/49113 , H01L2224/73204 , H01L2224/73215 , H01L2224/73253 , H01L2224/73265 , H01L2224/83101 , H01L2224/83424 , H01L2224/83444 , H01L2224/83447 , H01L2224/83455 , H01L2224/83471 , H01L2224/8385 , H01L2225/0651 , H01L2225/1035 , H01L2225/1058 , H01L2924/00014 , H01L2924/15153 , H01L2924/15311 , H01L2924/181 , H01L2924/014 , H01L2924/0665 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package includes a first plate having a through hole therein, at least one interconnection layer disposed on a first surface of the first plate, and at least one semiconductor chip disposed on the at least one interconnection layer in a space defined by the through hole and electrically connected to the least one interconnection layer. The package further includes a second plate disposed on the at least one semiconductor chip and a second surface of the first plate on a side of the first plate opposite the first surface, and at least one conductive pad disposed on the second surface of the first plate and electrically connected to the at least one interconnection layer.
摘要翻译： 半导体封装包括其中具有通孔的第一板，设置在第一板的第一表面上的至少一个互连层，以及至少一个半导体芯片，该半导体芯片设置在由通孔限定的空间中的至少一个互连层上 并且电连接到所述至少一个互连层。 所述封装还包括设置在所述至少一个半导体芯片上的第二板和所述第一板的与所述第一表面相对的一侧上的所述第一板的第二表面，以及设置在所述第一板的第二表面上的至少一个导电垫 并且电连接到所述至少一个互连层。
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公开(公告)号：US20140008795A1
公开(公告)日：2014-01-09
申请号：US13922722
申请日：2013-06-20
申请人： Jongkook KIM , Su-min PARK , Soojeoung PARK , Bona BAEK , Hohyeuk IM , Byoungwook JANG , Yoonha JUNG
发明人： Jongkook KIM , Su-min PARK , Soojeoung PARK , Bona BAEK , Hohyeuk IM , Byoungwook JANG , Yoonha JUNG
IPC分类号： H01L23/498 , H01L21/56
CPC分类号： H01L23/3107 , H01L21/56 , H01L21/561 , H01L21/565 , H01L23/13 , H01L23/3128 , H01L23/49811 , H01L23/49816 , H01L23/5386 , H01L24/97 , H01L25/0657 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/0651 , H01L2225/06517 , H01L2225/06558 , H01L2225/1023 , H01L2225/1058 , H01L2225/1076 , H01L2924/12042 , H01L2924/15151 , H01L2924/15311 , H01L2924/181 , H01L2924/18301 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2924/00 , H01L2924/00012
摘要： Provided are a semiconductor package and a method of fabricating the same. The package substrate includes a hole, which may be used to form a mold layer without any void. The mold layer may be partially removed to expose a lower conductive pattern. Accordingly, it is possible to improve routability of solder balls.
摘要翻译： 提供半导体封装及其制造方法。 封装基板包括孔，其可用于形成没有任何空隙的模具层。 可以部分去除模具层以暴露下部导电图案。 因此，可以提高焊球的布线性。
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