Method of applying a marker element to an implant and an implant provided with a marker element
    3.
    发明授权
    Method of applying a marker element to an implant and an implant provided with a marker element 有权
    将标记元件施加到植入物和具有标记元件的植入物的方法

    公开(公告)号:US06899914B2

    公开(公告)日:2005-05-31

    申请号:US10021899

    申请日:2001-12-13

    发明人: Max Schaldach

    摘要: A method of applying a marker element (6; 6′; 6″; 25; 25′; 26; 28) to an implant (1; 1′; 1″; 1′″; 20; 20′), in particular a stent, intended for implantation in the human or animal body, comprising a main body and an opening (3; 3′; 3″; 3′″; 21; 21′) provided in said main body (2; 2′; 2″; 2′″; 22; 22′) for receiving the marker element (6; 6′; 6″; 25; 25′; 26; 28), wherein to form at least a part of the marker element (6; 6′; 6″; 25; 25′; 26; 28) a hardenable material or material mix is introduced into the opening and hardened therein.

    摘要翻译: 一种将标记元件(6; 6'; 6“; 25; 25'; 26; 28)施加到植入物(1; 1'; 1”; 1“; 20; 20')上的方法, 特别是用于植入人体或动物体内的支架,包括主体和设置在所述主体中的开口(3; 3'; 3“; 3”; 21; 21')。 2'; 2“; 2”'; 22; 22'),用于接收标记元件(6; 6'; 6“; 25; 25'; 26; 28),其中形成至少一部分 将可硬化材料或材料混合物的标记元件(6; 6'; 6“; 25; 25'; 26; 28)引入开口中并在其中硬化。

    Power semiconductor component and process for its manufacture
    7.
    发明授权
    Power semiconductor component and process for its manufacture 失效
    功率半导体元件及其制造工艺

    公开(公告)号:US4596999A

    公开(公告)日:1986-06-24

    申请号:US592280

    申请日:1984-03-22

    CPC分类号: H01L29/744 H01L29/7392

    摘要: A power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first and second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. The invention further includes a process for manufacturing the component, wherein the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.

    摘要翻译: 提出了具有这种类型的部件的功率半导体部件,其具有至少三个连续的层并且具有高电流容量和小的功率损耗。 为了接触前两层,该部件具有第一和第二金属化接触平面,其将阶梯状结构压印在部件的第一表面上。 这些台阶的高度在10到20微米之间,宽度在20到300微米之间。 第一接触面的表面积和第二接触面的表面积之间的比率在1和4之间。第一层是重掺杂的,最大厚度为8μm,第二层是轻掺杂的, 最大厚度为40亩。 本发明还包括一种制造该部件的方法,其中根据本发明的表面结构基本上由具有单个铝掩模的反应离子蚀刻工艺制备。

    Collector for an electric machine and method for its production
    9.
    发明授权
    Collector for an electric machine and method for its production 失效
    电机收集器及其生产方法

    公开(公告)号:US4603474A

    公开(公告)日:1986-08-05

    申请号:US611514

    申请日:1984-05-17

    摘要: A collector for electric machines, including a rotationally symmetrical sintered ceramic body and a plurality of radially disposed metallic segments which are separated from each other by one interspace each and which are bonded to the ceramic body via a eutectic intermediate layer. The segments are bonded to the ceramic body in accordance with the eutectic method by being surface-oxidized on their inside narrow side and radially pressed against the ceramic body with the totality being brought to the melting temperature corresponding to the metal/metal-oxide eutectic and subsequently being cooled down again. A preferred embodiment includes: copper segments on an Al.sub.2 O.sub.3 ceramic body.

    摘要翻译: 一种用于电机的收集器,包括旋转对称的烧结陶瓷体和多个径向设置的金属段,它们通过一个间隙彼此分开,并通过共晶中间层结合到陶瓷体。 根据共晶方法,通过在内侧窄面上表面氧化并径向压在陶瓷体上,使陶瓷体结合到陶瓷体上,并将其全部达到对应于金属/金属 - 氧化物共晶的熔融温度, 随后再次冷却。 优选实施方案包括:Al 2 O 3陶瓷体上的铜段。

    Semiconductor gate-controlled high-power capability bipolar device
    10.
    发明授权
    Semiconductor gate-controlled high-power capability bipolar device 失效
    半导体门控大功率双极器件

    公开(公告)号:US5153695A

    公开(公告)日:1992-10-06

    申请号:US581071

    申请日:1990-09-10

    摘要: A gate-turn-off power semiconductor device of the GTO or FCTh type, having a control zone of alternately arranged finely subdivided cathode fingers and gate trenches, wherein the gate trenches are constructed as narrow deep slots, preferably by a crystal-direction-selective wet chemical etching process, while the original substrate surface is retained in the remaining area of the semiconductor substrate. Compared with the conventional "recessed-gate" construction, this quasi-planar construction offers a number of advantages in the electrical behavior, in the integration of auxiliary functions and in the production.

    摘要翻译: 具有GTO或FCTh型的栅极截止功率半导体器件,具有交替排列细分的阴极指状物和栅极沟槽的控制区,其中栅极沟槽被构造为窄的深沟槽,优选地通过晶体方向选择性 湿化学蚀刻工艺,而原始衬底表面保留在半导体衬底的剩余区域中。 与传统的“凹槽”结构相比,这种准平面结构在电气行为,辅助功能的集成和生产中提供了许多优点。