公开(公告)号：US4603474A

公开(公告)日：1986-08-05

申请号：US611514

申请日：1984-05-17

申请人： Jens Gobrecht ,  Claus Schuler

发明人： Jens Gobrecht ,  Claus Schuler

IPC分类号： H02K13/00 ,  H01R43/06 ,  H01R39/04 ,  H02K1/26

CPC分类号： H01R43/06 ,  Y10S228/903 ,  Y10S29/048 ,  Y10T29/49011

摘要： A collector for electric machines, including a rotationally symmetrical sintered ceramic body and a plurality of radially disposed metallic segments which are separated from each other by one interspace each and which are bonded to the ceramic body via a eutectic intermediate layer. The segments are bonded to the ceramic body in accordance with the eutectic method by being surface-oxidized on their inside narrow side and radially pressed against the ceramic body with the totality being brought to the melting temperature corresponding to the metal/metal-oxide eutectic and subsequently being cooled down again. A preferred embodiment includes: copper segments on an Al.sub.2 O.sub.3 ceramic body.

摘要翻译： 一种用于电机的收集器，包括旋转对称的烧结陶瓷体和多个径向设置的金属段，它们通过一个间隙彼此分开，并通过共晶中间层结合到陶瓷体。 根据共晶方法，通过在内侧窄面上表面氧化并径向压在陶瓷体上，使陶瓷体结合到陶瓷体上，并将其全部达到对应于金属/金属 - 氧化物共晶的熔融温度， 随后再次冷却。 优选实施方案包括：Al 2 O 3陶瓷体上的铜段。

公开(公告)号：US4768075A

公开(公告)日：1988-08-30

申请号：US924739

申请日：1986-10-30

申请人： Bruno Broich ,  Jens Gobrecht ,  Peter Roggwiller

发明人： Bruno Broich ,  Jens Gobrecht ,  Peter Roggwiller

IPC分类号： H01L23/32 ,  H01L21/8249 ,  H01L25/18 ,  H01L27/06 ,  H01L25/08

CPC分类号： H01L25/18 ,  H01L24/34 ,  H01L2924/12035 ,  H01L2924/1301 ,  H01L2924/1306 ,  H01L2924/13091

摘要： A power semiconductor module including a cascade circuit of a low-voltage high-current MOSFET and of a bipolar semiconductor element, for example a field-controlled thyristor, GTO thyristor or Darlington transistor, as a hybrid combination. In this manner, it is possible to achieve a construction, which exhibits low induction and which saves space and which at the same time permits efficient cooling of the module.

摘要翻译： 作为混合组合，包括低压大电流MOSFET的级联电路和双极半导体元件的功率半导体模块，例如场控晶闸管，GTO晶闸管或达林顿晶体管。 以这种方式，可以实现具有低感应性并且节省空间并且同时允许模块的有效冷却的结构。

公开(公告)号：US4764249A

公开(公告)日：1988-08-16

申请号：US26481

申请日：1987-03-16

申请人： Jens Gobrecht ,  Jan Voboril

发明人： Jens Gobrecht ,  Jan Voboril

IPC分类号： H01L21/3205 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/308 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  B44C1/22 ,  C03C15/00 ,  C03C25/06

CPC分类号： H01L29/402 ,  H01L21/308 ,  H01L21/3083 ,  H01L29/0615 ,  H01L29/7813

摘要： A coating layer (2) for semiconductor technology having an edge contour which has a wedge-shaped cross section is produced by predominantly anisotropic dry etching of the coating layer (2) through a mask (4) disposed in front of the coating layer (2) at a finite mask distance (A).The coating layer (2) etched in this manner is especially well suited as an insulating substrate for a field plate in the edge region of a P-N junction emerging at the surface and also as implantation mask for producing a P-N junction with lateral doping gradients.

摘要翻译： 通过主要通过设置在涂层（2）前面的掩模（4）对涂层（2）进行各向异性干法蚀刻，产生具有楔形横截面的边缘轮廓的用于半导体技术的涂层（2） ）在有限的掩模距离（A）。 以这种方式蚀刻的涂层（2）特别适合作为在表面出现的P-N结的边缘区域中的场板的绝缘衬底，以及用于产生具有横向掺杂梯度的P-N结的注入掩模。

公开(公告)号：US5221851A

公开(公告)日：1993-06-22

申请号：US830921

申请日：1992-02-04

申请人： Jens Gobrecht ,  Thomas Stockmeier

发明人： Jens Gobrecht ,  Thomas Stockmeier

IPC分类号： H01L23/48 ,  H01L25/07 ,  H01L25/18

CPC分类号： H01L24/72 ,  H01L25/072 ,  H01L2224/48091 ,  H01L2224/48464 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/1301 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091

摘要： In a large-area controlled-turn-off high-power semiconductor component containing a multiplicity of finely structured individual components, a semiconductor device (12) is formed by a multiplicity of small-area semiconductor chips (7) which are accommodated alongside one another in a common housing (13) and connected in parallel. This achievement avoids problems of yield with structures which are becoming finer.

摘要翻译： 在包含多个精细构造的单独部件的大面积控制关断大功率半导体部件中，半导体器件（12）由多个小面积半导体芯片（7）形成，所述小面积半导体芯片（7）彼此并排地容纳 在共同的壳体（13）中并联连接。 这个成就避免了结构变得越来越好的产量问题。

公开(公告)号：US5153695A

公开(公告)日：1992-10-06

申请号：US581071

申请日：1990-09-10

申请人： Jens Gobrecht ,  Horst Gruning ,  Jan Voboril

发明人： Jens Gobrecht ,  Horst Gruning ,  Jan Voboril

IPC分类号： H01L29/80 ,  H01L29/04 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/739 ,  H01L29/74 ,  H01L29/744

CPC分类号： H01L29/7392 ,  H01L29/045 ,  H01L29/1066 ,  H01L29/41716 ,  H01L29/42308 ,  H01L29/42312 ,  H01L29/744

摘要： A gate-turn-off power semiconductor device of the GTO or FCTh type, having a control zone of alternately arranged finely subdivided cathode fingers and gate trenches, wherein the gate trenches are constructed as narrow deep slots, preferably by a crystal-direction-selective wet chemical etching process, while the original substrate surface is retained in the remaining area of the semiconductor substrate. Compared with the conventional "recessed-gate" construction, this quasi-planar construction offers a number of advantages in the electrical behavior, in the integration of auxiliary functions and in the production.

摘要翻译： 具有GTO或FCTh型的栅极截止功率半导体器件，具有交替排列细分的阴极指状物和栅极沟槽的控制区，其中栅极沟槽被构造为窄的深沟槽，优选地通过晶体方向选择性 湿化学蚀刻工艺，而原始衬底表面保留在半导体衬底的剩余区域中。 与传统的“凹槽”结构相比，这种准平面结构在电气行为，辅助功能的集成和生产中提供了许多优点。

公开(公告)号：US4801554A

公开(公告)日：1989-01-31

申请号：US833219

申请日：1986-02-26

申请人： Jens Gobrecht ,  Peter Roggwiller ,  Roland Sittig ,  Jan Voboril

发明人： Jens Gobrecht ,  Peter Roggwiller ,  Roland Sittig ,  Jan Voboril

IPC分类号： H01L29/739 ,  H01L29/744 ,  H01L21/308

CPC分类号： H01L29/7392 ,  H01L29/744

摘要： A process for manufacturing a power semiconductor component having a component of this type is presented which has at least three consecutive layers and possessing a high current capacity and small power losses. For contacting the first two layers, the component has first second metallized contact planes, which impress a step-like structure onto a first surface of the component. The steps have a height of between 10 and 20 .mu.m and a width of between 20 and 300 .mu.m. The ratio between the surface area of the first contact plane and the surface area of the second contact plane is between 1 and 4. The first layer is heavily doped and has a maximum thickness of 8 .mu.m, and the second layer is lightly doped and has a maximum thickness of 40 .mu.m. According to the process for manufacturing the component, the surface structure according to the invention is produced essentially by a reactive ion-etching process with a single aluminum mask.

摘要翻译： 提出了具有这种分量的功率半导体元件的制造方法，其具有至少三个连续的层并具有高的电流容量和小的功率损耗。 为了接触前两层，该部件具有第一第二金属化接触平面，其将阶梯状结构压印在部件的第一表面上。 这些台阶的高度在10到20微米之间，宽度在20到300微米之间。 第一接触面的表面积和第二接触面的表面积之间的比率在1和4之间。第一层是重掺杂的，最大厚度为8μm，第二层是轻掺杂的， 最大厚度为40亩。 根据制造该组件的方法，本发明的表面结构基本上是通过具有单个铝掩模的反应离子蚀刻工艺制备的。

公开(公告)号：US4568586A

公开(公告)日：1986-02-04

申请号：US640814

申请日：1984-08-15

申请人： Jens Gobrecht

发明人： Jens Gobrecht

IPC分类号： B32B15/04 ,  B32B18/00 ,  C04B37/02 ,  H01L23/14 ,  H01L23/15 ,  H01L23/373 ,  H05K1/02 ,  H05K1/03 ,  H05K3/00 ,  B32B3/14

CPC分类号： H05K1/0271 ,  H01L23/142 ,  H01L23/15 ,  H01L23/3731 ,  H01L23/3733 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K2201/09036 ,  H05K3/0061 ,  Y10S228/903 ,  Y10T29/49124 ,  Y10T403/478 ,  Y10T428/166

摘要： A ceramic/metal element, in which a metal layer (1) is firmly bonded to a ceramic substrate (2) after cooling and consequent solidification of a previously liquid eutectic interlayer (3), wherein the metal layer (1) has at least approximately the same or a greater thickness (D) than the ceramic substrate (2) and is composed in the manner of a mosaic from individual, predominantly loosely adjoining metal elements (1). By using the composite structure of the present ceramic/metal element, fracture of the ceramic substrate and curvature of the composite ceramic/metal element is avoided.

摘要翻译： 一种陶瓷/金属元件，其中在冷却之后金属层（1）牢固地结合到陶瓷基板（2），并随后固化预先液体的共晶中间层（3），其中金属层（1）具有至少约 与陶瓷基板（2）相同或更大的厚度（D），并且以从单独的，主要是松散相邻的金属元件（1）的马赛克的方式构成。 通过使用本陶瓷/金属元件的复合结构，可以避免陶瓷基板的断裂和复合陶瓷/金属元件的曲率。

公开(公告)号：US06650920B2

公开(公告)日：2003-11-18

申请号：US09906623

申请日：2001-07-18

申请人： Max Schaldach ,  Curt Kranz ,  Jens Gobrecht

发明人： Max Schaldach ,  Curt Kranz ,  Jens Gobrecht

IPC分类号： A61B504

CPC分类号： A61B5/6885 ,  A61B5/06 ,  A61B5/061 ,  A61B5/1076 ,  A61B8/12 ,  A61B2018/00351 ,  A61B2018/00577 ,  A61B2018/00875 ,  Y10S977/84

摘要： An apparatus for the automatic performance of diagnostic and/or therapeutic actions in body cavities is provided with a base control unit, which is to be arranged extracorporally, and with a catheter-type actuator, which is coupled therewith and which is insertable in the corresponding body cavity and which, in the vicinity of its distal end, is provided with a diagnostically active detection equipment and/or a therapeutically active treatment equipment, and which, at least in the vicinity of its distal end, is provided with an actuation mechanism, which is triggered by the base control unit, for advance and/or twist and turn control of the actuator.

公开(公告)号：US4849800A

公开(公告)日：1989-07-18

申请号：US98086

申请日：1987-09-18

申请人： C. Christiaan Abbas ,  Jens Gobrecht ,  Jan Voboril ,  Horst Gruning

发明人： C. Christiaan Abbas ,  Jens Gobrecht ,  Jan Voboril ,  Horst Gruning

IPC分类号： H01L29/744 ,  H01L29/06 ,  H01L29/08 ,  H01L29/74

CPC分类号： H01L29/0834 ,  H01L24/32 ,  H01L29/0657 ,  H01L2224/32245 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01068 ,  H01L2924/01082 ,  H01L2924/10158 ,  H01L2924/1301 ,  H01L2924/1306 ,  H01L2924/13091

摘要： In a semiconductor component, which has various differently doped layers (2, 3, 4, 5) within a semiconductor substrate, an improvement of the electrical properties is achieved, wherein the thickness of the substrate in the current-carrying region is locally reduced by a deep etch well (10), the original mechanical stability of the semiconductor substrate largely remaining retained.

摘要翻译： 在半导体衬底内具有各种不同掺杂层（2,3,4,5）的半导体元件中，实现了电性能的改进，其中载流区中衬底的厚度被局部地减少 深蚀刻井（10），半导体衬底的原始机械稳定性大大保持不变。

公开(公告)号：US4710795A

公开(公告)日：1987-12-01

申请号：US705089

申请日：1985-02-25

申请人： Georg Nippert ,  Berthold Hahn ,  Jens Gobrecht

发明人： Georg Nippert ,  Berthold Hahn ,  Jens Gobrecht

IPC分类号： H01L23/498 ,  H01L23/538 ,  H01L25/07 ,  H01L25/18 ,  H02M7/04 ,  H01L21/447 ,  H01L23/10 ,  H01L23/14 ,  H01L23/40

CPC分类号： H01L24/49 ,  H01L23/49844 ,  H01L23/5385 ,  H01L24/48 ,  H01L24/83 ,  H01L25/072 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/48465 ,  H01L2224/48491 ,  H01L2224/49051 ,  H01L2224/49107 ,  H01L2224/83136 ,  H01L2224/83815 ,  H01L2224/85181 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1301 ,  H01L2924/14 ,  H01L2924/15787

摘要： A semiconductor power module includes at least two mutually parallel ceramic substrates each having two sides, metallizations disposed on at least one side of each of the substrates, at least one controlled semiconductor power component disposed between each two respective substrates and contacted by the metallizations above and below the component, the substrate above the component having at least one hole formed therein above the component for accommodting control connections to the component.

摘要翻译： 半导体功率模块包括至少两个相互平行的陶瓷衬底，每个陶瓷衬底具有两个侧面，金属化层设置在每个衬底的至少一侧上，至少一个被控制的半导体功率部件设置在每个两个相应的衬底之间并且被上述金属化部分接触， 在部件下方，在部件上方具有至少一个孔的部件上方的基板，用于容纳到部件的控制连接。