Abstract:
Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.
Abstract:
A method of manufacturing an electronic component embedded printed circuit board including: mounting an electronic component on an insulating layer in a fluidal condition so that a part of the electronic component is inserted into the insulating layer and another part of the electronic component is protruded out of a top surface of the insulating layer by pressing the electronic component onto the insulating layer; fixing the electronic component by curing the insulating layer; forming a metallic seed layer on a top surface of the insulating layer including an exposed surface of the electronic component; forming a plating layer on the metallic seed layer; forming via-holes at positions on the insulating layer, which correspond to pads of the electronic component and forming circuit patterns electrically conducted with the pads; and forming a solder resist layer including the via-holes electrically connected to the circuit patterns.
Abstract:
The present invention relates to a wafer level package and a method of manufacturing the same and a method of reusing a chip and provides a wafer level package including a chip; a removable resin layer formed to surround side surfaces and a lower surface of the chip; a molding material formed on the lower surface of the removable resin layer; a dielectric layer formed over the removable resin layer including the chip and having via holes to expose portions of the chip; redistribution lines formed on the dielectric layer including insides of the via holes to be connected to the chip; and a solder resist layer formed on the dielectric layer to expose portions of the redistribution lines. Also, the present invention provides a method of manufacturing a wafer level package and a method of reusing a chip.
Abstract:
An electronic component embedded printed circuit board and a manufacturing method thereof. The electronic component embedded printed circuit board includes an insulating layer forming a core layer; an electronic component inserted to project a part thereof on an upper part of the insulating layer; a metallic seed layer formed on the insulating layer including a projected surface of the electronic component; a plating layer formed on the metallic seed layer; circuit patterns electrically connected to pads of the electronic component through via-holes formed on the insulating layer; and a solder resist layer which is formed on the insulating layer and has solder balls attached onto the via-holes electrically connected to the circuit patterns. In the electronic component embedded printed circuit board, a heat radiation characteristic can be maximized and a thickness of the printed circuit board can be minimized. In case that the insulating is made of a thermoplastic resin, the electronic component can be reutilized, thereby saving product cost.
Abstract:
A method of manufacturing a wafer level package is disclosed. The method may include stacking an insulation layer over a wafer substrate; processing a via hole in the insulation layer; forming a seed layer over the insulation layer; forming a plating resist, which is in a corresponding relationship with a redistribution pattern, over the seed layer; forming the redistribution pattern, which includes a terminal for external contact, by electroplating; and coupling a conductive ball to the terminal. As multiple redistribution layers can be formed using inexpensive PCB processes, the manufacturing costs can be reduced, and the stability and efficiency of the process can be increased.
Abstract:
An MEMS variable optical attenuator includes a substrate having a planar surface, a micro-electric actuator arranged on the planar surface of the substrate, a pair of coaxially aligned optical waveguides having a receiving end and a transmitting end, respectively, and an optical shutter movable to a predetermined position between the receiving end and the transmitting end of the optical waveguides, and driven by the micro-electric actuator. A surface layer is formed on the optical shutter, has reflectivity less than 80% so as to allow incident light beams to partially transmit thereinto, and further has a sufficient light extinction ratio, thereby extinguishing the partially transmitted light beams therein.
Abstract:
Disclosed herein is an optical switch. The optical switch includes an electrostatic actuator and a substrate. The electrostatic actuator includes an electrostatic actuator, the electrostatic actuator comprising, a reciprocating mass located in the center of the electrostatic actuator, first rotating axes located symmetrically at the left and right sides of the reciprocating mass, first rotating masses rotatably connected to the first rotating axes, first rotating springs for supporting the first rotating masses, linear springs connected to the first rotating masses, second rotating masses connected to the linear springs, second rotating springs for supporting the second rotating masses, second rotating axes connected to the second rotating masses, structural anchors at the side ends of the actuator, drive electrodes, and a micro mirror movable by the same displacement as the reciprocating mass.
Abstract:
Disclosed herein is a package substrate including: a base substrate; insulation layers formed on upper and lower portions of the base substrate; a first metal layer formed on an upper portion of the insulation layer; a first through-via penetrating through the base substrate, the insulation layer, and the first metal layer and being made of an insulating material; a seed layer formed on upper and lower portions and an inner wall of the first through-via; a second metal layer formed on upper portions of the first metal layer and the seed layer; and a second through-via formed in the seed layer formed at the inner wall of the first through-via and the second metal layer.
Abstract:
Disclosed herein are a wafer level package for heat dissipation and a method of manufacturing the same. The wafer level package includes a heat dissipation plate including a cavity and a hole, a die including a pad disposed in the cavity of the heat dissipation plate in a face-up manner, a thermal conductive adhesive disposed between the die and an inner wall of the cavity and disposed in the hole, and a redistribution layer connected at one end to the pad and at the other end extended. The wafer level package protects the die from external environments and enables the die to be easily flush with the heat dissipation plate.
Abstract:
Disclosed herein are a die package and a method of manufacturing the die package. A solder layer is formed on a lower surface of a die. The die is self-aligned and attached to a support plate using surface tension between the solder layer and a metal layer of the support plate, thus reducing attachment lead time of the die.