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19 条记录 (耗时 0.014 秒)

    Amplifier using a single polarity power supply
    1.
    发明授权
    Amplifier using a single polarity power supply 失效

    公开(公告)号：US5952860A

    公开(公告)日：1999-09-14

    申请号：US72865

    申请日：1998-05-05

    申请人： John van Saders ,  Robert J. Bayruns

    发明人： John van Saders ,  Robert J. Bayruns

    IPC分类号： G05F3/24 ,  H03F1/30 ,  H03F3/217 ,  H03K3/354 ,  H03K3/037

    CPC分类号： H03F3/2171 ,  G05F3/242 ,  H03F1/301 ,  H03F1/305 ,  H03K3/354

    摘要： The present invention provides a power amplifier operating with a single power supply. The amplifier includes at least one depletion-mode FET for amplifying an ac signal and a negative voltage generator for providing a bias to the FET. Preferably the amplifier further includes a negative voltage regulator to provide a regulated bias to bias the FET for a class A, AB or B operation. The negative generator includes a multivibrator for producing two clock signals and a charge pump which receives the clock signals and produces a negative voltage. Advantageously the negative voltage is provided as a low reference potential to the multivibrator so that the clock signals it produced include a negative voltage period, which enables the charge pump to operate in a power efficient manner.

    Amplifier using a single polarity power supply and including depletion mode FET and negative voltage generator
    2.
    发明授权
    Amplifier using a single polarity power supply and including depletion mode FET and negative voltage generator 失效
    放大器使用单极性电源，包括耗尽型FET和负电压发生器

    公开(公告)号：US5892400A

    公开(公告)日：1999-04-06

    申请号：US764350

    申请日：1996-12-12

    申请人： John van Saders ,  Robert J. Bayruns

    发明人： John van Saders ,  Robert J. Bayruns

    IPC分类号： G05F3/24 ,  H03F1/30 ,  H03F3/217 ,  H03K3/354 ,  H03F3/16

    CPC分类号： H03F3/2171 ,  G05F3/242 ,  H03F1/301 ,  H03F1/305 ,  H03K3/354

    摘要： The present invention provides a power amplifier operating with a single power supply. The amplifier includes at least one depletion-mode FET for amplifying an ac signal and a negative voltage generator for providing a bias to the FET. Preferably the amplifier further includes a negative voltage regulator to provide a regulated bias to bias the FET for a class A, AB or B operation. The negative generator includes a multivibrator for producing two clock signals and a charge pump which receives the clock signals and produces a negative voltage. Advantageously the negative voltage is provided as a low reference potential to the multivibrator so that the clock signals it produced include a negative voltage period, which enables the charge pump to operate in a power efficient manner.

    摘要翻译： 本发明提供一种使用单个电源工作的功率放大器。 放大器包括用于放大ac信号的至少一个耗尽型FET和用于向FET提供偏置的负电压发生器。 优选地，放大器还包括负电压调节器，以提供调节偏压以将FET偏置用于A类，AB或B类操作。 负发生器包括用于产生两个时钟信号的多谐振荡器和接收时钟信号并产生负电压的电荷泵。 有利地，将负电压作为低参考电位提供给多谐振荡器，使得其产生的时钟信号包括负电压周期，其使电荷泵能够以功率有效的方式工作。

    Amplifier having a low noise active GaAs MESFET load
    4.
    发明授权
    Amplifier having a low noise active GaAs MESFET load 失效
    具有低噪声有源GaAs MESFET负载的放大器

    公开(公告)号：US5047728A

    公开(公告)日：1991-09-10

    申请号：US554802

    申请日：1990-07-18

    申请人： Robert J. Bayruns

    发明人： Robert J. Bayruns

    IPC分类号： H03F1/30 ,  H03F3/193

    CPC分类号： H03F1/306 ,  H03F3/1935 ,  H03F2200/372

    摘要： A high gain, low noise amplifier having an active load with an inductor. The circuit may be fabricated, into a microwave monolithic integrated circuit using GaAs field effect transistors. The amplifier input is connected to the gate terminal of a first MESFET. A DC voltage source is connected to the drain terminal of the first MESFET via a low noise active load device having a second MESFET. The load device also includes an inductor connected between the drain terminal of the first MESFET and the source terminal of the second MESFET. The output terminal of the amplifier is connected to the drain terminal of the first MESFET.

    摘要翻译： 具有电感器的有源负载的高增益低噪声放大器。 该电路可以制造成使用GaAs场效应晶体管的微波单片集成电路。 放大器输入端连接到第一MESFET的栅极端子。 直流电压源通过具有第二MESFET的低噪声有源负载装置连接到第一MESFET的漏极端子。 负载装置还包括连接在第一MESFET的漏极端子和第二MESFET的源极端子之间的电感器。 放大器的输出端子连接到第一MESFET的漏极端子。

    Self-correcting frequency dividers
    7.
    发明授权
    Self-correcting frequency dividers 失效
    自校正分频器

    公开(公告)号：US4691331A

    公开(公告)日：1987-09-01

    申请号：US935170

    申请日：1986-11-25

    申请人： Robert J. Bayruns ,  Harry T. Weston

    发明人： Robert J. Bayruns ,  Harry T. Weston

    IPC分类号： H03K5/15 ,  H03K21/40 ,  H03K23/44 ,  H03K23/48 ,  H03K21/00 ,  H03K23/40

    CPC分类号： H03K23/44 ,  H03K21/40 ,  H03K23/483 ,  H03K5/15093

    摘要： A frequency divider for converting an n-bit periodic counting stream (each period containing a single zero or one bit, respectively, followed by n-1 one or zero bits) into a 2n-bit counting stream includes a two-input NOR gate or NAND gate, respectively, connected for delivering its output to an n-bit delay device, the NOR or NAND gate further connected for receiving the output of the delay device as feedback at one of its two-input terminals and for receiving the n-bit counting stream at the other of its two-input terminals. The output of the delay device is then a 2n-bit counting stream.

    摘要翻译： 用于将n位周期性计数流（每个周期包含单个零或一个位，分别为n-1个或零个比特）转换成2n位计数流的分频器包括双输入NOR门或 NAND门分别连接用于将其输出传送到n位延迟器件，NOR或NAND门进一步连接用于接收延迟器件的输出作为其两输入端之一处的反馈，并用于接收n位 在其两个输入端子的另一个处计数流。 延迟器的输出就是一个2n位计数流。