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    Method of minimizing reactive ion etch damage of organic insulating layers in semiconductor fabrication
    7.
    发明授权
    Method of minimizing reactive ion etch damage of organic insulating layers in semiconductor fabrication 有权
    在半导体制造中使有机绝缘层的反应离子蚀刻损伤最小化的方法

    公开(公告)号：US06265320B1

    公开(公告)日：2001-07-24

    申请号：US09467389

    申请日：1999-12-21

    申请人： Jianou Shi ,  Thomas W. Mountsier ,  Mary Anne Plano ,  Joseph R. Laia

    发明人： Jianou Shi ,  Thomas W. Mountsier ,  Mary Anne Plano ,  Joseph R. Laia

    IPC分类号： H01L21302

    CPC分类号： H01L21/31138 ,  H01L21/76802 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76828

    摘要： A method of limiting surface damage during reactive ion etching of an organic polymer layer on a semiconductor substrate combines particular choices of process gases and plasma conditions with a post-etch passivation treatment. According to the method, a low density plasma etcher is used with a process gas mixture of one or more of an inert gas such as argon, helium, or nitrogen; methane; hydrogen; and oxygen, where the percentage of oxygen is up to about 5%. Typically a parallel plate plasma etcher is used. The reactive ion etching is followed by a post-etch passivation treatment in a which a gas containing hydrogen is flowed over the etched layer at an elevated temperature. The method is particularly useful in reactive ion etching of fluorinated organic polymer layers such as films formed from parylene AF4, and layers of poly(arylene ethers) and TEFLON®.

    摘要翻译： 在半导体衬底上的有机聚合物层的反应离子蚀刻期间限制表面损伤的方法通过蚀刻后钝化处理来组合工艺气体和等离子体条件的特定选择。 根据该方法，使用低密度等离子体蚀刻器与一种或多种惰性气体如氩气，氦气或氮气的处理气体混合物; 甲烷 氢; 和氧气，其中氧气的百分比高达约5％。 通常使用平行板等离子体蚀刻器。 反应离子蚀刻之后是后蚀刻钝化处理，其中含有氢的气体在升高的温度下流过蚀刻层。 该方法在诸如由聚对二甲苯AF4形成的膜和聚（亚芳基醚）和TEFLON层形成的氟化有机聚合物层的反应离子蚀刻中特别有用。

    Protection of Cu damascene interconnects by formation of a self-aligned buffer layer
    8.
    发明授权
    Protection of Cu damascene interconnects by formation of a self-aligned buffer layer 有权
    通过形成自对准缓冲层来保护铜镶嵌互连

    公开(公告)号：US08030777B1

    公开(公告)日：2011-10-04

    申请号：US11671161

    申请日：2007-02-05

    申请人： Bart van Schravendijk ,  Thomas W Mountsier ,  Mahesh K Sanganeria ,  Glenn B Alers ,  Roey Shaviv

    发明人： Bart van Schravendijk ,  Thomas W Mountsier ,  Mahesh K Sanganeria ,  Glenn B Alers ,  Roey Shaviv

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76849 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76886

    摘要： Methods of protecting exposed metal damascene interconnect surfaces in a process for making electronic components and the electronic components made according to such methods. An integrated circuit structure having damascene regions with exposed metal surfaces is provided into a closed processing chamber, whereby a first reactant is contacted to the exposed metal surfaces to transform a top portion of the metal layer into a protective self-aligned buffer layer. Reacting molecules of the first reactant with metal atoms of this metal layer forms the protective self-aligned buffer layer entirely within such metal layer. Alternatively, adsorbing surface-active reactant molecules onto the exposed metal surface forms the protective self-aligned buffer layer. A second reactant may be contacted to the protective self-aligned buffer layer to form a self-aligned dielectric cap layer directly over the protective self-aligned buffer layer.

    摘要翻译： 在制造电子部件的方法和根据这些方法制造的电子部件的过程中保护暴露的金属镶嵌互连表面的方法。 具有暴露的金属表面的镶嵌区域的集成电路结构被提供到封闭处理室中，由此第一反应物与暴露的金属表面接触以将金属层的顶部部分转变成保护性自对准缓冲层。 使第一反应物与该金属层的金属原子反应的分子在该金属层内完全形成保护性自对准缓冲层。 或者，将表面活性反应物分子吸附到暴露的金属表面上形成保护性自对准缓冲层。 可以将第二反应物与保护性自对准缓冲层接触以在保护性自对准缓冲层上直接形成自对准电介质盖层。

    Protection of Cu damascene interconnects by formation of a self-aligned buffer layer
    10.
    发明授权
    Protection of Cu damascene interconnects by formation of a self-aligned buffer layer 有权
    通过形成自对准缓冲层来保护铜镶嵌互连

    公开(公告)号：US07396759B1

    公开(公告)日：2008-07-08

    申请号：US10980076

    申请日：2004-11-03

    申请人： Bart van Schravendijk ,  Thomas W Mountsier ,  Mahesh K Sanganeria ,  Glenn B Alers ,  Roey Shaviv

    发明人： Bart van Schravendijk ,  Thomas W Mountsier ,  Mahesh K Sanganeria ,  Glenn B Alers ,  Roey Shaviv

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76849 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76846 ,  H01L21/76856 ,  H01L21/76867 ,  H01L21/76886

    摘要： Methods of protecting exposed metal damascene interconnect surfaces in a process for making electronic components and the electronic components made according to such methods. An integrated circuit structure having damascene regions with exposed metal surfaces is provided into a closed processing chamber, whereby a first reactant is contacted to the exposed metal surfaces to transform a top portion of the metal layer into a protective self-aligned buffer layer. Reacting molecules of the first reactant with metal atoms of this metal layer forms the protective self-aligned buffer layer entirely within such metal layer. Alternatively, adsorbing surface-active reactant molecules onto the exposed metal surface forms the protective self-aligned buffer layer. A second reactant may be contacted to the protective self-aligned buffer layer to form a self-aligned dielectric cap layer directly over the protective self-aligned buffer layer.

    摘要翻译： 在制造电子部件的方法和根据这些方法制造的电子部件的过程中保护暴露的金属镶嵌互连表面的方法。 具有暴露的金属表面的镶嵌区域的集成电路结构被提供到封闭处理室中，由此第一反应物与暴露的金属表面接触以将金属层的顶部部分转变成保护性自对准缓冲层。 使第一反应物与该金属层的金属原子反应的分子在该金属层内完全形成保护性自对准缓冲层。 或者，将表面活性反应物分子吸附到暴露的金属表面上形成保护性自对准缓冲层。 可以将第二反应物与保护性自对准缓冲层接触以在保护性自对准缓冲层上直接形成自对准电介质盖层。