公开(公告)号：US11211247B2

公开(公告)日：2021-12-28

申请号：US16777610

申请日：2020-01-30

Applicant: Applied Materials, Inc.

Inventor： Wenguang Li ,  James S. Papanu

IPC: H01L21/027 ,  H01L21/3065 ,  H01L21/78 ,  H01L21/308 ,  H01L21/822

Abstract: Water soluble organic-inorganic hybrid masks and mask formulations, and methods of dicing semiconductor wafers are described. In an example, a mask for a wafer singulation process includes a water-soluble matrix based on a solid component and water. A p-block metal compound, an s-block metal compound, or a transition metal compound is dissolved throughout the water-soluble matrix.

公开(公告)号：US20210050263A1

公开(公告)日：2021-02-18

申请号：US16540899

申请日：2019-08-14

Applicant: Applied Materials, Inc.

Inventor： Jungrae Park ,  Karthik Balakrishnan ,  James S. Papanu

IPC: H01L21/78 ,  H01L21/268 ,  H01L21/3065 ,  H01L23/544 ,  H01L21/67 ,  B23K26/08 ,  B23K26/362 ,  B23K26/06

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a uniform rotating laser beam laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

公开(公告)号：US09768014B2

公开(公告)日：2017-09-19

申请号：US14658102

申请日：2015-03-13

Applicant: Applied Materials, Inc.

Inventor： Jungrae Park ,  Wei-Sheng Lei ,  Prabhat Kumar ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

IPC: B05C11/08 ,  B05C11/02 ,  B05C13/02 ,  B05C13/00 ,  H01L21/02 ,  B05B1/00 ,  B05B3/10 ,  H01L21/308 ,  H01L21/683 ,  H01L21/78 ,  H01L21/67

CPC classification number: H01L21/02282 ,  B05B1/00 ,  B05B3/1014 ,  B05B3/1035 ,  H01L21/3081 ,  H01L21/3086 ,  H01L21/6715 ,  H01L21/6835 ,  H01L21/78 ,  H01L2221/68327

Abstract: Improved wafer coating processes, apparatuses, and systems are described. In one embodiment, an improved spin-coating process and system is used to form a mask for dicing a semiconductor wafer with a laser plasma dicing process. In one embodiment, a spin-coating apparatus for forming a film over a semiconductor wafer includes a rotatable stage configured to support the semiconductor wafer. The rotatable stage has a downward sloping region positioned beyond a perimeter of the semiconductor wafer. The apparatus includes a nozzle positioned above the rotatable stage and configured to dispense a liquid over the semiconductor wafer. The apparatus also includes a motor configured to rotate the rotatable stage.

公开(公告)号：US09412619B2

公开(公告)日：2016-08-09

申请号：US14458220

申请日：2014-08-12

Applicant: Applied Materials, Inc.

Inventor： Prabhat Kumar ,  Wei-Sheng Lei ,  Martin S. Wohlert ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

IPC: H01L21/20 ,  H01L21/322 ,  H01L21/67 ,  H01L21/673 ,  H01L21/677

CPC classification number: H01L21/3221 ,  H01L21/3081 ,  H01L21/67115 ,  H01L21/67196 ,  H01L21/67201 ,  H01L21/67207 ,  H01L21/67393 ,  H01L21/67739 ,  H01L21/67748 ,  H01L21/78

Abstract: Embodiments of the invention include methods and apparatuses for outgassing a workpiece prior to a plasma processing operation. An embodiment of the invention may comprise transferring a workpiece having a mask to an outgassing station that has one or more heating elements. The workpiece may then be heated to an outgassing temperature that causes moisture from the mask layer to be outgassed. After outgassing the workpiece, the workpiece may be transferred to a plasma processing chamber. In an additional embodiment, one or more outgassing stations may be located within a process tool that has a factory interface, a load lock coupled to the factory interface, a transfer chamber coupled to the load lock, and a plasma processing chamber coupled to the transfer chamber. According to an embodiment, an outgassing station may be located within any of the components of the process tool.

Abstract translation: 本发明的实施例包括在等离子体处理操作之前使工件脱气的方法和装置。 本发明的实施例可以包括将具有掩模的工件传送到具有一个或多个加热元件的除气站。 然后可以将工件加热到使得来自掩模层的水分脱气的除气温度。 在对工件进行放气之后，可以将工件转移到等离子体处理室。 在另外的实施例中，一个或多个除气站可以位于处理工具内，该工具具有出厂界面，耦合到出厂界面的负载锁，耦合到负载锁的传送室以及耦合到传送的等离子体处理室 房间。 根据实施例，除气站可以位于处理工具的任何部件内。

公开(公告)号：US09130030B1

公开(公告)日：2015-09-08

申请号：US14200918

申请日：2014-03-07

Applicant: Applied Materials, Inc.

Inventor： Jungrae Park ,  Wei-Sheng Lei ,  James S. Papanu ,  Brad Eaton ,  Ajay Kumar

IPC: H01L21/46 ,  H01L21/78 ,  B23K26/36 ,  B23K10/00

CPC classification number: H01L21/78 ,  B23K26/0823 ,  B23K26/0869 ,  B23K26/20 ,  B23K2101/001 ,  B23K2101/36 ,  B23K2103/166 ,  B23K2103/56

Abstract: Baking methods and tools for improved wafer coating are described. In one embodiment, a method of dicing a semiconductor wafer including integrated circuits involves coating a surface of the semiconductor wafer to form a mask covering the integrated circuits. The method involves baking the mask with radiation from one or more light sources. The method involves patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the substrate between the ICs. The method may also involves singulating the ICs, such as with a plasma etching operation.

Abstract translation: 描述了用于改进晶片涂层的烘烤方法和工具。 在一个实施例中，包括集成电路的半导体晶片的切割方法包括涂覆半导体晶片的表面以形成覆盖集成电路的掩模。 该方法包括用来自一个或多个光源的辐射来烘烤该掩模。 该方法包括用激光划线工艺对掩模进行图案化以提供具有间隙的图案化掩模，暴露在IC之间的衬底区域。 该方法还可以包括例如用等离子体蚀刻操作来分离IC。

公开(公告)号：US11217536B2

公开(公告)日：2022-01-04

申请号：US15945966

申请日：2018-04-05

Applicant: APPLIED MATERIALS, INC.

Inventor： Jungrae Park ,  Wei-Sheng Lei ,  Brad Eaton ,  James S. Papanu ,  Ajay Kumar

IPC: H01L23/544 ,  A47G19/22 ,  B65D47/24 ,  B65D47/32 ,  B23K26/0622 ,  B23K10/00 ,  H01L21/78

Abstract: Methods of dicing semiconductor wafers, each wafer having a plurality of integrated circuits, are described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a split laser beam laser scribing process, such as a split shaped laser beam laser scribing process, to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the integrated circuits. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

公开(公告)号：US10535561B2

公开(公告)日：2020-01-14

申请号：US15918673

申请日：2018-03-12

Applicant: APPLIED MATERIALS, INC.

Inventor： Jungrae Park ,  James S. Papanu ,  Ajay Kumar ,  Wei-Sheng Lei

IPC: H01L21/78 ,  H01L21/263 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/308 ,  B23K10/00 ,  B23K26/53 ,  H01L21/67 ,  H01L21/311 ,  B23K101/40

Abstract: Methods of dicing semiconductor wafers are described. In an example, a method of dicing a semiconductor wafer having integrated circuits thereon involves forming a mask above the semiconductor wafer, the mask composed of a layer covering and protecting the integrated circuits. The mask is then patterned with a multiple pass laser scribing process to provide a patterned mask with gaps exposing regions of the semiconductor wafer between the integrated circuits, the multiple pass laser scribing process including a first pass along a first edge scribing path, a second pass along a center scribing path, a third pass along a second edge scribing path, a fourth pass along the second edge scribing path, a fifth pass along the center scribing path, and a sixth pass along the first edge scribing path. The semiconductor wafer is then plasma etched through the gaps in the patterned mask to singulate the integrated circuits.

公开(公告)号：US09312177B2

公开(公告)日：2016-04-12

申请号：US14099707

申请日：2013-12-06

Applicant: Applied Materials, Inc.

Inventor： Prabhat Kumar ,  Brad Eaton ,  Wei-Sheng Lei ,  James S. Papanu ,  Ajay Kumar

IPC: H01L21/78 ,  H01L21/304 ,  H01L21/3065 ,  B41F15/08 ,  H01L21/67 ,  H01J37/32

CPC classification number: H01L21/78 ,  B23K26/364 ,  B41F15/08 ,  H01J37/32091 ,  H01J37/321 ,  H01J2237/334 ,  H01L21/3043 ,  H01L21/3065 ,  H01L21/67207

Abstract: Methods of using a screen-print mask for hybrid wafer dicing using laser scribing and plasma etch described. In an example, a method of dicing a semiconductor wafer having a plurality of integrated circuits separated by streets involves screen-printing a patterned mask above the semiconductor wafer, the patterned mask covering the integrated circuits and exposing the streets of the semiconductor wafer. The method also involves laser ablating the streets with a laser scribing process to expose regions of the semiconductor wafer between the integrated circuits. The method also involves plasma etching the semiconductor wafer through the exposed regions of the semiconductor wafer to singulate the integrated circuits. The patterned mask protects the integrated circuits during the plasma etching.

Abstract translation: 使用激光划线和等离子体蚀刻使用用于混合晶片切割的丝网印刷掩模的方法。 在一个示例中，对具有由街道分开的多个集成电路进行切割的半导体晶片的方法涉及在半导体晶片之上丝网印刷图案化掩模，该图案化掩模覆盖集成电路并暴露半导体晶片的街道。 该方法还涉及通过激光划线工艺激光烧蚀街道，以暴露集成电路之间的半导体晶片的区域。 该方法还包括通过半导体晶片的暴露区域等离子体蚀刻半导体晶片以对集成电路进行分离。 图案化掩模在等离子体蚀刻期间保护集成电路。

公开(公告)号：US11854888B2

公开(公告)日：2023-12-26

申请号：US16908542

申请日：2020-06-22

Applicant: Applied Materials, Inc.

Inventor： Jungrae Park ,  Zavier Zai Yeong Tan ,  Karthik Balakrishnan ,  James S. Papanu ,  Wei-Sheng Lei

IPC: H01L21/78 ,  H01L21/67 ,  H01L21/02 ,  H01L21/268 ,  H01L21/3065

CPC classification number: H01L21/78 ,  H01L21/67069 ,  H01L21/67115 ,  H01L21/02071 ,  H01L21/268 ,  H01L21/3065

Abstract: An embodiment disclosed herein includes a method of dicing a wafer comprising a plurality of integrated circuits. In an embodiment, the method comprises forming a mask above the semiconductor wafer, and patterning the mask and the semiconductor wafer with a first laser process. The method may further comprise patterning the mask and the semiconductor wafer with a second laser process, where the second laser process is different than the first laser process. In an embodiment, the method may further comprise etching the semiconductor wafer with a plasma etching process to singulate the integrated circuits.

公开(公告)号：US20220076944A1

公开(公告)日：2022-03-10

申请号：US17529130

申请日：2021-11-17

Applicant: Applied Materials, Inc.

Inventor： Wenguang Li ,  James S. Papanu

IPC: H01L21/027 ,  H01L21/3065 ,  H01L21/78 ,  H01L21/308 ,  H01L21/822

Abstract: Water soluble organic-inorganic hybrid masks and mask formulations, and methods of dicing semiconductor wafers are described. In an example, a mask for a wafer singulation process includes a water-soluble matrix based on a solid component and water. A p-block metal compound, an s-block metal compound, or a transition metal compound is dissolved throughout the water-soluble matrix.