公开(公告)号：US09241403B2

公开(公告)日：2016-01-19

申请号：US14090321

申请日：2013-11-26

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Gabriel Pares

IPC: H05K1/02 ,  H05K3/40 ,  H05K3/46 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L23/498

CPC classification number: H05K1/0296 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02123 ,  H01L2224/02141 ,  H01L2224/0215 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0348 ,  H01L2224/036 ,  H01L2224/0381 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05584 ,  H01L2224/05644 ,  H01L2224/10126 ,  H01L2224/10135 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1148 ,  H01L2224/1181 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/16111 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/3201 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/06593 ,  H01L2924/00014 ,  H05K3/4084 ,  H05K3/467 ,  H01L2924/00015 ,  H01L2924/01047 ,  H01L2924/05442 ,  H01L2924/05042 ,  H01L2224/051 ,  H01L2924/01074 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: Forming of a microelectronic device including a substrate containing at least one conductive pad, the pad being provided with a bottom surface resting on the substrate and an upper surface opposite the bottom surface. The upper surface of the pad has a stack applied thereto formed of a conductive layer and a protective dielectric layer including an opening called first opening facing the pad and exposing the conductive layer. At least one insulating block is arranged on a peripheral region of the upper surface of the pad, the insulating block having a cross-section forming a closed contour and having an opening called second opening. A conductive pillar is located in the center of the contour in the second opening.

Abstract translation: 形成微电子器件，其包括含有至少一个导电焊盘的衬底，衬垫设置有搁置在衬底上的底表面和与底表面相对的上表面。 衬垫的上表面具有施加到其上的由导电层形成的叠层和保护电介质层，保护电介质层包括面向焊盘的称为第一开口的开口并暴露导电层。 至少一个绝缘块布置在垫的上表面的周边区域上，绝缘块具有形成闭合轮廓的横截面并且具有称为第二开口的开口。 导电柱位于第二开口中轮廓的中心。

公开(公告)号：US20140144690A1

公开(公告)日：2014-05-29

申请号：US14090321

申请日：2013-11-26

Applicant: Commissariat A L'Energie Atomique et Aux Ene Alt

Inventor： Gabriel Pares

IPC: H05K1/02 ,  H05K3/46 ,  H05K3/40

CPC classification number: H05K1/0296 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/3192 ,  H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/02123 ,  H01L2224/02141 ,  H01L2224/0215 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0348 ,  H01L2224/036 ,  H01L2224/0381 ,  H01L2224/0391 ,  H01L2224/0401 ,  H01L2224/05083 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05557 ,  H01L2224/05559 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/05584 ,  H01L2224/05644 ,  H01L2224/10126 ,  H01L2224/10135 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1148 ,  H01L2224/1181 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13082 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/16111 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16245 ,  H01L2224/3201 ,  H01L2224/73103 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81007 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/83862 ,  H01L2224/9211 ,  H01L2225/06513 ,  H01L2225/06593 ,  H01L2924/00014 ,  H05K3/4084 ,  H05K3/467 ,  H01L2924/00015 ,  H01L2924/01047 ,  H01L2924/05442 ,  H01L2924/05042 ,  H01L2224/051 ,  H01L2924/01074 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: The invention concerns the forming of a microelectronic device comprising a substrate containing at least one conductive pad, the said pad being provided with a bottom surface resting on the substrate and an upper surface opposite said bottom surface, the said upper surface of said pad having a stack applied thereto formed of a conductive layer and a protective dielectric layer comprising an opening called first opening facing said pad and exposing the said conductive layer, at least one insulating block (120a, 120b) being arranged on a peripheral region of said upper surface of said pad, the said insulating block (120a, 120b) having a cross-section forming a closed contour and comprising an opening called second opening, a conductive pillar (130a, 130b) being located in the centre of said contour in the said second opening.

Abstract translation: 本发明涉及形成微电子器件，其包括含有至少一个导电焊盘的衬底，所述衬垫设置有搁置在衬底上的底表面和与所述底表面相对的上表面，所述衬垫的所述上表面具有 叠层，其由导电层和保护电介质层构成，保护电介质层包括面向所述焊盘的第一开口的开口并暴露所述导电层，至少一个绝缘块（120a，120b）布置在所述上​​表面的外围区域 所述绝缘块（120a，120b）具有形成闭合轮廓的横截面并且包括称为第二开口的开口，导电柱（130a，130b）位于所述第二开口中的所述轮廓的中心 。

公开(公告)号：US09312169B2

公开(公告)日：2016-04-12

申请号：US14454023

申请日：2014-08-07

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT

Inventor： Christophe Bouvier ,  Gabriel Pares

IPC: H01L21/30 ,  H01L21/768 ,  H01L23/12 ,  H01L23/52 ,  H01L23/552 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00 ,  H01L27/06 ,  H01L23/538

CPC classification number: H01L21/76838 ,  H01L21/76898 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/19 ,  H01L24/20 ,  H01L24/24 ,  H01L24/82 ,  H01L24/92 ,  H01L24/96 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0688 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/24145 ,  H01L2224/9202 ,  H01L2225/06513 ,  H01L2225/06537 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2924/12042 ,  H01L2924/00

Abstract: Method for producing a microelectronic device formed from a stack of supports (W) each provided with one or more electronic components (C) and comprising a conductive structure (170, 470) formed from a first blind conductive via (171b, 472) and a second blind conductive via (171a, 473) with a greater height, the first via and the second via being connected together.

Abstract translation: 一种用于制造由一组支撑件（W）形成的微电子器件的方法，每个支撑件设置有一个或多个电子部件（C），并且包括由第一盲导电通孔（171b，472）形成的导电结构（170,470）和 具有较大高度的第二盲导电通孔（171a，473），第一通孔和第二通孔连接在一起。