公开(公告)号：US20230185034A1

公开(公告)日：2023-06-15

申请号：US17550520

申请日：2021-12-14

Applicant: Chia-Pin Chiu ,  Omkar Karhade ,  Kaveh Hosseini ,  Xiaoqian Li ,  Finian Rogers

Inventor： Chia-Pin Chiu ,  Omkar Karhade ,  Kaveh Hosseini ,  Xiaoqian Li ,  Finian Rogers

IPC: G02B6/42

CPC classification number: G02B6/4214 ,  G02B6/4271

Abstract: An electronic device and associated methods are disclosed. In one example, the electronic device includes a laser package. In selected examples, the laser package can include a substrate having a substrate front surface and defining a cavity that extends into the substrate front surface. The laser package can further include a photonic integrated circuit (PIC) attached to the substrate within the cavity at a first surface of the PIC, and laser circuitry communicably coupled to a second surface of the PIC opposite the first surface.

公开(公告)号：US09177831B2

公开(公告)日：2015-11-03

申请号：US14041722

申请日：2013-09-30

Applicant: Chia-Pin Chiu ,  Qing Ma ,  Robert L. Sankman ,  Paul B. Fischer ,  Patrick Morrow ,  William J. Lambert ,  Charles A. Gealer ,  Tyler Osborn

Inventor： Chia-Pin Chiu ,  Qing Ma ,  Robert L. Sankman ,  Paul B. Fischer ,  Patrick Morrow ,  William J. Lambert ,  Charles A. Gealer ,  Tyler Osborn

IPC: H01L21/00 ,  H01L21/48 ,  H01L23/538 ,  H01L23/00 ,  H01L23/15 ,  H01L21/56 ,  H01L23/31

CPC classification number: H01L25/0655 ,  H01L21/4803 ,  H01L21/561 ,  H01L21/568 ,  H01L23/15 ,  H01L23/3121 ,  H01L23/5384 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16225 ,  H01L2224/24137 ,  H01L2224/2499 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2924/00

Abstract: A die assembly formed on a thin dielectric sheet is described. In one example, a first and a second die have interconnect areas. A dielectric sheet, such as glass, silicon, or oxidized metal is applied over the interconnect areas of dies. Conductive vias are formed in the dielectric sheet to connect with pads of the interconnect areas. A build-up layer includes routing to connect pads of the first die interconnect area to pads of the second die interconnect area through the conductive vias and a cover is applied over the dies, the dielectric sheet, and the build-up layer.

Abstract translation: 描述了形成在薄介电片上的模具组件。 在一个示例中，第一和第二管芯具有互连区域。 将诸如玻璃，硅或氧化金属之类的电介质片施加在管芯的互连区域上。 导电孔形成在电介质片中以与互连区的焊盘连接。 堆积层包括通过导电通孔将第一管芯互连区的焊盘连接到第二管芯互连区的焊盘的路由，并且覆盖被施加在管芯，电介质层和堆积层上。

公开(公告)号：US20150084192A1

公开(公告)日：2015-03-26

申请号：US14036755

申请日：2013-09-25

Applicant: Chia-Pin Chiu ,  Xiaorong Xiong ,  Linda Zhang ,  Robert Nickerson ,  Charles Gealer

Inventor： Chia-Pin Chiu ,  Xiaorong Xiong ,  Linda Zhang ,  Robert Nickerson ,  Charles Gealer

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L21/565 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/11 ,  H01L24/16 ,  H01L24/17 ,  H01L24/81 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/11013 ,  H01L2224/1132 ,  H01L2224/13014 ,  H01L2224/13082 ,  H01L2224/16225 ,  H01L2224/1703 ,  H01L2225/0652 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/1533 ,  H01L2924/1815 ,  H01L2924/00

Abstract: Generally discussed herein are systems and apparatuses that include an extended TSBA ball and techniques for making the same. According to an example, a technique can include forming a circuit substrate including forming a circuit on a substrate, the circuit exposed along an upper surface of the substrate, wherein the substrate is for coupling the circuit with a die along a lower surface of the circuit substrate. A molding can be formed onto an upper surface of the circuit substrate, over the circuit of the circuit substrate. An opening can be defined in the molding so that the opening can extend to a top surface of the molding to at least a portion of the circuit. Solder can be formed into the opening, including conforming the solder to the opening and the circuit substrate.

Abstract translation: 本文通常讨论的是包括扩展TSBA球的系统和装置及其制造技术。 根据示例，技术可以包括形成电路基板，包括在基板上形成电路，沿着基板的上表面暴露的电路，其中基板用于沿着电路的下表面将电路与管芯耦​​合 基质。 可以在电路基板的电路上形成在电路基板的上表面上的成型体。 可以在模制件中限定开口，使得开口可以延伸到模制件的顶表面至电路的至少一部分。 可以将焊料形成为开口，包括使焊料与开口和电路基板相符合。

公开(公告)号：US08777675B2

公开(公告)日：2014-07-15

申请号：US13627128

申请日：2012-09-26

Applicant: Chia-Pin Chiu

Inventor： Chia-Pin Chiu

IPC: H01R13/24

CPC classification number: H01R12/714 ,  H01R13/24

Abstract: A conductive contact includes a hollow cylinder, a spring strip and a contact head.

Abstract translation: 导电触头包括中空圆筒，弹簧条和接触头。

公开(公告)号：US20140082915A1

公开(公告)日：2014-03-27

申请号：US14090493

申请日：2013-11-26

Applicant: Russell S. Aoki ,  Anthony P. Valpiani ,  Barry T. Dale ,  Chia-Pin Chiu

Inventor： Russell S. Aoki ,  Anthony P. Valpiani ,  Barry T. Dale ,  Chia-Pin Chiu

IPC: G06F1/16

CPC classification number: G06F1/16 ,  H01R13/193 ,  H05K7/1007 ,  Y10T29/49826

Abstract: A land-grid array die package socket is configured for low- or zero insertion-force assembly with a land-grid array die package. For zero insertion-force assembly, a motion plate applies a force on a land-grid array contact that causes a contact tip to move into protective cover while the die package is inserted into the socket. After zero insertion-force assembly, the motion plate applies a force on the land-grid array contact that causes the contact tip to deflect in a positive-Z direction until a useful contact is made at the contact tip with a land-grid array pad.

Abstract translation: 地面阵列阵列封装插座被配置为具有地平线阵列管芯封装的低或零插入力组件。 对于零插入力组件，运动板在地面栅格阵列触点上施加力，当模具封装插入插座时，导致接触尖端移动到保护盖中。 在零插入力组件之后，运动板在地面栅格阵列接触件上施加力，其使得接触尖端以正Z方向偏转，直到在接地尖端处与平台栅格阵列垫片进行有用的接触 。

公开(公告)号：US20120200993A1

公开(公告)日：2012-08-09

申请号：US13024032

申请日：2011-02-09

Applicant: Russell S. Aoki ,  Anthony P. Valpiani ,  Barry T. Dale ,  Chia-Pin Chiu

Inventor： Russell S. Aoki ,  Anthony P. Valpiani ,  Barry T. Dale ,  Chia-Pin Chiu

IPC: G06F1/16 ,  B23P17/04 ,  H01R12/62

CPC classification number: G06F1/16 ,  H01R13/193 ,  H05K7/1007 ,  Y10T29/49826

Abstract: A land-grid array die package socket is configured for low- or zero insertion-force assembly with a land-grid array die package. For zero insertion-force assembly, a motion plate applies a force on a land-grid array contact that causes a contact tip to move into protective cover while the die package is inserted into the socket. After zero insertion-force assembly, the motion plate applies a force on the land-grid array contact that causes the contact tip to deflect in a positive-Z direction until a useful contact is made at the contact tip with a land-grid array pad.

Abstract translation: 地面阵列阵列封装插座被配置为具有地平线阵列管芯封装的低或零插入力组件。 对于零插入力组件，运动板在地面栅格阵列触点上施加力，当模具封装插入插座时，导致接触尖端移动到保护盖中。 在零插入力组件之后，运动板在地面栅格阵列接触件上施加力，其使得接触尖端以正Z方向偏转，直到在接地尖端处与平台栅格阵列垫片进行有用的接触 。

公开(公告)号：US20080237843A1

公开(公告)日：2008-10-02

申请号：US11729079

申请日：2007-03-27

Applicant: Ashish Gupta ,  Leonel R. Arana ,  David Song ,  Chia-Pin Chiu ,  Ravi Prasher ,  Chris Matayabas ,  Nirupama Chakrapani

Inventor： Ashish Gupta ,  Leonel R. Arana ,  David Song ,  Chia-Pin Chiu ,  Ravi Prasher ,  Chris Matayabas ,  Nirupama Chakrapani

IPC: H01L23/367 ,  H01L21/58

CPC classification number: H01L23/10 ,  H01L23/04 ,  H01L2224/73253 ,  H01L2924/1433

Abstract: A microelectronic package. The package includes a substrate; a die mounted onto the substrate; an integrated heat spreader mounted onto the substrate, and thermally coupled to a backside of the die; and a sealant material bonding the integrated heat spreader to the substrate, the sealant material having a bulk thermal conductivity above about 1 W/m/° C. and a modulus of elasticity lower than a modulus of elasticity of solder.

Abstract translation: 微电子封装。 所述包装包括基材; 安装在基板上的管芯; 集成散热器，其安装在基板上，并热耦合到模具的背面; 以及将整体散热器粘合到基底上的密封剂材料，所述密封剂材料具有高于约1W / m /℃的体积热导率，并且弹性模量低于焊料的弹性模量。

公开(公告)号：US07259965B2

公开(公告)日：2007-08-21

申请号：US11101061

申请日：2005-04-07

Applicant: Je-Young Chang ,  Ioan Sauciuc ,  Chuan Hu ,  Chia-Pin Chiu ,  Gregory M. Chrysler ,  Ravi S. Prasher ,  Rajiv K. Mongia ,  Himanshu Pokharna ,  Eric DiStefano

Inventor： Je-Young Chang ,  Ioan Sauciuc ,  Chuan Hu ,  Chia-Pin Chiu ,  Gregory M. Chrysler ,  Ravi S. Prasher ,  Rajiv K. Mongia ,  Himanshu Pokharna ,  Eric DiStefano

IPC: H05K7/20

CPC classification number: H01L23/473 ,  F28F3/12 ,  F28F2260/02 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A microchannel structure has microchannels formed therein. The microchannels are to transport a coolant and to be proximate to an integrated circuit to transfer heat from the integrated circuit to the coolant. At least one of the microchannels has a length extent and has a first section at a first location along the length extent and a second section at a second location along the length extent. The first section of the microchannel has a first aspect ratio and the second section is divided into at least two sub-channels. Each sub-channel has a respective second aspect ratio that is greater than the first aspect ratio.

Abstract translation: 微通道结构中形成有微通道。 微通道将输送冷却剂并靠近集成电路以将热量从集成电路传递到冷却剂。 微通道中的至少一个具有长度范围，并且具有沿着长度范围的第一位置处的第一部分和沿着长度范围的第二位置处的第二部分。 微通道的第一部分具有第一宽高比，第二部分被划分为至少两个子通道。 每个子通道具有大于第一宽高比的相应的第二宽高比。

公开(公告)号：US20070138621A1

公开(公告)日：2007-06-21

申请号：US11305527

申请日：2005-12-16

Applicant: Sandeep Sane ,  Nitin Deshpande ,  Chia-Pin Chiu

Inventor： Sandeep Sane ,  Nitin Deshpande ,  Chia-Pin Chiu

IPC: H01L23/12

CPC classification number: H01L23/4275 ,  H01L24/32 ,  H01L2224/73253 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/14 ,  H01L2924/1433

Abstract: A method, apparatus and system with a semiconductor package including a thermal interface material dam enclosing a volume of thermal interface material.

公开(公告)号：US20050285261A1

公开(公告)日：2005-12-29

申请号：US10877925

申请日：2004-06-25

Applicant: Ravi Prasher ,  Chia-Pin Chiu ,  Himanshu Pokharna

Inventor： Ravi Prasher ,  Chia-Pin Chiu ,  Himanshu Pokharna

IPC: F28D15/02 ,  H01L23/34 ,  H01L23/427 ,  H01L23/473

CPC classification number: H01L23/427 ,  F28D15/0266 ,  H01L23/473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An apparatus, method, and system for a thermal management arrangement for cooling semiconductor packages with channels structurally adapted for varying heat flux areas.

Abstract translation: 一种用于冷却具有结构上适于改变热通量区域的通道的半导体封装的热管理装置的装置，方法和系统。