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    VIA STRUCTURE IN MULTI-LAYER SUBSTRATE AND MANUFACTURING METHOD THEREOF
    2.
    发明申请
    VIA STRUCTURE IN MULTI-LAYER SUBSTRATE AND MANUFACTURING METHOD THEREOF 有权
    通过多层基板的结构及其制造方法

    公开(公告)号：US20100108363A1

    公开(公告)日：2010-05-06

    申请号：US12582647

    申请日：2009-10-20

    申请人： Chih-kuang Yang

    发明人： Chih-kuang Yang

    IPC分类号： H01R12/04 ,  H01R43/16

    CPC分类号： H05K1/116 ,  H05K1/0393 ,  H05K1/115 ,  H05K3/048 ,  H05K3/4076 ,  H05K2201/09509 ,  H05K2201/09545 ,  H05K2201/09645 ,  H05K2201/09827 ,  Y10T29/49204

    摘要： Disclosed is a via structure in a multi-layer substrate, comprising a first metal layer, a dielectric layer and a second metal layer. The first metal layer has an upper surface. The dielectric layer covers the first metal layer in which a via is opened to expose the upper surface. The second metal layer is formed in the via and contacts an upper surface and an inclined wall of the via. A contacting surface of the second metal layer has a top line lower than the upper edge of the inclined wall. Alternatively, the second metal layer can be formed on the dielectric layer as being a metal line simultaneously as formed in the via as being a pad. The metal line and the pad are connected electronically. The aforesaid metal second layer can be formed in the via and on the dielectric layer by a metal lift-off process.

    摘要翻译： 公开了一种多层基板中的通孔结构，包括第一金属层，电介质层和第二金属层。 第一金属层具有上表面。 电介质层覆盖第一金属层，其中通孔被打开以暴露上表面。 第二金属层形成在通孔中并与通孔的上表面和倾斜壁接触。 第二金属层的接触表面具有比倾斜壁的上边缘低的顶线。 或者，第二金属层可以作为金属线形成在电介质层上，同时形成在通孔中作为焊盘。 金属线和焊盘以电子方式连接。 上述金属第二层可以通过金属剥离工艺在通孔和电介质层上形成。

    HYBRID STRUCTURE OF MULTI-LAYER SUBSTRATES AND MANUFACTURE METHOD THEREOF
    3.
    发明申请
    HYBRID STRUCTURE OF MULTI-LAYER SUBSTRATES AND MANUFACTURE METHOD THEREOF 有权
    多层基板的混合结构及其制造方法

    公开(公告)号：US20080138575A1

    公开(公告)日：2008-06-12

    申请号：US11856858

    申请日：2007-09-18

    申请人： Chih-kuang Yang

    发明人： Chih-kuang Yang

    IPC分类号： B32B3/10 ,  H01R43/00

    CPC分类号： H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

    摘要翻译： 多层基板的混合结构包括第一多层基板和第二多层基板。 第一多层基板交替地堆叠第一金属层，第一介电层并具有VIA。 第一金属层的边界区域与相应的第一介电层的边界区域连接。 边界区域与相邻的第一金属层和相邻的第一介电层分离。 第二多层基板交替堆叠第二金属层和第二电介质层。 第二金属层的边界区域与相应的第二电介质层的边界区域连接。 边界区域与相邻的第二金属层和相邻的第二介电层分离。 VIA位于第一电介质层的边界区，并且每个VIA具有导电体，以将一个第一金属层与一个第二金属层连接。

    MANUFACTURING METHOD OF METAL STRUCTURE IN MULTI-LAYER SUBSTRATE
    4.
    发明申请
    MANUFACTURING METHOD OF METAL STRUCTURE IN MULTI-LAYER SUBSTRATE 有权
    多层基板金属结构的制造方法

    公开(公告)号：US20120202159A1

    公开(公告)日：2012-08-09

    申请号：US13447326

    申请日：2012-04-16

    申请人： Chih-kuang Yang

    发明人： Chih-kuang Yang

    IPC分类号： G03F7/20

    CPC分类号： B05D5/12 ,  C23C18/1603 ,  C23C18/1605 ,  C23C18/31 ,  G03F7/091 ,  H01L21/288 ,  H05K3/048 ,  H05K3/107 ,  H05K3/244 ,  H05K2201/09036

    摘要： Disclosed is a manufacturing method of metal structure in multi-layer substrate. The manufacturing method includes following steps: coating at least one photoresist layer on a surface of a dielectric layer; exposing the photoresist dielectric layer to define a predetermined position of the metal structure; removing the photoresist layer at the predetermined position to undercut an edge of the photoresist layer adjacent to the predetermined position by a horizontal distance of at least 0.1 μm between a top and a bottom of the edge; forming the metal structure at the predetermined position; and forming at least one top-cover metal layer to cover a top surface and two side surfaces of the metal structure. The present invention can form a cover metal layer covering the top surface and the two side surfaces by one single photomask.

    摘要翻译： 公开了多层基板中的金属结构体的制造方法。 该制造方法包括以下步骤：在电介质层的表面上涂覆至少一层光致抗蚀剂层; 暴露所述光致抗蚀剂介电层以限定所述金属结构的预定位置; 在预定位置移除光致抗蚀剂层，以使邻近预定位置的光致抗蚀剂层的边缘在边缘的顶部和底部之间的水平距离为至少0.1μm; 在预定位置形成金属结构; 以及形成至少一个顶盖金属层以覆盖金属结构的顶表面和两个侧表面。 本发明可以通过单个光掩模形成覆盖顶表面和两个侧表面的覆盖金属层。

    Structure combining an IC integrated substrate and a carrier, and method of manufacturing such structure
    5.
    发明授权
    Structure combining an IC integrated substrate and a carrier, and method of manufacturing such structure 有权
    结合IC集成基板和载体的结构，以及制造这种结构的方法

    公开(公告)号：US07993973B2

    公开(公告)日：2011-08-09

    申请号：US12267374

    申请日：2008-11-07

    申请人： Chih-kuang Yang

    发明人： Chih-kuang Yang

    IPC分类号： H01L21/00

    CPC分类号： H01L21/6835 ,  H01L27/1266 ,  H01L29/78603 ,  H01L2221/68318 ,  H01L2221/6835 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/3025 ,  H01L2924/00

    摘要： The present invention provides a structure combining an IC integrated substrate and a carrier, which comprises a carrier and an IC integrated substrate formed on the carrier. The interface between the IC integrated substrate and the carrier has a specific area at which the interface adhesion is different from that at the remaining area of the interface. The present invention also provides a method of manufacturing the above structure and a method of manufacturing electronic devices using the above structure.

    摘要翻译： 本发明提供一种结合IC集成基板和载体的结构，其包括载体和形成在载体上的IC集成基板。 IC集成基板和载体之间的界面具有与界面的其余区域的界面粘合不同的特定区域。 本发明还提供一种制造上述结构的方法和使用上述结构制造电子器件的方法。

    HYBRID STRUCTURE OF MULTI-LAYER SUBSTRATES AND MANUFACTURE METHOD THEREOF
    6.
    发明申请
    HYBRID STRUCTURE OF MULTI-LAYER SUBSTRATES AND MANUFACTURE METHOD THEREOF 有权
    多层基板的混合结构及其制造方法

    公开(公告)号：US20110124155A1

    公开(公告)日：2011-05-26

    申请号：US13015739

    申请日：2011-01-28

    申请人： Chih-kuang Yang

    发明人： Chih-kuang Yang

    IPC分类号： H01L21/50

    CPC分类号： H05K1/147 ,  H01L23/13 ,  H01L23/5385 ,  H01L25/162 ,  H01L2224/48091 ,  H01L2924/01322 ,  H01L2924/19107 ,  H05K1/142 ,  H05K3/4611 ,  H05K2201/058 ,  H05K2201/091 ,  H05K2201/09109 ,  H05K2201/0919 ,  H05K2201/09481 ,  Y10T29/417 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T428/24322 ,  Y10T428/24917 ,  H01L2924/00014 ,  H01L2924/00

    摘要： A hybrid structure of multi-layer substrates comprises a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate stacks up first metal layers, first dielectric layers alternately and has VIAs. A border district of a first metal layer connects with a border district of the corresponding first dielectric layer. The border districts are separated from adjacent first metal layers and adjacent first dielectric layers. The second multi-layer substrate stacks up second metal layers and second dielectric layers alternately. A border district of a second metal layer connects with a border district of the corresponding second dielectric layer. The border districts are separated from adjacent second metal layers and adjacent second dielectric layers. The VIAs are located at the border districts of the first dielectric layers and each VIA has electric conductor therein to connect one first metal layer with one second metal layer.

    摘要翻译： 多层基板的混合结构包括第一多层基板和第二多层基板。 第一多层基板交替地堆叠第一金属层，第一介电层并具有VIA。 第一金属层的边界区域与相应的第一介电层的边界区域连接。 边界区域与相邻的第一金属层和相邻的第一介电层分离。 第二多层基板交替堆叠第二金属层和第二电介质层。 第二金属层的边界区域与相应的第二电介质层的边界区域连接。 边界区域与相邻的第二金属层和相邻的第二介电层分离。 VIA位于第一电介质层的边界区，并且每个VIA具有导电体，以将一个第一金属层与一个第二金属层连接。

    METHOD TO DECREASE WARPAGE OF MULTI-LAYER SUBSTRATE AND STRUCTURE THEREOF
    7.
    发明申请
    METHOD TO DECREASE WARPAGE OF MULTI-LAYER SUBSTRATE AND STRUCTURE THEREOF 审中-公开
    减少多层基板的翘曲及其结构的方法

    公开(公告)号：US20090208712A1

    公开(公告)日：2009-08-20

    申请号：US12207685

    申请日：2008-09-10

    申请人： Chih-kuang Yang

    发明人： Chih-kuang Yang

    IPC分类号： B32B3/10

    CPC分类号： B32B3/04 ,  B32B7/02 ,  B32B15/00 ,  H05K1/0271 ,  H05K3/4611 ,  H05K2201/09136 ,  H05K2201/09781 ,  Y10T428/12493 ,  Y10T428/24917

    摘要： Disclosed is a method to decrease warpage of a multi-layer substrate, comprises a first metal layer and a second metal layer. First area of the first metal layer is larger than second area of the second metal layer. In the same layer of the second metal layer, a redundant metal layer can be set to make a redundant metal layer area plus the second area considerably equivalent to the first area. Alternatively, a redundant space can be set in the first metal layer to achieve the same result. When the multi-layer substrate comprises a first dielectric layer with an opening and a second dielectric layer, a redundant opening positioned corresponding to the opening can be set in the second dielectric layer. The present invention employs a method of balancing the multi-layer substrate stress, i.e. to homogenize the multi-layer structure composed of different metal layers and dielectric layers to decrease warpage thereof.

    摘要翻译： 公开了减少多层基板翘曲的方法，包括第一金属层和第二金属层。 第一金属层的第一区域大于第二金属层的第二区域。 在第二金属层的相同层中，可以设置冗余金属层以形成与第一区域大致相当的冗余金属层区域加上第二区域。 或者，可以在第一金属层中设置冗余空间以获得相同的结果。 当多层基板包括具有开口和第二介电层的第一电介质层时，可以在第二电介质层中设置对应于开口的冗余开口。 本发明采用平衡多层基板应力的方法，即均匀化由不同金属层和电介质层组成的多层结构，以减少其翘曲。