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1.发明授权Methods for improved adhesion of protective layers of imager microlens structures by forming an interfacial region 有权通过形成界面区域来改善成像器微透镜结构的保护层的附着的方法公开(公告)号：US08476099B2
公开(公告)日：2013-07-02
申请号：US12841750
申请日：2010-07-22
申请人： Edward C. Cooney, III , Jeffrey P. Gambino , Robert K. Leidy , Charles F. Musante , John G. Twombly
发明人： Edward C. Cooney, III , Jeffrey P. Gambino , Robert K. Leidy , Charles F. Musante , John G. Twombly
IPC分类号： H01L21/473 , H01L31/18
CPC分类号： H01L31/02325 , C23C16/02 , C23C16/0272 , C23C16/402 , C23C16/505 , G06F17/5045 , H01L27/14627 , H01L27/14685
摘要： Methods, structures, and design structures for improved adhesion of protective layers of imager microlens structures are disclosed. A method of fabricating a semiconductor structure includes forming an interfacial region between a microlens and a protective oxide layer. The interfacial region has a lower concentration of oxygen than the protective oxide layer.
摘要翻译： 公开了用于改善成像器微透镜结构保护层附着力的方法，结构和设计结构。 制造半导体结构的方法包括在微透镜和保护氧化物层之间形成界面区域。 界面区域的氧浓度低于保护氧化物层。
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公开(公告)号：US09831122B2
公开(公告)日：2017-11-28
申请号：US13482864
申请日：2012-05-29
IPC分类号： H01L23/48 , H01L21/768 , H01L23/522 , H01L23/525 , H01L23/532 , H01L23/31 , H01L23/00
CPC分类号： H01L23/5226 , H01L21/76843 , H01L21/76879 , H01L21/76885 , H01L23/3114 , H01L23/3192 , H01L23/5227 , H01L23/525 , H01L23/53238 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/03462 , H01L2224/03831 , H01L2224/04042 , H01L2224/05567 , H01L2224/05624 , H01L2924/00014 , H01L2924/01029 , H01L2924/12042 , H01L2224/05552 , H01L2924/00
摘要： An integrated circuit (IC), design structure, and a method of making the same. In one embodiment, the IC includes: a substrate; a dielectric layer disposed on the substrate; a set of wire components disposed on the dielectric layer, the set of wire components including a first wire component disposed proximate a second wire component; a bond pad disposed on the first wire component, the bond pad including an exposed portion; a passivation layer disposed on the dielectric layer about a portion of the bond pad and the set of wire components, the passivation layer defining a wire structure via connected to the second wire component; and a wire structure disposed on the passivation layer proximate the bond pad and connected to the second wire component through the wire structure via.
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3.发明申请INTEGRATED CIRCUIT INCLUDING WIRE STRUCTURE, RELATED METHOD AND DESIGN STRUCTURE 有权集成电路，包括电线结构，相关方法和设计结构公开(公告)号：US20130320536A1
公开(公告)日：2013-12-05
申请号：US13482864
申请日：2012-05-29
IPC分类号： H01L23/52 , G06F17/50 , H01L21/768
CPC分类号： H01L23/5226 , H01L21/76843 , H01L21/76879 , H01L21/76885 , H01L23/3114 , H01L23/3192 , H01L23/5227 , H01L23/525 , H01L23/53238 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L2224/02166 , H01L2224/03462 , H01L2224/03831 , H01L2224/04042 , H01L2224/05567 , H01L2224/05624 , H01L2924/00014 , H01L2924/01029 , H01L2924/12042 , H01L2224/05552 , H01L2924/00
摘要： An integrated circuit (IC), design structure, and a method of making the same. In one embodiment, the IC includes: a substrate; a dielectric layer disposed on the substrate; a set of wire components disposed on the dielectric layer, the set of wire components including a first wire component disposed proximate a second wire component; a bond pad disposed on the first wire component, the bond pad including an exposed portion; a passivation layer disposed on the dielectric layer about a portion of the bond pad and the set of wire components, the passivation layer defining a wire structure via connected to the second wire component; and a wire structure disposed on the passivation layer proximate the bond pad and connected to the second wire component through the wire structure via.
摘要翻译： 集成电路（IC），设计结构及其制作方法。 在一个实施例中，IC包括：衬底; 设置在所述基板上的电介质层; 设置在电介质层上的一组电线组件，该组电线组件包括靠近第二电线组件设置的第一电线组件; 设置在所述第一线材部件上的接合焊盘，所述接合焊盘包括暴露部分; 围绕所述接合焊盘和所述一组导线部件的一部分设置在所述电介质层上的钝化层，所述钝化层通过连接到所述第二导线部件限定线结构; 以及布线在靠近接合焊盘的钝化层上并通过导线结构通孔连接到第二导线部件的线结构。
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公开(公告)号：US20090302406A1
公开(公告)日：2009-12-10
申请号：US12132875
申请日：2008-06-04
CPC分类号： H01L27/14627 , H01L27/1463 , H01L27/14632 , H01L27/14636
摘要： A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.
摘要翻译： 多个图像传感器结构和用于制造多个图像传感器结构的多种方法提供了相对于多个图像传感器结构内的平坦化层的透镜封盖层的抑制性破裂和分层。 特定的图像传感器结构和相关方法包括与位于特定图像传感器结构内的衬底的电路部分之上的有源透镜层不同的至少一个虚拟透镜层。 另外特定的图像传感器结构包括平坦化层内的孔径和位于特定图像传感器结构内的电路部分上方的平坦化层的倾斜端壁中的至少一个。
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公开(公告)号：US08409899B2
公开(公告)日：2013-04-02
申请号：US13025681
申请日：2011-02-11
IPC分类号： H01L29/72
CPC分类号： H01L27/14627 , H01L27/1463 , H01L27/14632 , H01L27/14636
摘要： A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.
摘要翻译： 多个图像传感器结构和用于制造多个图像传感器结构的多种方法提供了相对于多个图像传感器结构内的平坦化层的透镜封盖层的抑制性破裂和分层。 特定的图像传感器结构和相关方法包括与位于特定图像传感器结构内的衬底的电路部分之上的有源透镜层不同的至少一个虚拟透镜层。 另外特定的图像传感器结构包括平坦化层内的孔径和位于特定图像传感器结构内的电路部分上方的平坦化层的倾斜端壁中的至少一个。
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公开(公告)号：US20110129955A1
公开(公告)日：2011-06-02
申请号：US13025681
申请日：2011-02-11
IPC分类号： H01L31/0232
CPC分类号： H01L27/14627 , H01L27/1463 , H01L27/14632 , H01L27/14636
摘要： A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.
摘要翻译： 多个图像传感器结构和用于制造多个图像传感器结构的多种方法提供相对于多个图像传感器结构内的平坦化层的透镜封盖层的抑制性破裂和分层。 特定的图像传感器结构和相关方法包括与位于特定图像传感器结构内的衬底的电路部分之上的有源透镜层不同的至少一个虚拟透镜层。 另外特定的图像传感器结构包括平坦化层内的孔径和位于特定图像传感器结构内的电路部分上方的平坦化层的倾斜端壁中的至少一个。
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公开(公告)号：US07928527B2
公开(公告)日：2011-04-19
申请号：US12132875
申请日：2008-06-04
IPC分类号： H01L29/72
CPC分类号： H01L27/14627 , H01L27/1463 , H01L27/14632 , H01L27/14636
摘要： A plurality of image sensor structures and a plurality of methods for fabricating the plurality of image sensor structures provide for inhibited cracking and delamination of a lens capping layer with respect to a planarizing layer within the plurality of image sensor structures. Particular image sensor structures and related methods include at least one dummy lens layer of different dimensions than active lens layer located over a circuitry portion of a substrate within the particular image sensor structures. Additional particular image sensor structures include at least one of an aperture within the planarizing layer and a sloped endwall of the planarizing layer located over a circuitry portion within the particular image sensor structures.
摘要翻译： 多个图像传感器结构和用于制造多个图像传感器结构的多种方法提供了相对于多个图像传感器结构内的平坦化层的透镜封盖层的抑制性破裂和分层。 特定的图像传感器结构和相关方法包括与位于特定图像传感器结构内的衬底的电路部分之上的有源透镜层不同的至少一个虚拟透镜层。 另外特定的图像传感器结构包括平坦化层内的孔径和位于特定图像传感器结构内的电路部分上方的平坦化层的倾斜端壁中的至少一个。
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公开(公告)号：US08765595B2
公开(公告)日：2014-07-01
申请号：US13345120
申请日：2012-01-06
IPC分类号： H01L21/4763
CPC分类号： H01L23/5227 , H01L21/76883 , H01L23/5283 , H01L23/5329 , H01L23/53295 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： Methods for fabricating a back-end-of-line (BEOL) wiring structure, BEOL wiring structures, and design structures for a BEOL wiring structure. The BEOL wiring may be fabricated by forming a first wire in a dielectric layer and annealing the first wire in an oxygen-free atmosphere. After the first wire is annealed, a second wire is formed in vertical alignment with the first wire. A final passivation layer, which is comprised of an organic material such as polyimide, is formed that covers an entirety of a sidewall of the second wire.
摘要翻译： BEOL布线结构的制造方法，BEOL布线结构以及BEOL布线结构的设计结构。 BEOL布线可以通过在电介质层中形成第一布线并在无氧气氛中退火第一布线来制造。 在第一线退火之后，形成与第一线垂直对准的第二线。 形成由诸如聚酰亚胺的有机材料组成的最终钝化层，其覆盖第二线的整个侧壁。
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9.发明授权Device and methodology for reducing effective dielectric constant in semiconductor devices 有权用于降低半导体器件中有效介电常数的器件和方法公开(公告)号：US08343868B2
公开(公告)日：2013-01-01
申请号：US13005201
申请日：2011-01-12
申请人： Daniel C. Edelstein , Matthew E. Colburn , Edward C. Cooney, III , Timothy J. Dalton , John A. Fitzsimmons , Jeffrey P. Gambino , Elbert E. Huang , Michael W. Lane , Vincent J. McGahay , Lee M. Nicholson , Satyanarayana V. Nitta , Sampath Purushothaman , Sujatha Sankaran , Thomas M. Shaw , Andrew H. Simon , Anthony K. Stamper
发明人： Daniel C. Edelstein , Matthew E. Colburn , Edward C. Cooney, III , Timothy J. Dalton , John A. Fitzsimmons , Jeffrey P. Gambino , Elbert E. Huang , Michael W. Lane , Vincent J. McGahay , Lee M. Nicholson , Satyanarayana V. Nitta , Sampath Purushothaman , Sujatha Sankaran , Thomas M. Shaw , Andrew H. Simon , Anthony K. Stamper
IPC分类号： H01L21/00
CPC分类号： B82Y30/00 , H01L21/0332 , H01L21/31111 , H01L21/31144 , H01L21/7682 , H01L21/76829 , H01L23/5222 , H01L23/53295 , H01L2924/0002 , Y10S438/947 , H01L2924/00
摘要： Method of manufacturing a structure which includes the steps of providing a structure having an insulator layer with at least one interconnect, forming a sub lithographic template mask over the insulator layer, and selectively etching the insulator layer through the sub lithographic template mask to form sub lithographic features spanning to a sidewall of the plurality of interconnects.
摘要翻译： 一种制造结构的方法，包括以下步骤：提供具有至少一个互连的绝缘体层的结构，在绝缘体层上形成次级光刻模板掩模，以及通过次级光刻模板掩模选择性地蚀刻绝缘体层以形成次光刻 特征跨越到多个互连的侧壁。
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公开(公告)号：US20110227225A1
公开(公告)日：2011-09-22
申请号：US13116622
申请日：2011-05-26
申请人： Daniel C. Edelstein , Edward C. Cooney, III , John A. Fitzsimmons , Jeffrey P. Gambino , Anthony K. Stamper
发明人： Daniel C. Edelstein , Edward C. Cooney, III , John A. Fitzsimmons , Jeffrey P. Gambino , Anthony K. Stamper
IPC分类号： H01L23/48
CPC分类号： H01L23/53238 , H01L23/5226 , H01L2924/0002 , Y10T428/12493 , H01L2924/00
摘要： Improved mechanical and adhesive strength and resistance to breakage of copper integrated circuit interconnections is obtained by forming a copper alloy in a copper via/wiring connection in an integrated circuit while minimizing adverse electrical effects of the alloy by confining the alloy to an interfacial region of said via/wiring connection and not elsewhere by a barrier which reduces or substantially eliminates the thickness of alloy in the conduction path. The alloy location and composition are further stabilized by reaction of all available alloying material with copper, copper alloys or other metals and their alloys.
摘要翻译： 通过在集成电路中的铜通孔/布线连接中形成铜合金，同时通过将合金限制在所述合金的界面区域来最小化合金的不利电效应来获得铜集成电路互连的改进的机械和粘合强度和断裂性 通孔/布线连接，而不在其他地方，通过减小或基本消除导电路径中合金的厚度。 通过所有可用的合金材料与铜，铜合金或其他金属及其合金的反应，合金位置和组成进一步稳定。
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