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158 条记录 (耗时 0.034 秒)

    Information recording device
    1.
    发明授权
    Information recording device 失效

    公开(公告)号：US06269225B1

    公开(公告)日：2001-07-31

    申请号：US09345950

    申请日：1999-07-01

    申请人： Eiji Sato ,  Shiro Narikawa ,  Tomoko Nishino ,  Masao Yamamoto

    发明人： Eiji Sato ,  Shiro Narikawa ,  Tomoko Nishino ,  Masao Yamamoto

    IPC分类号： G03B2900

    CPC分类号： G02F1/133348 ,  G09G3/36 ,  G09G2310/02 ,  H04N1/00127 ,  H04N1/00246 ,  H04N1/12 ,  H04N1/193 ,  H04N1/23

    摘要： A device main body is formed portable, which includes (i) an information writing/erasing section which erases information recorded in a liquid crystal paper and returns the liquid crystal paper into an initialized state in which information recording is possible, and records information previously stored in the device main body into the initialized liquid crystal paper as required, and (ii) a sheet holding section which holds the liquid crystal paper in such a manner that the liquid crystal paper can be transported to an information erasure position and an information recording position in the information writing/erasing section and that the liquid crystal paper is curved at portions thereof other than those at which information recording and erasing is carried out. With this, it is possible to provide an information recording device with improved operability, such as improved portability and capability of easily reading out information at any place.

    Recording medium including liquid crystal layer
    2.
    发明授权
    Recording medium including liquid crystal layer 有权

    公开(公告)号：US06424387B1

    公开(公告)日：2002-07-23

    申请号：US09799752

    申请日：2001-03-07

    申请人： Eiji Sato ,  Shiro Narikawa ,  Tomoko Nishino ,  Masao Yamamoto

    发明人： Eiji Sato ,  Shiro Narikawa ,  Tomoko Nishino ,  Masao Yamamoto

    IPC分类号： G02F113

    摘要： A device main body is formed portable, which includes (i) an information writing/erasing section which erases information recorded in a liquid crystal paper and returns the liquid crystal paper into an initialized state in which information recording is possible, and records information previously stored in the device main body into the initialized liquid crystal paper as required, and (ii) a sheet holding section which holds the liquid crystal paper in such a manner that the liquid crystal paper can be transported to an information erasure position and an information recording position in the information writing/erasing section and that the liquid crystal paper is curved at portions thereof other than those at which information recording and erasing is carried out. With this, it is possible to provide an information recording device with improved operability, such as improved portability and capability of easily reading out information at any place.

    SEMICONDUCTOR DEVICE HAVING THROUGH-SUBSTRATE VIA
    4.
    发明申请
    SEMICONDUCTOR DEVICE HAVING THROUGH-SUBSTRATE VIA 审中-公开
    具有通过基底的半导体器件

    公开(公告)号：US20130181349A1

    公开(公告)日：2013-07-18

    申请号：US13599041

    申请日：2012-08-30

    申请人： Chie KOYAMA ,  Satoyuki Miyako ,  Eiji Sato

    发明人： Chie KOYAMA ,  Satoyuki Miyako ,  Eiji Sato

    IPC分类号： H01L23/498

    CPC分类号： H01L23/481 ,  H01L21/76224 ,  H01L23/5225 ,  H01L23/5286 ,  H01L27/14618 ,  H01L27/14636 ,  H01L2924/0002 ,  H01L2924/00

    摘要： According to an embodiment, a semiconductor device includes a first circuit block, a first through-substrate via, and a back surface wiring. The first circuit block is provided on a surface side of a semiconductor substrate. The first through-substrate via is provided along a circumference of the first circuit block so as to separate the first circuit block from other circuit blocks. The first circuit block is provided so as to penetrate the surface of the semiconductor substrate. The first circuit block is isolated from the surroundings. The first circuit block has conductivity. The back surface wiring is provided on the back surface side of the semiconductor substrate. The back surface wiring is connected to the first through-substrate via. The back surface wiring connects the first through-substrate via to a power supply terminal or a shield potential terminal.

    摘要翻译： 根据实施例，半导体器件包括第一电路块，第一贯穿衬底通孔和背面布线。 第一电路块设置在半导体衬底的表面侧。 沿着第一电路块的圆周设置第一贯穿衬底通孔，以将第一电路块与其它电路块分离。 第一电路块被设置为穿透半导体衬底的表面。 第一个电路块与周围环境隔绝。 第一个电路块具有导电性。 背面布线设置在半导体基板的背面侧。 背面布线连接到第一贯穿基板通孔。 背面布线将第一贯穿基板通孔连接到电源端子或屏蔽电位端子。

    WELDING CONTROL APPARATUS FOR PULSE ARC WELDING OF CONSUMED ELECTRODE TYPE, ARC LENGTH CONTROL METHOD FOR USE WITH THE SAME, AND WELDING SYSTEM INCLUDING THE WELDING CONTROL APPARATUS
    9.
    发明申请
    WELDING CONTROL APPARATUS FOR PULSE ARC WELDING OF CONSUMED ELECTRODE TYPE, ARC LENGTH CONTROL METHOD FOR USE WITH THE SAME, AND WELDING SYSTEM INCLUDING THE WELDING CONTROL APPARATUS 有权
    用于消费电极类型的脉冲电弧焊接的焊接控制装置，与其一起使用的弧长控制方法以及包括焊接控制装置的焊接系统

    公开(公告)号：US20100200553A1

    公开(公告)日：2010-08-12

    申请号：US12684314

    申请日：2010-01-08

    申请人： Kei YAMAZAKI ,  Keiichi Suzuki ,  Masahiro Honma ,  Eiji Sato

    发明人： Kei YAMAZAKI ,  Keiichi Suzuki ,  Masahiro Honma ,  Eiji Sato

    IPC分类号： B23K9/10

    CPC分类号： B23K9/092 ,  B23K9/073 ,  B23K9/0953 ,  B23K9/0956 ,  B23K9/173

    摘要： A welding control apparatus according to the present invention includes an integrator for starting calculation of a voltage error integral value Sv2, expressed by a formula (1) given below, from a time when a first pulse period ends and a second pulse period starts in a pulse cycle, based on various data of information regarding a gradient Ks of an external characteristic of a welding power supply and a welding current setting value Is2 and a welding voltage setting value Vs2 both in a second pulse period, which are preset as parameters in the formula (1), as well as on an instantaneous value Io2 of a welding current and an instantaneous value Vo2 of a welding voltage both detected in the second pulse period, a comparator for comparatively determining whether a value of the voltage error integral value Sv2 provided as the calculation result has become 0, and a waveform generator for, per pulse cycle, terminating the relevant pulse cycle and starting a next pulse cycle at a time when the value of the voltage error integral value Sv2 has become 0, whereby a variation in an arc length caused by disturbances is precisely suppressed in pulse arc welding of consumed electrode type: Sv2=∫{Ks(Io2−Is2)+Vs2−Vo2}dt  (1)

    摘要翻译： 根据本发明的焊接控制装置包括积分器，用于从第一脉冲期间结束时开始第二脉冲期间开始计算电压误差积分值Sv2，由下面给出的公式（1）表示， 基于关于焊接电源的外部特性的梯度Ks和焊接电流设定值Is2以及焊接电压设定值Vs2的信息的各种数据，在第二脉冲期间，作为参数被预先设定 公式（1），以及在第二脉冲周期中检测到的焊接电流的瞬时值Io2和焊接电压的瞬时值Vo2，比较器，用于相对确定是否提供电压误差积分值Sv2的值 当计算结果为0时，以及每个脉冲周期的波形发生器终止相关的脉冲周期，并在下一个脉冲周期开始下一个脉冲周期 电压误差积分值Sv2的e值变为0，从而在消耗电极类型的脉冲电弧焊中精确地抑制由干扰引起的电弧长度的变化：Sv2 =∫{Ks（Io2-Is2）+ Vs2-Vo2} dt（1）