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9 条记录 (耗时 0.019 秒)

    CONTROL SYSTEM
    1.
    发明申请
    CONTROL SYSTEM 有权

    公开(公告)号：US20210173936A1

    公开(公告)日：2021-06-10

    申请号：US16768729

    申请日：2018-12-04

    申请人： Hitachi, Ltd.

    发明人： Nobuyasu KANEKAWA

    IPC分类号： G06F21/57 ,  G07C5/08 ,  G05B9/03 ,  G05B13/02

    摘要： The present invention is capable of realizing normal control of a control device and safe operation of a control target. In the present invention, an automatic control unit 10 generates a control output that is output to a control target in response to an input 1. A safety verification control unit 20 is configured to verify safety of the control output at a plurality of verification levels, and controls the control output on the basis of the verification result. A verification level selection unit manages the state related to the normality of the automatic control unit 10, and selects the verification level of the safety of the control output in the safety verification control unit 20 in accordance with the state.

    SAFETY CONTROL DEVICE AND SAFETY RULE ADJUSTMENT METHOD
    2.
    发明公开
    SAFETY CONTROL DEVICE AND SAFETY RULE ADJUSTMENT METHOD 审中-公开

    公开(公告)号：US20240053766A1

    公开(公告)日：2024-02-15

    申请号：US18271527

    申请日：2021-11-02

    申请人： Hitachi, Ltd.

    发明人： Nobuyasu KANEKAWA ,  Junya TAKAHASHI ,  Satoshi OTSUKA ,  Hiroyuki YAMADA

    IPC分类号： G05D1/02

    CPC分类号： G05D1/0289

    摘要： The problem of ensuring safety and work efficiency for the actions of a control target is addressed in an environment in which different types of control systems coexist. A safety control server controls the actions of respective control targets in differing systems and includes an action adjustment unit that, for each control target of differing control systems, outputs to a control target an action adjustment instruction for adjusting the action of that control target when a contention occurs in which the action of that control target deviates from an assumed control result. An action plan adjustment unit, when the adjustment of the action satisfies a prescribed condition, adjusts an action plan indicating an action rule for achieving a function and avoiding a contention in a control target; and a safety rule adjustment unit adjusts a safety rule indicating an action rule for avoiding a contention in the control target.

    CONTROL SYSTEM AND CONTROL METHOD
    3.
    发明申请
    CONTROL SYSTEM AND CONTROL METHOD 审中-公开

    公开(公告)号：US20200089180A1

    公开(公告)日：2020-03-19

    申请号：US16470874

    申请日：2017-02-22

    申请人： HITACHI, LTD.

    发明人： Nobuyasu KANEKAWA

    IPC分类号： G05B19/042 ,  G05B9/02

    摘要： A control system includes: an operation interface generates operation amount information and priority information on the basis of an operation amount; an automatic control unit generates an automatic control output based on a predetermined input; a safety verification unit verifies the safety of the automatic control output; and an output control unit produces a control output in accordance with the automatic control output or the operation amount information on the basis of the automatic control output, the operation amount information, the priority information, and the safety verification result from the safety verification unit. The control output is generated in accordance with the automatic control output, in accordance with the operation amount information only when the control output is verified as safe by the safety verification unit, or in accordance with the operation amount information regardless of whether the control output is verified as safe by the safety verification unit.

    Programmable Device, Error Storage System, and Electronic System Device
    4.
    发明申请
    Programmable Device, Error Storage System, and Electronic System Device 审中-公开
    可编程器件，错误存储系统和电子系统器件

    公开(公告)号：US20160335145A1

    公开(公告)日：2016-11-17

    申请号：US15110278

    申请日：2014-01-24

    申请人： Hitachi, Ltd.

    发明人： Tadanobu TOBA ,  Kenichi SHIMBO ,  Yusuke KANNO ,  Nobuyasu KANEKAWA ,  Kotara SHIMAMURA ,  Hiromichi YAMADA

    IPC分类号： G06F11/07 ,  H03K19/177

    CPC分类号： G06F11/079 ,  G06F11/0727 ,  G06F11/073 ,  G06F11/0751 ,  G06F11/0754 ,  G06F11/0772 ,  G06F11/0793 ,  H03K19/1776 ,  H03K19/17764

    摘要： The present invention aims to provide a programmable device with a configuration memory that can hold the state of the occurrence abnormal situation that is difficult to assume such as a failure occurring in the programmable device due to the terrestrial radiation of the configuration memory, even during power off, in order to improve the reproducibility in device testing based on the held error information. The programmable device with the configuration memory includes: an error detection section for detecting an error in the configuration memory, and outputting the detected error as well as an address in which the error occurred, as error information; and an error information holding section provided with a non-volatile memory to store the output error information.

    摘要翻译： 本发明的目的在于提供一种具有配置存储器的可编程设备，即使在电源期间，由于配置存储器的地面辐射，可以保持难以产生的发生异常情况的状态，例如在可编程设备中发生的故障 以提高基于所保持的错误信息的设备测试中的再现性。 具有配置存储器的可编程设备包括：错误检测部分，用于检测配置存储器中的错误，并将检测到的错误以及发生错误的地址输出作为错误信息; 以及设置有用于存储输出错误信息的非易失性存储器的错误信息保持部。

    Programmable Logic Device and Logic Integration Tool
    5.
    发明申请
    Programmable Logic Device and Logic Integration Tool 有权
    可编程逻辑器件和逻辑集成工具

    公开(公告)号：US20160241247A1

    公开(公告)日：2016-08-18

    申请号：US15025821

    申请日：2013-09-30

    申请人： HITACHI, LTD.

    发明人： Yusuke KANNO ,  Nobuyasu KANEKAWA ,  Kotaro SHIMAMURA ,  Tadanobu TOBA ,  Teppei HIROTSU ,  Tsutomu YAMADA

    IPC分类号： H03K19/177 ,  H03K19/21

    CPC分类号： H03K19/17764 ,  H03K19/17728 ,  H03K19/1776 ,  H03K19/21

    摘要： An object of the present invention is to provide a high reliable/high safe programmable logic device with high error resistance. The present invention provides a programmable logic device that has a plurality of configuration memories. The configuration memories are divided into a plurality of areas and are arranged and a part of the plurality of areas is set to a high reliable area where reliability for a failure of the configuration memory is higher than reliability in the other area.

    摘要翻译： 本发明的目的是提供一种具有高抗错误性的高可靠/高安全性的可编程逻辑器件。 本发明提供一种具有多个配置存储器的可编程逻辑器件。 配置存储器被分成多个区域并且被布置，并且多个区域的一部分被设置为高可靠性区域，其中配置存储器的故障的可靠性高于其他区域中的可靠性。

    Semiconductor Device
    6.
    发明申请
    Semiconductor Device 审中-公开
    半导体器件

    公开(公告)号：US20160254803A1

    公开(公告)日：2016-09-01

    申请号：US15028568

    申请日：2013-10-16

    申请人： HITACHI, LTD.

    发明人： Yusuke KANNO ,  Takeshi SAKATA ,  Nobuyasu KANEKAWA

    IPC分类号： H03K3/037 ,  H03K3/3562

    CPC分类号： H03K3/0375 ,  H03K3/0372 ,  H03K3/35625 ,  H03K19/0948 ,  H03K19/17724 ,  H03K19/17728 ,  H03K19/20 ,  H03K19/23

    摘要： Provided is a semiconductor device capable of reducing a penalty associated with ensuring reliability. The semiconductor device includes a latch circuit which has input/output paths of three systems or more independent from each other. The latch circuit includes a plurality of storage elements STE1 to STE3 which are provided on the input/output paths of the three systems or more, respectively, and hold input data in synchronization with a clock signal. At least one storage element (for example, STE1) of the plurality of storage elements STE1 to STE3 includes a majority decision unit (for example, 81a) executing a majority decision using data from the storage elements provided on other input/output paths different from the input/output path thereof and outputs data in which a result of the majority decision is reflected.

    摘要翻译： 提供了能够减少与确保可靠性相关联的惩罚的半导体器件。 半导体器件包括具有彼此独立的三个系统或更多个输入/输出路径的锁存电路。 锁存电路包括分别设置在三个或更多个系统的输入/输出路径上的多个存储元件STE1至STE3，并且与时钟信号同步地保持输入数据。 多个存储元件STE1至STE3中的至少一个存储元件（例如，STE1）包括使用来自不同于其它输入/输出路径的其他输入/输出路径上提供的存储元件的数据执行多数决定的多数决定单元（例如，81a） 其输入/输出路径并输出反映多数决定结果的数据。

    STORAGE SYSTEM AND STORAGE CONTROLLER FOR STORAGE SYSTEM
    9.
    发明申请
    STORAGE SYSTEM AND STORAGE CONTROLLER FOR STORAGE SYSTEM 有权
    存储系统存储系统和存储控制器

    公开(公告)号：US20130110430A1

    公开(公告)日：2013-05-02

    申请号：US13665118

    申请日：2012-10-31

    申请人： Hitachi, Ltd.

    发明人： Masataka NISHI ,  Nobuyasu KANEKAWA

    IPC分类号： G01R31/36 ,  G06F19/00

    CPC分类号： H01M10/4207 ,  G01D21/00 ,  G01R31/3606 ,  G06F17/40 ,  G06F19/00 ,  H01M10/48 ,  H01M2010/4271

    摘要： A storage control unit for a storage system includes a first storage controller. The first storage controller includes: first voltage detection terminals that is connected to voltage detection lines respectively connected to first storage units, via switches; a first voltage detection circuit that is connected to each of the first voltage detection terminals and that detects a first voltage of each of the first storage units via each of the first voltage detection lines; a first voltage input terminal that a second voltage of each of second storage units that are different from the first storage units is input to; and a first voltage output terminal that is connected to the first voltage detection terminals via switches. The first voltage detection circuit is further connected to the first voltage input terminal and detects the second voltage via the first voltage input terminal.

    摘要翻译： 用于存储系统的存储控制单元包括第一存储控制器。 第一存储控制器包括：经由开关连接到分别连接到第一存储单元的电压检测线的第一电压检测端子; 第一电压检测电路，其连接到每个第一电压检测端子，并且经由每个第一电压检测线检测每个第一存储单元的第一电压; 输入与第一存储单元不同的第二存储单元的第二电压的第一电压输入端子; 以及经由开关连接到第一电压检测端子的第一电压输出端子。 第一电压检测电路还连接到第一电压输入端，并经由第一电压输入端检测第二电压。