公开(公告)号：US06812524B2

公开(公告)日：2004-11-02

申请号：US10013999

申请日：2001-12-11

申请人： Dirk Ahlers ,  Jens-Peer Stengl ,  Jenoe Tihanyi ,  Hans Weber ,  Gerald Deboy ,  Helmut Strack ,  Armin Willmeroth

发明人： Dirk Ahlers ,  Jens-Peer Stengl ,  Jenoe Tihanyi ,  Hans Weber ,  Gerald Deboy ,  Helmut Strack ,  Armin Willmeroth

IPC分类号： H01L2976

CPC分类号： H01L29/7802 ,  H01L29/0619 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/7816

摘要： A semiconductor component includes first and second connection zones formed in a semiconductor body, a channel zone surrounding the second connection zone in the semiconductor body, and a drift path that is formed between the channel zone and the first connection zone and contains a compensation zone. The compensation zone has a complementary conduction type with respect to the drift zone and includes at least two segments. A distance between the two adjacent segments is chosen such that the punch-through voltage between these segments lies in a voltage range that corresponds to the voltage range assumed by the voltage drop across the drift path at currents situated between the rated current and twice the rated current.

摘要翻译： 半导体部件包括形成在半导体本体中的第一和第二连接区域，围绕半导体主体中的第二连接区域的沟道区域以及形成在沟道区域和第一连接区域之间并且包含补偿区域的漂移路径。 补偿区相对于漂移区具有互补导电类型并且包括至少两个段。 选择两个相邻段之间的距离，使得这些段之间的穿通电压位于对应于位于额定电流和额定电流两倍之间的电流处的漂移路径上的电压降所假定的电压范围的电压范围 当前。

公开(公告)号：US06309974B1

公开(公告)日：2001-10-30

申请号：US09156732

申请日：1998-09-17

申请人： Helmut Strack ,  Jens-Peer Stengl

发明人： Helmut Strack ,  Jens-Peer Stengl

IPC分类号： H01L21311

CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/3221 ,  H01L21/3225

摘要： Residual oxygen impurities are eliminated from silicon wafers pulled from a crucible (Czochralski silicon). A multitude of trenches are etched into the back side of the crucible-pulled silicon wafer and the wafer is subsequently heat-treated at about 1100° C. The very large surface area at the front side of the silicon wafer allows oxygen impurities to diffuse out effectively. After the diffusion has been carried out, the trenches are filled with heavily doped polysilicon without leaving gaps.

摘要翻译： 残留的氧杂质从从坩埚（Czochralski硅）中拉出的硅晶片中消除。 大量的沟槽被蚀刻到坩埚拉硅晶片的背面，然后在约1100℃下对晶片进行热处理。硅晶片正面的非常大的表面积允许氧杂质扩散出 有效。 在扩散实施之后，沟槽被重掺杂的多晶硅填充而不留下间隙。

公开(公告)号：US06870201B1

公开(公告)日：2005-03-22

申请号：US09530553

申请日：1998-11-02

申请人： Gerald Deboy ,  Jenoe Tihanyi ,  Helmut Strack ,  Helmut Gassel ,  Jens-Peer Stengl ,  Hans Weber

发明人： Gerald Deboy ,  Jenoe Tihanyi ,  Helmut Strack ,  Helmut Gassel ,  Jens-Peer Stengl ,  Hans Weber

IPC分类号： H01L29/06 ,  H01L29/417 ,  H01L29/739 ,  H01L29/78 ,  H01L29/74

CPC分类号： H01L29/7811 ,  H01L29/0634 ,  H01L29/41766 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7802

摘要： The invention relates to a high voltage resistant edge structure in the edge region of a semiconductor component which has floating guard rings of the first conductivity type and inter-ring zones of the second conductivity type which are arranged between the floating guard rings, wherein the conductivities and/or the inter-ring zones are set such that their charge carriers are totally depleted when blocking voltage is applied. The inventive edge structure achieves a modulation of the electrical field both at the surface and in the volume of the semiconductor body. If the inventive edge structure is suitably dimensioned, the field intensity maximum can easily be situated in the depth; that is, in the region of the vertical p-n junction. Thus, a suitable edge construction which permits a “soft” leakage of the electrical field in the volume can always be provided over a wide range of concentrations of p and n doping.

摘要翻译： 本发明涉及一种半导体元件的边缘区域中的耐高压边缘结构，其具有布置在浮动保护环之间的第一导电类型的浮动保护环和第二导电类型的环形区，其中电导率 和/或环形区域被设置为使得当施加阻断电压时它们的电荷载流子完全耗尽。 本发明的边缘结构在半导体本体的表面和体积上实现了电场的调制。 如果本发明的边缘结构适当地确定尺寸，则场强度最大值可以容易地位于深度中; 也就是在垂直p-n结的区域。 因此，允许在体积中的电场的“软”泄漏的合适的边缘构造总是可以在宽泛的p和n掺杂浓度范围内提供。

公开(公告)号：US08970000B2

公开(公告)日：2015-03-03

申请号：US12689086

申请日：2010-01-18

申请人： Martin Kerber ,  Jens-Peer Stengl ,  Uwe Wahl

发明人： Martin Kerber ,  Jens-Peer Stengl ,  Uwe Wahl

IPC分类号： H01L21/50 ,  H02M3/335 ,  H01F27/28 ,  H01L23/48 ,  H01L23/522 ,  H01L23/64 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L25/50 ,  H01F27/2804 ,  H01L23/48 ,  H01L23/481 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/48463 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30107 ,  H02M3/33523 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.

摘要翻译： 公开了一种信号传输装置。 电压转换器包括信号传输装置。

公开(公告)号：US5726478A

公开(公告)日：1998-03-10

申请号：US769348

申请日：1996-12-19

申请人： Josef-Matthias Gantioler ,  Ludwig Leipold ,  Rainald Sander ,  Jens-Peer Stengl ,  Jenoe Tihanyi

发明人： Josef-Matthias Gantioler ,  Ludwig Leipold ,  Rainald Sander ,  Jens-Peer Stengl ,  Jenoe Tihanyi

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8234 ,  H01L27/02 ,  H01L27/088 ,  H01L23/62

CPC分类号： H01L27/0251 ,  H01L2924/0002

摘要： An integrated power semiconductor component includes a substrate of a first conduction type. At least one first region of a second conduction type is embedded in the substrate and at least one second region of the second conduction type is embedded in the substrate. A substrate contact supplies a supply voltage. Contact-making semiconductor components are embedded in the first region and in the second region. At least a portion of the semiconductor components in the first region control at least a portion of the semiconductor components in the second region. A third region of the second conduction type is disposed between the first region and the second region, and the first region and the third region are at different potentials.

摘要翻译： 集成功率半导体元件包括第一导电类型的衬底。 至少一个第二导电类型的第一区域被嵌入衬底中，并且第二导电类型的至少一个第二区域被嵌入衬底中。 基板触点提供电源电压。 接触半导体部件嵌入在第一区域和第二区域中。 第一区域中的半导体部件的至少一部分控制第二区域中的至少一部分半导体部件。 第二导电类型的第三区域设置在第一区域和第二区域之间，并且第一区域和第三区域处于不同的电位。

公开(公告)号：US20110148549A1

公开(公告)日：2011-06-23

申请号：US12646731

申请日：2009-12-23

申请人： Peter Kanschat ,  Uwe Wahl ,  Marcus Nuebling ,  Jens-Peer Stengl

发明人： Peter Kanschat ,  Uwe Wahl ,  Marcus Nuebling ,  Jens-Peer Stengl

IPC分类号： H03H2/00

CPC分类号： H03H7/004 ,  H01F19/00 ,  H03H7/00

摘要： A signal transmission arrangement includes input terminals for receiving an input signal and output terminals for providing an output signal. A first transformer has a primary winding and a secondary winding, the primary winding being coupled to the input terminals. A second transformer has a primary winding and a secondary winding, the primary winding being coupled to the secondary winding of the first transformer, and the secondary winding being coupled to the output terminals.

摘要翻译： 信号传输装置包括用于接收输入信号的输入端和用于提供输出信号的输出端。 第一变压器具有初级绕组和次级绕组，初级绕组耦合到输入端子。 第二变压器具有初级绕组和次级绕组，初级绕组耦合到第一变压器的次级绕组，次级绕组耦合到输出端子。

公开(公告)号：US20110176339A1

公开(公告)日：2011-07-21

申请号：US12689086

申请日：2010-01-18

申请人： Martin Kerber ,  Jens-Peer Stengl ,  Uwe Wahl

发明人： Martin Kerber ,  Jens-Peer Stengl ,  Uwe Wahl

IPC分类号： H02M3/335 ,  H01L23/528 ,  H01L21/50

CPC分类号： H01L25/50 ,  H01F27/2804 ,  H01L23/48 ,  H01L23/481 ,  H01L23/5227 ,  H01L23/645 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/48463 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2225/06555 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30107 ,  H02M3/33523 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A signal transmission arrangement is disclosed. A voltage converter includes a signal transmission arrangement.

摘要翻译： 公开了一种信号传输装置。 电压转换器包括信号传输装置。

公开(公告)号：US4459498A

公开(公告)日：1984-07-10

申请号：US277891

申请日：1981-06-26

申请人： Jens-Peer Stengl ,  Hartmut Thomas ,  Jeno Tihanyi

发明人： Jens-Peer Stengl ,  Hartmut Thomas ,  Jeno Tihanyi

IPC分类号： H03K17/10 ,  H03K17/08 ,  H03K17/687 ,  H03K19/094

CPC分类号： H03K17/102

摘要： Switch with at least two series-connected MOS-FETs has a drain terminal of a preceding MOS-FET connected to a source terminal of a succeeding MOS-FET the MOS-FETs having respective control terminals connectible to a control voltage. The control terminal of the preceding MOS-FET is directly connected to a terminal of the control voltage source. The control terminal of the succeeding MOS-FET is connected to the control terminal of the respective preceding MOS-FET via a diode poled in forward direction with respect to the control voltage source. A resistor is connected between the control terminal and the source terminal of the succeeding MOS-FET.

摘要翻译： 具有至少两个串联MOS-FET的开关具有连接到后续MOS-FET的源极端子的前一个MOS-FET的漏极端子，具有可连接到控制电压的各个控制端子的MOS-FET。 上述MOS-FET的控制端子直接连接到控制电压源的端子。 后续MOS-FET的控制端子通过相对于控制电压源正向极化的二极管连接到前面的MOS-FET的控制端子。 电阻连接在控制端子和后续MOS-FET的源极端子之间。

公开(公告)号：US08790985B2

公开(公告)日：2014-07-29

申请号：US13538043

申请日：2012-06-29

申请人： Uwe Wahl ,  Markus Hammer ,  Jens-Peer Stengl

发明人： Uwe Wahl ,  Markus Hammer ,  Jens-Peer Stengl

IPC分类号： H01L21/76

CPC分类号： H01L23/5227 ,  H01L23/3178 ,  H01L23/585 ,  H01L23/642 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/05155 ,  H01L2224/05644 ,  H01L2924/01029 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/01015

摘要： The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g., at barrier layers) resulting in an improved high voltage resistance.

摘要翻译： 所公开的发明提供了一种用于在包括耦合器的导电元件（例如，具有不同的高电压电位）的共享横向平面的电网之间提供高横向电压电阻的结构和方法。 在一个实施例中，提供高横向电压电阻的集成耦合器包括主导电元件和次导电元件。 隔离材料横向配置在主要导电元件的电网和次级导电元件的电网之间。 隔离材料可以包括低k电介质层，并且防止任何侧向阻挡层（例如，蚀刻停止层，扩散阻挡层等）在第一导电元件和第二导电元件的电网之间延伸。 因此，该结构提供了一种电隔离的集成耦合器，其避免了电路之间的电短路（例如，在阻挡层处），导致改进的高耐电压。

公开(公告)号：US08319573B2

公开(公告)日：2012-11-27

申请号：US12646731

申请日：2009-12-23

申请人： Peter Kanschat ,  Uwe Wahl ,  Marcus Nuebling ,  Jens-Peer Stengl

发明人： Peter Kanschat ,  Uwe Wahl ,  Marcus Nuebling ,  Jens-Peer Stengl

IPC分类号： H01P5/12 ,  H01F30/06

CPC分类号： H03H7/004 ,  H01F19/00 ,  H03H7/00

摘要： A signal transmission arrangement includes input terminals for receiving an input signal and output terminals for providing an output signal. A first transformer has a primary winding and a secondary winding, the primary winding being coupled to the input terminals. A second transformer has a primary winding and a secondary winding, the primary winding being coupled to the secondary winding of the first transformer, and the secondary winding being coupled to the output terminals.

摘要翻译： 信号传输装置包括用于接收输入信号的输入端和用于提供输出信号的输出端。 第一变压器具有初级绕组和次级绕组，初级绕组耦合到输入端子。 第二变压器具有初级绕组和次级绕组，初级绕组耦合到第一变压器的次级绕组，次级绕组耦合到输出端子。