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公开(公告)号:US10886252B2
公开(公告)日:2021-01-05
申请号:US15908641
申请日:2018-02-28
申请人: IMEC VZW
发明人: Lan Peng , Soon-Wook Kim , Eric Beyne , Gerald Peter Beyer , Erik Sleeckx , Robert Miller
IPC分类号: H01L23/00 , H01L23/522 , H01L23/528 , H01L21/20 , H01J37/32
摘要: The disclosed technology generally relates to integrating semiconductor dies and more particularly to bonding semiconductor substrates. In an aspect, a method of bonding semiconductor substrates includes providing a first substrate and a second substrate. Each of the first substrate and the second substrate comprises a dielectric bonding layer comprising one or more a silicon carbon oxide (SiCO) layer, a silicon carbon nitride (SiCN) layer or a silicon carbide (SiC) layer. The method additionally includes, prior to bonding the first and second substrates, pre-treating each of the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate. Pre-treating includes a first plasma activation process in a plasma comprising an inert gas, a second plasma activation process in a plasma comprising oxygen, and a wet surface treatment including a water rinsing step or an exposure to a water-containing ambient. The method additionally includes bonding the first and the second substrates by contacting the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate to form a substrate assembly. The method further includes post-bond annealing the assembly.
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公开(公告)号:US20210159207A1
公开(公告)日:2021-05-27
申请号:US17102249
申请日:2020-11-23
申请人: IMEC vzw
摘要: A method of bonding semiconductor components is described. In one aspect a first component, for example a semiconductor die, is bonded to a second component, for example a semiconductor wafer or another die, by direct metal-metal bonds between metal bumps on one component and corresponding bumps or contact pads on the other component. In addition, a number of solder bumps are provided on one of the components, and corresponding contact areas on the other component, and fast solidified solder connections are established between the solder bumps and the corresponding contact areas, without realizing the metal-metal bonds. The latter metal-metal bonds are established in a heating step performed after the soldering step. This enables a fast bonding process applied to multiple dies bonded on different areas of the wafer and/or stacked one on top of the other, followed by a single heating step for realizing metal-metal bonds between the respective dies and the wafer or between multiple stacked dies. The method allows to improve the throughput of the bonding process, as the heating step takes place only once for a plurality of dies and/or wafers.
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公开(公告)号:US20170301646A1
公开(公告)日:2017-10-19
申请号:US15604454
申请日:2017-05-24
申请人: IMEC VZW
发明人: Soon-Wook Kim , Lan Peng , Patrick Verdonck , Robert Miller , Gerald Peter Beyer , Eric Beyne
IPC分类号: H01L23/00
CPC分类号: H01L24/83 , H01L21/02065 , H01L21/02164 , H01L21/02167 , H01L21/02211 , H01L21/02274 , H01L21/31053 , H01L23/3192 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/32 , H01L24/80 , H01L25/0657 , H01L2224/03452 , H01L2224/03462 , H01L2224/03616 , H01L2224/03845 , H01L2224/03848 , H01L2224/05568 , H01L2224/05573 , H01L2224/05576 , H01L2224/05686 , H01L2224/08121 , H01L2224/08145 , H01L2224/32501 , H01L2224/80048 , H01L2224/80097 , H01L2224/80201 , H01L2224/80357 , H01L2224/80895 , H01L2224/80896 , H01L2224/80948 , H01L2224/83031 , H01L2224/83047 , H01L2224/83048 , H01L2224/83359 , H01L2924/00012 , H01L2924/0504 , H01L2924/00014 , H01L2924/20106 , H01L2924/2011
摘要: The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C. It has been found that the bond strength is excellent, even at the above named annealing temperatures, which are lower than presently known in the art.
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公开(公告)号:US10141284B2
公开(公告)日:2018-11-27
申请号:US15604454
申请日:2017-05-24
申请人: IMEC VZW
发明人: Soon-Wook Kim , Lan Peng , Patrick Verdonck , Robert Miller , Gerald Peter Beyer , Eric Beyne
IPC分类号: H01L23/00 , H01L23/31 , H01L25/065 , H01L21/02 , H01L21/3105
摘要: The disclosed technology generally relates to semiconductor wafer bonding, and more particularly to direct bonding by contacting surfaces of the semiconductor wafers. In one aspect, a method for bonding a first semiconductor substrate to a second semiconductor substrate by direct bonding is described. The substrates are both provided on their contact surfaces with a dielectric layer, followed by a CMP step for reducing the roughness of the dielectric layer. Then a layer of SiCN is deposited onto the dielectric layer, followed by a CMP step which reduces the roughness of the SiCN layer to the order of 1 tenth of a nanometer. Then the substrates are subjected to a pre-bond annealing step and then bonded by direct bonding, possibly preceded by one or more pre-treatments of the contact surfaces, and followed by a post-bond annealing step, at a temperature of less than or equal to 250° C. It has been found that the bond strength is excellent, even at the above named annealing temperatures, which are lower than presently known in the art.
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公开(公告)号:US20180247914A1
公开(公告)日:2018-08-30
申请号:US15908641
申请日:2018-02-28
申请人: IMEC VZW
发明人: Lan Peng , Soon-Wook Kim , Eric Beyne , Gerald Peter Beyer , Erik Sleeckx , Robert Miller
IPC分类号: H01L23/00 , H01L23/522 , H01L23/528
CPC分类号: H01L24/83 , H01J37/32091 , H01J37/321 , H01J2237/334 , H01L21/2007 , H01L23/5226 , H01L23/528 , H01L24/29 , H01L24/32 , H01L2224/29082 , H01L2224/29187 , H01L2224/32145 , H01L2224/83009 , H01L2224/83011 , H01L2224/83022 , H01L2224/83895 , H01L2224/83896 , H01L2224/83948 , H01L2224/83986 , H01L2924/04642 , H01L2924/059 , H01L2924/20106 , H01L2924/20107
摘要: The disclosed technology generally relates to integrating semiconductor dies and more particularly to bonding semiconductor substrates. In an aspect, a method of bonding semiconductor substrates includes providing a first substrate and a second substrate. Each of the first substrate and the second substrate comprises a dielectric bonding layer comprising one or more a silicon carbon oxide (SiCO) layer, a silicon carbon nitride (SiCN) layer or a silicon carbide (SiC) layer. The method additionally includes, prior to bonding the first and second substrates, pre-treating each of the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate. Pre-treating includes a first plasma activation process in a plasma comprising an inert gas, a second plasma activation process in a plasma comprising oxygen, and a wet surface treatment including a water rinsing step or an exposure to a water-containing ambient. The method additionally includes bonding the first and the second substrates by contacting the dielectric bonding layer of the first substrate and the dielectric bonding layer of the second substrate to form a substrate assembly. The method further includes post-bond annealing the assembly.
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