公开(公告)号：US09793119B2

公开(公告)日：2017-10-17

申请号：US15347835

申请日：2016-11-10

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Florian Bernsteiner

IPC: H01L21/00 ,  H01L21/027 ,  H01L21/308 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/02

CPC classification number: H01L21/0274 ,  H01L21/02107 ,  H01L21/02203 ,  H01L21/0271 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/31058 ,  H01L21/32139 ,  H01L21/47 ,  H01L21/70

Abstract: According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.

公开(公告)号：US09768023B1

公开(公告)日：2017-09-19

申请号：US14953492

申请日：2015-11-30

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Florian Bernsteiner

IPC: H01L21/00 ,  H01L21/027 ,  H01L21/70 ,  H01L21/3105 ,  H01L21/02 ,  H01L21/47

CPC classification number: H01L21/0274 ,  H01L21/02107 ,  H01L21/02203 ,  H01L21/0271 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/31058 ,  H01L21/32139 ,  H01L21/47 ,  H01L21/70

Abstract: According to various embodiments, a method of processing a substrate may include: disposing a viscous material over a substrate including at least one topography feature extending into the substrate to form a protection layer over the substrate; adjusting a viscosity of the viscous material during a contacting period of the viscous material and the substrate to stabilize a spatial distribution of the viscous material as disposed; processing the substrate using the protection layer as mask; and removing the protection layer after processing the substrate.

公开(公告)号：US20160225718A1

公开(公告)日：2016-08-04

申请号：US14608884

申请日：2015-01-29

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Stefan Schwab

IPC: H01L23/532 ,  H01L21/768

CPC classification number: H05K1/09 ,  H01L21/288 ,  H01L23/53228 ,  H05K1/11 ,  H05K3/22

Abstract: A device comprises a base element and a metallization layer over the base element. The metallization layer comprises pores and has a varying degree of porosity, the degree of porosity being higher in a portion adjacent to the base element than in a portion remote from the base element.

Abstract translation: 一种器件包括在基底元件上的基底元件和金属化层。 金属化层包含孔隙并具有不同程度的孔隙率，孔隙度在与基底元件相邻的部分中高于远离基底元件的部分。

公开(公告)号：US11195713B2

公开(公告)日：2021-12-07

申请号：US16426051

申请日：2019-05-30

Applicant: Infineon Technologies AG

Inventor： Joachim Hirschler ,  Georg Ehrentraut ,  Christoffer Erbert ,  Klaus Goeschl ,  Markus Heinrici ,  Michael Hutzler ,  Wolfgang Koell ,  Stefan Krivec ,  Ingmar Neumann ,  Mathias Plappert ,  Michael Roesner ,  Olaf Storbeck

IPC: H01L21/02 ,  H01L29/51 ,  H01L21/28 ,  H01L21/18 ,  H01L29/49

Abstract: In one aspect, a method of forming a silicon-insulator layer is provided. The method includes arranging a silicon structure in a plasma etch process chamber and applying a plasma to the silicon structure in the plasma etch process chamber at a temperature of the silicon structure equal to or below 100° C. The plasma includes a component and a halogen derivate, thereby forming the silicon-insulator layer. The silicon-insulator layer includes silicon and the component. In another aspect, a semiconductor device is provided having a silicon-insulator layer formed by the method.

公开(公告)号：US20190337069A1

公开(公告)日：2019-11-07

申请号：US15971830

申请日：2018-05-04

Applicant: Infineon Technologies AG

Inventor： Nirdesh Ojha ,  Francisco Javier Santos Rodriguez ,  Roland Rupp ,  Markus Heinrici ,  Karin Delalut ,  Claudia Friza

IPC: B23H7/06 ,  B23H7/10 ,  B23H7/14 ,  B23H7/30 ,  B23H7/34 ,  B23H1/02

Abstract: A method of yielding a thinner product wafer from a thicker base SiC wafer cut from a SiC ingot includes: supporting the base SiC wafer with a support substrate: and while the base SiC wafer is supported by the support substrate, cutting through the base SiC wafer in a direction parallel to a first main surface of the base SiC wafer using a wire as part of a wire electrical discharge machining (WEDM) process, to separate the product wafer from the base SiC wafer, the product wafer being attached to the support substrate when cut from the base SiC wafer.

公开(公告)号：US09620466B1

公开(公告)日：2017-04-11

申请号：US14953456

申请日：2015-11-30

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Barbara Eichinger ,  Manfred Schneegans ,  Stefan Krivec

IPC: H01L21/00 ,  H01L23/00 ,  H01L21/02 ,  H01L23/532

CPC classification number: H01L24/03 ,  H01L21/02203 ,  H01L21/02513 ,  H01L21/76259 ,  H01L23/53238 ,  H01L24/05 ,  H01L2224/0331 ,  H01L2224/0345 ,  H01L2224/03505 ,  H01L2224/03602 ,  H01L2224/03616 ,  H01L2224/0384 ,  H01L2224/05541 ,  H01L2224/05551 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2924/3511 ,  H01L2924/35121

Abstract: A method of manufacturing an electronic device may include: forming at least one electronic component in a substrate; forming a contact pad in electrical contact with the at least one electronic component; wherein forming the contact pad includes: forming a first layer over the substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface, wherein the second layer has a lower porosity than the first layer.

公开(公告)号：US09929111B2

公开(公告)日：2018-03-27

申请号：US15461500

申请日：2017-03-17

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Barbara Eichinger ,  Manfred Schneegans ,  Stefan Krivec

IPC: H01L21/00 ,  H01L23/00 ,  H01L21/02 ,  H01L23/532 ,  H01L21/762

CPC classification number: H01L24/03 ,  H01L21/02203 ,  H01L21/02513 ,  H01L21/76259 ,  H01L23/53238 ,  H01L24/05 ,  H01L2224/0331 ,  H01L2224/0345 ,  H01L2224/03505 ,  H01L2224/03602 ,  H01L2224/03616 ,  H01L2224/0384 ,  H01L2224/05541 ,  H01L2224/05551 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2924/3511 ,  H01L2924/35121

Abstract: A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.

公开(公告)号：US09844134B2

公开(公告)日：2017-12-12

申请号：US14608884

申请日：2015-01-29

Applicant: Infineon Technologies AG

Inventor： Martin Mischitz ,  Markus Heinrici ,  Stefan Schwab

IPC: H05K1/09 ,  H05K1/11 ,  H05K3/22 ,  H01L23/532 ,  H01L21/288

CPC classification number: H05K1/09 ,  H01L21/288 ,  H01L23/53228 ,  H05K1/11 ,  H05K3/22

Abstract: A device comprises a base element and a metallization layer over the base element. The metallization layer comprises pores and has a varying degree of porosity, the degree of porosity being higher in a portion adjacent to the base element than in a portion remote from the base element.

公开(公告)号：US20150214095A1

公开(公告)日：2015-07-30

申请号：US14163694

申请日：2014-01-24

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Martin Mischitz ,  Manfred Schneegans ,  Markus Heinrici

IPC: H01L21/768 ,  H01L21/027 ,  H01L23/532 ,  H01L23/00

CPC classification number: H01L21/7688 ,  H01L21/0272 ,  H01L21/288 ,  H01L21/76883 ,  H01L21/76885 ,  H01L23/53228 ,  H01L23/5328 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for producing a metal layer on a wafer is described. In one embodiment the method comprises providing a semiconductor wafer including a coating, printing a metal particle paste on the semiconductor wafer thereby forming a metal layer and heating the metal layer in a reductive gas for sintering the metal particle paste or for annealing a sintered metal particle paste in an oven.

Abstract translation: 对晶片上的金属层的制造方法进行说明。 在一个实施方案中，该方法包括提供包括涂层的半导体晶片，在半导体晶片上印刷金属颗粒糊料，从而形成金属层，并且在用于烧结金属颗粒糊料的还原性气体中加热金属层或者使烧结金属颗粒退火 贴在烤箱里

公开(公告)号：US10967450B2

公开(公告)日：2021-04-06

申请号：US15971830

申请日：2018-05-04

Applicant: Infineon Technologies AG

Inventor： Nirdesh Ojha ,  Francisco Javier Santos Rodriguez ,  Roland Rupp ,  Markus Heinrici ,  Karin Delalut ,  Claudia Friza

IPC: B23H7/06 ,  B23H7/10 ,  B23H7/14 ,  B23H7/30 ,  B23H7/34 ,  B23H1/02

Abstract: A method of yielding a thinner product wafer from a thicker base SiC wafer cut from a SiC ingot includes: supporting the base SiC wafer with a support substrate: and while the base SiC wafer is supported by the support substrate, cutting through the base SiC wafer in a direction parallel to a first main surface of the base SiC wafer using a wire as part of a wire electrical discharge machining (WEDM) process, to separate the product wafer from the base SiC wafer, the product wafer being attached to the support substrate when cut from the base SiC wafer.