公开(公告)号：US20180068976A1

公开(公告)日：2018-03-08

申请号：US15797712

申请日：2017-10-30

申请人： Semtech Corporation

发明人： Satyamoorthi Chinnusamy ,  Kevin Simpson ,  Mark C. Costello

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L21/78 ,  H01L23/31

CPC分类号： H01L24/94 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3185 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/02371 ,  H01L2224/0331 ,  H01L2224/04105 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05561 ,  H01L2224/05562 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/03

摘要： A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.

公开(公告)号：US20150145141A1

公开(公告)日：2015-05-28

申请号：US14087252

申请日：2013-11-22

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC分类号： H01L23/538 ,  H01L23/00

CPC分类号： H01L25/50 ,  H01L21/31111 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/49811 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/32 ,  H01L24/33 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/89 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02317 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0331 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/08146 ,  H01L2224/0823 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/13616 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14134 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/24147 ,  H01L2224/24227 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4805 ,  H01L2224/48108 ,  H01L2224/48149 ,  H01L2224/4903 ,  H01L2224/49426 ,  H01L2224/73201 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/386 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/01028 ,  H01L2924/01082 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/16225 ,  H01L2224/81 ,  H01L2224/45616 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2224/45099

摘要： An apparatus relating generally to a substrate is disclosed. In such an apparatus, a first bond via array has first wires extending from a surface of the substrate. A second bond via array has second wires extending from the surface of the substrate. The first bond via array is disposed at least partially within the second bond via array. The first wires of the first bond via array are of a first height. The second wires of the second bond via array are of a second height greater than the first height for coupling of at least one die to the first bond via array at least partially disposed within the second bond via array.

摘要翻译： 公开了一般涉及基板的装置。 在这种装置中，第一接合通孔阵列具有从衬底的表面延伸的第一线。 第二结合通孔阵列具有从衬底的表面延伸的第二线。 通过阵列的第一结合通过阵列至少部分地设置在第二结合内。 第一结合通孔阵列的第一条导线具有第一高度。 第二接合通孔阵列的第二线具有大于用于将至少一个管芯耦合至第一接合的第一高度的第二高度，该阵列至少部分地设置在第二接合通孔阵列内。

公开(公告)号：US20130009286A1

公开(公告)日：2013-01-10

申请号：US13471735

申请日：2012-05-15

申请人： Young-lyong Kim ,  Jong-ho Lee ,  Moon-gi Cho ,  Hwan-sik Lim ,  Sun-hee Park

发明人： Young-lyong Kim ,  Jong-ho Lee ,  Moon-gi Cho ,  Hwan-sik Lim ,  Sun-hee Park

IPC分类号： H01L23/58

CPC分类号： H01L24/11 ,  H01L23/3128 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/02123 ,  H01L2224/0331 ,  H01L2224/0332 ,  H01L2224/0345 ,  H01L2224/03464 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05017 ,  H01L2224/05018 ,  H01L2224/05019 ,  H01L2224/05022 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05026 ,  H01L2224/05027 ,  H01L2224/05073 ,  H01L2224/05082 ,  H01L2224/05083 ,  H01L2224/05166 ,  H01L2224/0519 ,  H01L2224/05191 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05559 ,  H01L2224/0556 ,  H01L2224/05562 ,  H01L2224/05568 ,  H01L2224/05666 ,  H01L2224/0569 ,  H01L2224/05691 ,  H01L2224/1131 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13013 ,  H01L2224/13014 ,  H01L2224/13017 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/1319 ,  H01L2224/13191 ,  H01L2224/14131 ,  H01L2224/1416 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00014 ,  H01L2924/1435 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A semiconductor chip includes stress-relief to mitigate the effects of differences in coefficients of thermal expansion (CTE) between a printed circuit board (PCB) and a semiconductor chip and a flip-chip package including the semiconductor chip. The semiconductor chip includes a stress-relief buffer coupling a bump and a semiconductor chip pad.

摘要翻译： 半导体芯片包括减轻压力以减轻印刷电路板（PCB）和半导体芯片之间的热膨胀系数（CTE）的差异以及包括半导体芯片的倒装芯片封装的影响。 半导体芯片包括耦合凸块的应力消除缓冲器和半导体芯片焊盘。

公开(公告)号：US20170194272A1

公开(公告)日：2017-07-06

申请号：US15461500

申请日：2017-03-17

申请人： Infineon Technologies AG

发明人： Martin MISCHITZ ,  Markus HEINRICI ,  Barbara EICHINGER ,  Manfred SCHNEEGANS ,  Stefan KRIVEC

IPC分类号： H01L23/00

CPC分类号： H01L24/03 ,  H01L21/02203 ,  H01L21/02513 ,  H01L21/76259 ,  H01L23/53238 ,  H01L24/05 ,  H01L2224/0331 ,  H01L2224/0345 ,  H01L2224/03505 ,  H01L2224/03602 ,  H01L2224/03616 ,  H01L2224/0384 ,  H01L2224/05541 ,  H01L2224/05551 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48463 ,  H01L2924/3511 ,  H01L2924/35121

摘要： A method of manufacturing a layer structure includes: forming a first layer over a substrate; planarizing the first layer to form a planarized surface of the first layer; and forming a second layer over the planarized surface; wherein a porosity of the first layer is greater than a porosity of the substrate and greater than a porosity of the second layer; wherein the second layer is formed by physical vapor deposition; and wherein the first layer and the second layer are formed from the same solid material.

公开(公告)号：US09130024B2

公开(公告)日：2015-09-08

申请号：US13417917

申请日：2012-03-12

申请人： Wen-Chih Chiou ,  David Ding-Chung Lu

发明人： Wen-Chih Chiou ,  David Ding-Chung Lu

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

CPC分类号： H01L23/481 ,  H01L21/30604 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/09 ,  H01L24/48 ,  H01L24/89 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/031 ,  H01L2224/0331 ,  H01L2224/0355 ,  H01L2224/05553 ,  H01L2224/08113 ,  H01L2224/08135 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A three-dimensional semiconductor device using redundant bonding-conductor structures to make inter-level electrical connections between multiple semiconductor chips is disclosed. A first chip, or other semiconductor substrate, forms a first active area on its upper surface, and a second chip or other semiconductor substrate forms a second active area on its upper surface. According to the present invention, when the second chip has been mounted above the first chip, either face-up or face-down, the first active area is coupled to the second active area by at least one redundant bonding-conductor structure. In one embodiment, each redundant bonding-conductor structure includes at least one via portion that extends completely through the second chip to perform this function. In another, the redundant bonding-conductor structure extends downward to the top level interconnect. The present invention also includes a method for making such a device.

摘要翻译： 公开了一种使用冗余接合导体结构在多个半导体芯片之间进行层间电连接的三维半导体器件。 第一芯片或其它半导体衬底在其上表面上形成第一有源区，并且第二芯片或其它半导体衬底在其上表面上形成第二有源区。 根据本发明，当第二芯片已经被安装在第一芯片上方面向上或向下时，第一有效区域通过至少一个冗余结合导体结构耦合到第二有源区域。 在一个实施例中，每个冗余接合导体结构包括至少一个贯穿第二芯片的至少一个通孔部分，以执行该功能。 另一方面，冗余接合导体结构向下延伸到顶层互连。 本发明还包括制造这种装置的方法。

公开(公告)号：US07960834B2

公开(公告)日：2011-06-14

申请号：US12256834

申请日：2008-10-23

申请人： Tatsuya Funaki

发明人： Tatsuya Funaki

IPC分类号： H01L23/492

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0331 ,  H01L2224/03505 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/1131 ,  H01L2224/11332 ,  H01L2224/11505 ,  H01L2224/1155 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/13339 ,  H01L2224/16501 ,  H01L2224/245 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/76155 ,  H01L2224/81055 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/8123 ,  H01L2224/81379 ,  H01L2224/81594 ,  H01L2224/81639 ,  H01L2224/81801 ,  H01L2224/8184 ,  H01L2224/8284 ,  H01L2224/8384 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/19041 ,  Y10S977/779 ,  H01L2924/00014 ,  H01L2924/0543 ,  H01L2924/20107 ,  H01L2924/01014

摘要： An electronic element including an electronic element base and electrodes each of which has a first electrode having a surface composed of at least Al or an Al alloy and a second electrode composed of a metal nanoparticle sintered body and bonded to the first electrode. A bonding interface between the first electrode and the second electrode has a multilayer structure including, from the side of the first electrode to the side of the second electrode, (a) a first layer primarily composed of Al, (b) a second layer primarily composed of an Al oxide, (c) a third layer primarily composed of an alloy of Al and a constituent element of metal nanoparticles, and (d) a fourth layer primarily composed of the constituent element of the metal nanoparticles.

摘要翻译： 一种电子元件，包括电子元件基底和电极，每个电极具有至少包含Al或Al合金的表面的第一电极和由金属纳米颗粒烧结体组成并结合到第一电极的第二电极。 第一电极和第二电极之间的接合界面具有多层结构，其包括从第一电极侧到第二电极侧，（a）主要由Al组成的第一层，（b）主要 由Al氧化物组成，（c）主要由Al和金属纳米颗粒的构成元素组成的第三层，和（d）主要由金属纳米颗粒的构成元素组成的第四层。

公开(公告)号：US20090039507A1

公开(公告)日：2009-02-12

申请号：US12256834

申请日：2008-10-23

申请人： Tatsuya Funaki

发明人： Tatsuya Funaki

IPC分类号： H01L23/488 ,  H01L21/44

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0331 ,  H01L2224/03505 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05124 ,  H01L2224/05573 ,  H01L2224/0558 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05794 ,  H01L2224/05839 ,  H01L2224/1131 ,  H01L2224/11332 ,  H01L2224/11505 ,  H01L2224/1155 ,  H01L2224/13099 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13294 ,  H01L2224/13339 ,  H01L2224/16501 ,  H01L2224/245 ,  H01L2224/29339 ,  H01L2224/29344 ,  H01L2224/29347 ,  H01L2224/76155 ,  H01L2224/81055 ,  H01L2224/81097 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/8123 ,  H01L2224/81379 ,  H01L2224/81594 ,  H01L2224/81639 ,  H01L2224/81801 ,  H01L2224/8184 ,  H01L2224/8284 ,  H01L2224/8384 ,  H01L2224/94 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/15165 ,  H01L2924/15787 ,  H01L2924/19041 ,  Y10S977/779 ,  H01L2924/00014 ,  H01L2924/0543 ,  H01L2924/20107 ,  H01L2924/01014

摘要： An electronic element including an electronic element base and electrodes each of which has a first electrode having a surface composed of at least Al or an Al alloy and a second electrode composed of a metal nanoparticle sintered body and bonded to the first electrode. A bonding interface between the first electrode and the second electrode has a multilayer structure including, from the side of the first electrode to the side of the second electrode, (a) a first layer primarily composed of Al, (b) a second layer primarily composed of an Al oxide, (c) a third layer primarily composed of an alloy of Al and a constituent element of metal nanoparticles, and (d) a fourth layer primarily composed of the constituent element of the metal nanoparticles.

摘要翻译： 一种电子元件，包括电子元件基底和电极，每个电极具有至少包含Al或Al合金的表面的第一电极和由金属纳米颗粒烧结体组成并结合到第一电极的第二电极。 第一电极和第二电极之间的接合界面具有多层结构，其包括从第一电极侧到第二电极侧，（a）主要由Al组成的第一层，（b）主要 由Al氧化物组成，（c）主要由Al和金属纳米颗粒的构成元素组成的第三层，和（d）主要由金属纳米颗粒的构成元素组成的第四层。

公开(公告)号：US20170250158A1

公开(公告)日：2017-08-31

申请号：US15055264

申请日：2016-02-26

申请人： Semtech Corporation

发明人： Satyamoorthi Chinnusamy ,  Kevin Simpson ,  Mark C. Costello

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L21/78

CPC分类号： H01L24/94 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3185 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/96 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  H01L2224/02371 ,  H01L2224/0331 ,  H01L2224/04105 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/05561 ,  H01L2224/05562 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2224/03

摘要： A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.

公开(公告)号：US09698080B2

公开(公告)日：2017-07-04

申请号：US14846561

申请日：2015-09-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wen-Chih Chiou ,  David Ding-Chung Lu

IPC分类号： H01L23/48 ,  H01L21/768 ,  H01L25/065 ,  H01L25/00 ,  H01L21/306 ,  H01L23/00

CPC分类号： H01L23/481 ,  H01L21/30604 ,  H01L21/76898 ,  H01L24/03 ,  H01L24/09 ,  H01L24/48 ,  H01L24/89 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/031 ,  H01L2224/0331 ,  H01L2224/0355 ,  H01L2224/05553 ,  H01L2224/08113 ,  H01L2224/08135 ,  H01L2224/48091 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A three-dimensional semiconductor device using redundant bonding-conductor structures to make inter-level electrical connections between multiple semiconductor chips is disclosed. A first chip, or other semiconductor substrate, forms a first active area on its upper surface, and a second chip or other semiconductor substrate forms a second active area on its upper surface. According to the present invention, when the second chip has been mounted above the first chip, either face-up or face-down, the first active area is coupled to the second active area by at least one redundant bonding-conductor structure. In one embodiment, each redundant bonding-conductor structure includes at least one via portion that extends completely through the second chip to perform this function. In another, the redundant bonding-conductor structure extends downward to the top level interconnect. The present invention also includes a method for making such a device.

公开(公告)号：US20160049390A1

公开(公告)日：2016-02-18

申请号：US14925807

申请日：2015-10-28

申请人： Invensas Corporation

发明人： Cyprian Emeka Uzoh ,  Rajesh Katkar

IPC分类号： H01L25/00 ,  H01L21/56 ,  H01L21/311 ,  H01L21/768 ,  H01L23/00

CPC分类号： H01L25/50 ,  H01L21/31111 ,  H01L21/4853 ,  H01L21/563 ,  H01L21/76898 ,  H01L23/49811 ,  H01L23/5384 ,  H01L24/02 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L24/24 ,  H01L24/32 ,  H01L24/33 ,  H01L24/43 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/85 ,  H01L24/89 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/02311 ,  H01L2224/02317 ,  H01L2224/02371 ,  H01L2224/02372 ,  H01L2224/0239 ,  H01L2224/0331 ,  H01L2224/0332 ,  H01L2224/0333 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03462 ,  H01L2224/03464 ,  H01L2224/0347 ,  H01L2224/03614 ,  H01L2224/0391 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05111 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05155 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05547 ,  H01L2224/05565 ,  H01L2224/05568 ,  H01L2224/05569 ,  H01L2224/05611 ,  H01L2224/05616 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05669 ,  H01L2224/05684 ,  H01L2224/08146 ,  H01L2224/0823 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/13022 ,  H01L2224/13023 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13169 ,  H01L2224/13184 ,  H01L2224/13565 ,  H01L2224/13616 ,  H01L2224/1403 ,  H01L2224/14131 ,  H01L2224/14134 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/24147 ,  H01L2224/24227 ,  H01L2224/244 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/3303 ,  H01L2224/33181 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/45565 ,  H01L2224/4805 ,  H01L2224/48108 ,  H01L2224/48149 ,  H01L2224/4903 ,  H01L2224/49426 ,  H01L2224/73201 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81825 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2924/00014 ,  H01L2924/01322 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/16152 ,  H01L2924/16251 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/386 ,  H01L2924/00 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/01028 ,  H01L2924/01082 ,  H01L2224/05 ,  H01L2224/13 ,  H01L2224/16225 ,  H01L2224/81 ,  H01L2224/45616 ,  H01L2924/20751 ,  H01L2924/20752 ,  H01L2924/20753 ,  H01L2924/20754 ,  H01L2924/20755 ,  H01L2924/20756 ,  H01L2924/20757 ,  H01L2924/20758 ,  H01L2924/20759 ,  H01L2924/2076 ,  H01L2224/45099

摘要： An apparatus relating generally to a substrate is disclosed. In such an apparatus, a first bond via array has first wires extending from a surface of the substrate. A second bond via array has second wires extending from the surface of the substrate. The first bond via array is disposed at least partially within the second bond via array. The first wires of the first bond via array are of a first height. The second wires of the second bond via array are of a second height greater than the first height for coupling of at least one die to the first bond via array at least partially disposed within the second bond via array.