SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CARBON NANOTUBE GATE

    公开(公告)号:US20190385854A1

    公开(公告)日:2019-12-19

    申请号:US16547948

    申请日:2019-08-22

    Abstract: A method of forming a semiconductor device includes forming a channel layer on a substrate. A gate dielectric is deposited on the channel layer, and a mask is patterned on the gate dielectric. An exposed portion of the gate dielectric is removed to expose a first source/drain region and a second source/drain region of the channel layer. A first source/drain contact is formed on the first source/drain region and a second source/drain contact is formed on the second source/drain region. A cap layer is formed over the first source/drain contact and the second source/drain contact, and the mask is removed. Spacers are formed adjacent to sidewalls of the first source/drain contact and the second source/drain contact. An oxide region is formed in the cap layer and a carbon material is deposited on an exposed portion of the gate dielectric.

    NEUROMORPHIC DEVICES USING LAYERS OF ION RESERVOIRS AND ION CONDUCTIVITY ELECTROLYTE

    公开(公告)号:US20200250516A1

    公开(公告)日:2020-08-06

    申请号:US16267571

    申请日:2019-02-05

    Abstract: According to one or more embodiments of the present invention, a crossbar array includes a cross-point synaptic device at each cross-point. The cross-point synaptic device includes a transistor that includes a first ion reservoir formed on a source and on a drain of the transistor. The transistor further includes an ion conductivity electrolyte layer formed on the first ion reservoir. The transistor further includes a second ion reservoir formed on the ion conductivity electrolyte layer. The transistor further includes a gate formed on the second ion reservoir.

    CRYSTALLINE THIN-FILM TRANSISTOR
    8.
    发明申请
    CRYSTALLINE THIN-FILM TRANSISTOR 审中-公开
    晶体薄膜晶体管

    公开(公告)号:US20140191237A1

    公开(公告)日:2014-07-10

    申请号:US13967128

    申请日:2013-08-14

    Abstract: A method for forming a thin film transistor includes joining a crystalline substrate to an insulating substrate. A doped layer is deposited on the crystalline substrate, and the doped layer is patterned to form source and drain regions. The crystalline substrate is patterned to form an active area such that a conductive channel is formed in the crystalline substrate between the source and drain regions. A gate stack is formed between the source and drain regions, and contacts are formed to the source and drain regions and the gate stack through a passivation layer.

    Abstract translation: 一种形成薄膜晶体管的方法,包括将晶体衬底接合到绝缘衬底上。 掺杂层沉积在晶体衬底上,并且掺杂层被图案化以形成源区和漏区。 将晶体衬底图案化以形成有源区,使得在源区和漏区之间的晶体衬底中形成导电沟道。 在源极和漏极区域之间形成栅极堆叠,并且通过钝化层将触点形成到源极和漏极区域以及栅极堆叠。

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