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公开(公告)号:US20190385854A1
公开(公告)日:2019-12-19
申请号:US16547948
申请日:2019-08-22
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: QING CAO , SHU-JEN HAN , NING LI , JIANSHI TANG
IPC: H01L21/28 , H01L29/66 , H01L29/40 , B82Y10/00 , H01L21/3205 , H01L29/78 , H01L29/08 , H01L21/265 , H01L29/51 , H01L29/49
Abstract: A method of forming a semiconductor device includes forming a channel layer on a substrate. A gate dielectric is deposited on the channel layer, and a mask is patterned on the gate dielectric. An exposed portion of the gate dielectric is removed to expose a first source/drain region and a second source/drain region of the channel layer. A first source/drain contact is formed on the first source/drain region and a second source/drain contact is formed on the second source/drain region. A cap layer is formed over the first source/drain contact and the second source/drain contact, and the mask is removed. Spacers are formed adjacent to sidewalls of the first source/drain contact and the second source/drain contact. An oxide region is formed in the cap layer and a carbon material is deposited on an exposed portion of the gate dielectric.
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公开(公告)号:US20170254753A1
公开(公告)日:2017-09-07
申请号:US15602634
申请日:2017-05-23
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: YANN ASTIER , HUAN HU , NING LI , DEVENDRA K. SADANA , JOSHUA T. SMITH , WILLIAM T. SPRATT
IPC: G01N21/64 , H01L33/06 , H01L33/30 , H01L33/44 , H01L31/0352 , H01L31/0288 , H01L31/173 , H01L33/24 , H01L33/32
CPC classification number: G01N21/6428 , B01L3/5027 , B01L3/502753 , B01L2300/0654 , B01L2300/0816 , B01L2400/0421 , B82Y15/00 , G01N21/645 , G01N2021/0346 , G01N2021/6439 , G01N2201/062 , H01L31/0288 , H01L31/035227 , H01L31/173 , H01L33/06 , H01L33/24 , H01L33/30 , H01L33/32 , H01L33/44
Abstract: Described herein are microfluidic devices and methods of detecting an analyte in a sample that includes flowing the sample though a microfluidic device, wherein the presence of the analyte is detected directly from the microfluidic device without the use of an external detector at an outlet of the microfluidic device. In a more specific aspect, detection is performed by incorporating functional nanopillars, such as detector nanopillars and/or light source nanopillars, into a microchannel of a microfluidic device.
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3.
公开(公告)号:US20200328323A1
公开(公告)日:2020-10-15
申请号:US16381511
申请日:2019-04-11
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: JIANSHI TANG , NING LI , QING CAO
IPC: H01L31/18 , H04B10/11 , H01L33/00 , H01L31/0232 , H01L33/58
Abstract: A method and an apparatus are provided. The apparatus includes a three-dimensional semiconductor structure having a spherical array of fixed-position optoelectronic devices arranged over a relaxed elastomer by a controlled unbuckling process that orients the fixed-position optoelectronic devices to face in different directions in the spherical array to communicate in the different directions without motion of the apparatus and the fixed-position optoelectronic devices of the apparatus.
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公开(公告)号:US20190242690A1
公开(公告)日:2019-08-08
申请号:US16390255
申请日:2019-04-22
Applicant: International Business Machines Corporation
Inventor: HUAN HU , NING LI , XIAO HU LIU , KATSUYUKI SAKUMA
CPC classification number: G01B7/20 , B81B3/0097 , B81B2201/0214 , B81B2207/07 , B81C1/0038 , B81C2201/0194 , G01L1/2293
Abstract: Aspects include a method of manufacturing a flexible electronic structure that includes a metal or doped silicon substrate. Aspects include depositing an insulating layer on a silicon substrate. Aspects also include patterning a metal on a silicon substrate. Aspects also include selectively masking the structure to expose the metal and a portion of the silicon substrate. Aspects also include depositing a conductive layer including a conductive metal on the structure. Aspects also include plating the conductive material on the structure. Aspects also include spalling the structure.
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公开(公告)号:US20180350603A1
公开(公告)日:2018-12-06
申请号:US16042405
申请日:2018-07-23
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: QING CAO , SHU-JEN HAN , NING LI , JIANSHI TANG
CPC classification number: H01L21/2807 , B82Y10/00 , H01L21/26513 , H01L21/28088 , H01L21/32056 , H01L29/0673 , H01L29/0847 , H01L29/401 , H01L29/4966 , H01L29/517 , H01L29/6653 , H01L29/6656 , H01L29/66568 , H01L29/775 , H01L29/78
Abstract: A method of forming a semiconductor device includes forming a channel layer on a substrate. A gate dielectric is deposited on the channel layer, and a mask is patterned on the gate dielectric. An exposed portion of the gate dielectric is removed to expose a first source/drain region and a second source/drain region of the channel layer. A first source/drain contact is formed on the first source/drain region and a second source/drain contact is formed on the second source/drain region. A cap layer is formed over the first source/drain contact and the second source/drain contact, and the mask is removed. Spacers are formed adjacent to sidewalls of the first source/drain contact and the second source/drain contact. An oxide region is formed in the cap layer and a carbon material is deposited on an exposed portion of the gate dielectric.
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公开(公告)号:US20200250516A1
公开(公告)日:2020-08-06
申请号:US16267571
申请日:2019-02-05
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: NING LI , Devendra K. Sadana
IPC: G06N3/063
Abstract: According to one or more embodiments of the present invention, a crossbar array includes a cross-point synaptic device at each cross-point. The cross-point synaptic device includes a transistor that includes a first ion reservoir formed on a source and on a drain of the transistor. The transistor further includes an ion conductivity electrolyte layer formed on the first ion reservoir. The transistor further includes a second ion reservoir formed on the ion conductivity electrolyte layer. The transistor further includes a gate formed on the second ion reservoir.
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公开(公告)号:US20180073854A1
公开(公告)日:2018-03-15
申请号:US15473956
申请日:2017-03-30
Applicant: International Business Machines Corporation
Inventor: HUAN HU , NING LI , XIAO HU LIU , KATSUYUKI SAKUMA
IPC: G01B7/16
CPC classification number: G01B7/20 , B81B3/0097 , B81B2201/0214 , B81B2207/07 , B81C1/0038 , B81C2201/0194 , G01L1/2293
Abstract: Aspects include a method of manufacturing a flexible electronic structure that includes a metal or doped silicon substrate. Aspects include depositing an insulating layer on a silicon substrate. Aspects also include patterning a metal on a silicon substrate. Aspects also include selectively masking the structure to expose the metal and a portion of the silicon substrate. Aspects also include depositing a conductive layer including a conductive metal on the structure. Aspects also include plating the conductive material on the structure. Aspects also include spalling the structure.
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公开(公告)号:US20140191237A1
公开(公告)日:2014-07-10
申请号:US13967128
申请日:2013-08-14
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: BAHMAN HEKMATSHOARTABARI , NING LI , DEVENDRA K. SADANA , DAVOOD SHAHRJERDI
IPC: H01L29/786
CPC classification number: H01L29/66742 , H01L29/66772 , H01L29/786 , H01L29/78654 , H01L29/78675 , H01L33/0041
Abstract: A method for forming a thin film transistor includes joining a crystalline substrate to an insulating substrate. A doped layer is deposited on the crystalline substrate, and the doped layer is patterned to form source and drain regions. The crystalline substrate is patterned to form an active area such that a conductive channel is formed in the crystalline substrate between the source and drain regions. A gate stack is formed between the source and drain regions, and contacts are formed to the source and drain regions and the gate stack through a passivation layer.
Abstract translation: 一种形成薄膜晶体管的方法,包括将晶体衬底接合到绝缘衬底上。 掺杂层沉积在晶体衬底上,并且掺杂层被图案化以形成源区和漏区。 将晶体衬底图案化以形成有源区,使得在源区和漏区之间的晶体衬底中形成导电沟道。 在源极和漏极区域之间形成栅极堆叠,并且通过钝化层将触点形成到源极和漏极区域以及栅极堆叠。
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公开(公告)号:US20180090324A1
公开(公告)日:2018-03-29
申请号:US15588976
申请日:2017-05-08
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: QING CAO , SHU-JEN HAN , NING LI , JIANSHI TANG
CPC classification number: H01L21/2807 , B82Y10/00 , H01L21/26513 , H01L21/28088 , H01L21/32056 , H01L29/0673 , H01L29/0847 , H01L29/401 , H01L29/4966 , H01L29/517 , H01L29/6653 , H01L29/6656 , H01L29/66568 , H01L29/775 , H01L29/78
Abstract: A method of forming a semiconductor device includes forming a channel layer on a substrate. A gate dielectric is deposited on the channel layer, and a mask is patterned on the gate dielectric. An exposed portion of the gate dielectric is removed to expose a first source/drain region and a second source/drain region of the channel layer. A first source/drain contact is formed on the first source/drain region and a second source/drain contact is formed on the second source/drain region. A cap layer is formed over the first source/drain contact and the second source/drain contact, and the mask is removed. Spacers are formed adjacent to sidewalls of the first source/drain contact and the second source/drain contact. An oxide region is formed in the cap layer and a carbon material is deposited on an exposed portion of the gate dielectric.
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公开(公告)号:US20170138858A1
公开(公告)日:2017-05-18
申请号:US14942072
申请日:2015-11-16
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: YANN ASTIER , HUAN HU , NING LI , DEVENDRA K. SADANA , JOSHUA T. SMITH , WILLIAM T. SPRATT
IPC: G01N21/64 , H01L33/06 , H01L33/30 , H01L31/173 , H01L33/44 , H01L31/0352 , H01L31/0288 , H01L33/24 , H01L33/32
CPC classification number: G01N21/6428 , B01L3/5027 , B01L3/502753 , B01L2300/0654 , B01L2300/0816 , B01L2400/0421 , B82Y15/00 , G01N21/645 , G01N2021/0346 , G01N2021/6439 , G01N2201/062 , H01L31/0288 , H01L31/035227 , H01L31/173 , H01L33/06 , H01L33/24 , H01L33/30 , H01L33/32 , H01L33/44
Abstract: Described herein are microfluidic devices and methods of detecting an analyte in a sample that includes flowing the sample though a microfluidic device, wherein the presence of the analyte is detected directly from the microfluidic device without the use of an external detector at an outlet of the microfluidic device. In a more specific aspect, detection is performed by incorporating functional nanopillars, such as detector nanopillars and/or light source nanopillars, into a microchannel of a microfluidic device.
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