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    On-Chip RF Shields with Backside Redistribution Lines
    5.
    发明申请
    On-Chip RF Shields with Backside Redistribution Lines 审中-公开
    带背面再分配线的片上RF屏蔽

    公开(公告)号：US20150024591A1

    公开(公告)日：2015-01-22

    申请号：US14505270

    申请日：2014-10-02

    Applicant: Infineon Technologies AG

    Inventor： Hans-Joachim Barth ,  Jens Pohl ,  Gottfried Beer ,  Heinrich Koerner

    IPC: H01L21/768 ,  H01L21/308 ,  H01L21/3065

    CPC classification number: H01L21/76898 ,  H01L21/3065 ,  H01L21/308 ,  H01L21/76879 ,  H01L23/481 ,  H01L23/552 ,  H01L23/66 ,  H01L2223/6688 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05569 ,  H01L2924/00014 ,  H01L2224/05552

    Abstract: Structures of a system on chip and methods of forming a system on chip are disclosed. In one embodiment, a method of fabricating the system on chip includes forming a through substrate opening from a back surface of a substrate, the through substrate opening disposed between a first and a second region, the first region comprising devices for RF circuitry and the second region comprising devices for other circuitry. The method further includes forming patterns for redistribution lines on a photo resist layer, the photo resist layer disposed under the back surface, and filling the through substrate opening and the patterns for redistribution lines with a conductive material.

    Abstract translation: 公开了一种片上系统的结构以及片上系统的形成方法。 在一个实施例中，一种制造片上系统的方法包括从衬底的背面形成穿透衬底开口，穿过衬底开口设置在第一和第二区域之间，第一区域包括用于RF电路的装置，第二区域包括第二 区域包括用于其他电路的装置。 该方法还包括在光致抗蚀剂层上形成用于再分配线的图案，设置在背面下方的光致抗蚀剂层，以及用导电材料填充贯通基板开口和再分配线图案。

    ELECTRONIC CIRCUIT ARRANGEMENT
    8.
    发明申请
    ELECTRONIC CIRCUIT ARRANGEMENT 有权
    电子电路布置

    公开(公告)号：US20140167215A1

    公开(公告)日：2014-06-19

    申请号：US14188761

    申请日：2014-02-25

    Applicant: INFINEON TECHNOLOGIES AG

    Inventor： Hans-Joachim Barth ,  Andreas Rusch ,  Klaus Schruefer

    IPC: H01L23/525

    CPC classification number: H01L23/5256 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

    Abstract: An electronic circuit arrangement in accordance with some embodiments has a substrate, the substrate including: a plurality of metallization layers located one above the other; a single fuse-link via coupled between a first metallization layer and a second metallization layer of the plurality of metallization layers, wherein the single fuse-link via is in the form of an electrical fuse link preferentially programmable by applying a sufficiently large current to melt or degenerate the fuse link; a plurality of through-contact vias coupled in parallel between a third metallization layer and a fourth metallization layer of the plurality of metallization layers, wherein the through-contact vias form a through-contact between the third and fourth metallization layers; and electrical circuit components, arranged in a circuit layer, which are electrically coupled to one another by means of the single fuse-link via and by means of the plurality of through-contact vias.

    Abstract translation: 根据一些实施例的电子电路装置具有基板，所述基板包括：多个金属化层，其位于彼此之上; 单个熔丝链路，其通过耦合在所述多个金属化层的第一金属化层和第二金属化层之间，其中所述单个熔丝连接通孔为电熔丝链的形式，所述熔丝链通过施加足够大的电流而熔化 或退化熔断体; 在所述多个金属化层的第三金属化层和第四金属化层之间并联耦合的多个通孔接触孔，其中所述通孔接触通孔在所述第三和第四金属化层之间形成通孔接触; 以及布置在电路层中的电路部件，其通过单个熔断体通过多个通孔接触通孔彼此电耦合。

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