公开(公告)号：US10529838B2

公开(公告)日：2020-01-07

申请号：US15831247

申请日：2017-12-04

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Moriz Jelinek ,  Johannes Laven ,  Helmut Oefner ,  Werner Schustereder

IPC: H01L29/739 ,  H01L29/36 ,  H01L29/10 ,  H01L21/324 ,  H01L21/263 ,  H01L21/66

Abstract: A semiconductor device includes at least one transistor structure. The at least one transistor structure includes an emitter or source terminal, and a collector or drain terminal. A carbon concentration within a semiconductor substrate region located between the emitter or source terminal and the collector or drain terminal varies between the emitter or source terminal and the collector or drain terminal.

公开(公告)号：US20140151858A1

公开(公告)日：2014-06-05

申请号：US14057671

申请日：2013-10-18

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Johannes Laven ,  Franz Josef Niedernostheide ,  Frank Dieter Pfirsch

IPC: H01L21/265 ,  H01L29/167

CPC classification number: H01L21/26513 ,  H01L21/02351 ,  H01L21/2605 ,  H01L21/263 ,  H01L21/324 ,  H01L21/3242 ,  H01L29/167 ,  H01L29/36

Abstract: A description is given of a method for doping a semiconductor body, and a semiconductor body produced by such a method. The method comprises irradiating the semiconductor body with protons and irradiating the semiconductor body with electrons. After the process of irradiating with protons and after the process of irradiating with electrons, the semiconductor body is subjected to heat treatment in order to attach the protons to vacancies by means of diffusion.

Abstract translation: 给出了用于掺杂半导体本体的方法和通过这种方法制造的半导体本体的描述。 该方法包括用质子照射半导体本体并用电子照射半导体体。 在用质子照射的过程和用电子照射的过程之后，对半导体体进行热处理，以通过扩散将质子附着到空位。

公开(公告)号：US09748102B2

公开(公告)日：2017-08-29

申请号：US15289990

申请日：2016-10-11

Applicant: Infineon Technologies AG

Inventor： Johannes Laven ,  Hans-Joachim Schulze

IPC: H01L21/322 ,  H01L21/265 ,  H01L29/32 ,  H01L29/66 ,  H01L29/78 ,  H01L29/739 ,  H01L23/26 ,  H01L23/528 ,  H01L23/532 ,  H01L29/36 ,  H01L21/283 ,  H01L29/45 ,  H01L29/08 ,  H01L29/861 ,  H01L29/872

CPC classification number: H01L21/265 ,  H01L21/26506 ,  H01L21/283 ,  H01L21/3221 ,  H01L23/26 ,  H01L23/528 ,  H01L23/53214 ,  H01L23/53228 ,  H01L29/0878 ,  H01L29/32 ,  H01L29/36 ,  H01L29/456 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/861 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for processing a semiconductor carrier is provided, the method including: providing a semiconductor carrier including a doped substrate region and a device region disposed over a first side of the doped substrate region, the device region including at least part of one or more electrical devices; and implanting ions into the doped substrate region to form a gettering region in the doped substrate region of the semiconductor carrier.

公开(公告)号：US09496351B2

公开(公告)日：2016-11-15

申请号：US14987818

申请日：2016-01-05

Applicant: Infineon Technologies AG

Inventor： Johannes Laven ,  Hans-Joachim Schulze

IPC: H01L21/02 ,  H01L29/32 ,  H01L21/265 ,  H01L21/322 ,  H01L29/66 ,  H01L29/78 ,  H01L29/739 ,  H01L23/26 ,  H01L23/528 ,  H01L23/532 ,  H01L29/36 ,  H01L29/45 ,  H01L29/08 ,  H01L29/861 ,  H01L29/872

CPC classification number: H01L21/265 ,  H01L21/26506 ,  H01L21/283 ,  H01L21/3221 ,  H01L23/26 ,  H01L23/528 ,  H01L23/53214 ,  H01L23/53228 ,  H01L29/0878 ,  H01L29/32 ,  H01L29/36 ,  H01L29/456 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/861 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for processing a semiconductor carrier is provided, the method including: providing a semiconductor carrier including a doped substrate region and a device region disposed over a first side of the doped substrate region, the device region including at least part of one or more electrical devices; and implanting ions into the doped substrate region to form a gettering region in the doped substrate region of the semiconductor carrier.

Abstract translation: 提供了一种用于处理半导体载体的方法，所述方法包括：提供包括掺杂衬底区域和设置在所述掺杂衬底区域的第一侧上的器件区域的半导体载体，所述器件区域包括至少部分一个或多个电 设备; 以及将离子注入到掺杂衬底区域中以在半导体载体的掺杂衬底区域中形成吸杂区域。

公开(公告)号：US09105487B2

公开(公告)日：2015-08-11

申请号：US14189295

申请日：2014-02-25

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Johannes Laven ,  Dieter Fuchs ,  Werner Schustereder ,  Roman Knoefler

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/265 ,  H01L29/739 ,  H01L29/78 ,  H01L29/10 ,  H01L29/861 ,  H01L29/08 ,  H01L29/16

CPC classification number: H01L29/0619 ,  H01L21/26513 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/8611

Abstract: A super junction semiconductor device includes a substrate layer of a first conductivity type and an epitaxial layer adjoining the substrate layer and including first columns of the first conductivity type and second columns of a second conductivity type. The first and second columns extend along a main crystal direction into the epitaxial layer and have vertical dopant profiles perpendicular to the first surface. The vertical dopant profile of at least one of the first and second columns includes first portions separated by second portions. In each of the first portions a dopant concentration varies by at most 30% of a maximum value within the respective first portion. In the second portions the dopant concentration is lower than in the adjoining first portions. A ratio of a total length of the first portions to a total length of the first and second portions is at least 50%.

Abstract translation: 超结半导体器件包括第一导电类型的衬底层和邻接衬底层的外延层，并且包括第一导电类型的第一列和第二导电类型的第二列。 第一和第二列沿着主晶体方向延伸到外延层中并具有垂直于第一表面的垂直掺杂物分布。 第一和第二列中的至少一个的垂直掺杂剂分布包括由第二部分分开的第一部分。 在每个第一部分中，掺杂剂浓度在相应的第一部分内变化最大值的30％。 在第二部分中，掺杂剂浓度低于邻接的第一部分。 第一部分的总长度与第一和第二部分的总长度之比至少为50％。

公开(公告)号：US10312258B2

公开(公告)日：2019-06-04

申请号：US15209206

申请日：2016-07-13

Applicant: Infineon Technologies AG

Inventor： Johannes Laven ,  Matteo Dainese ,  Hans-Joachim Schulze

IPC: H01L21/70 ,  H01L27/12 ,  H01L21/02 ,  H01L21/311 ,  H01L21/324 ,  H01L21/762 ,  H01L21/768 ,  H01L49/02 ,  H01L29/06 ,  H01L21/74 ,  H01L23/367 ,  H01L23/528 ,  H01L23/00 ,  H01L27/092

Abstract: A semiconductor device includes a semiconductor substrate with a first surface. The device further includes one or more semiconductor devices formed or the first surface in an active area. The device further includes a plurality of cavities in the semiconductor substrate beneath the first surface. The device further includes dielectric support structures between each of the cavities and spaced apart from the first surface. The dielectric support structures support a part of the semiconductor substrate between the active area and the cavities. The dielectric support structures include an oxide.

公开(公告)号：US09054035B2

公开(公告)日：2015-06-09

申请号：US14057671

申请日：2013-10-18

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Johannes Laven ,  Franz Josef Niedernostheide ,  Frank Dieter Pfirsch

IPC: H01L21/265 ,  H01L21/263 ,  H01L21/324 ,  H01L29/36 ,  H01L29/167

CPC classification number: H01L21/26513 ,  H01L21/02351 ,  H01L21/2605 ,  H01L21/263 ,  H01L21/324 ,  H01L21/3242 ,  H01L29/167 ,  H01L29/36

Abstract: A description is given of a method for doping a semiconductor body, and a semiconductor body produced by such a method. The method comprises irradiating the semiconductor body with protons and irradiating the semiconductor body with electrons. After the process of irradiating with protons and after the process of irradiating with electrons, the semiconductor body is subjected to heat treatment in order to attach the protons to vacancies by means of diffusion.

Abstract translation: 给出了用于掺杂半导体本体的方法和通过这种方法制造的半导体本体的描述。 该方法包括用质子照射半导体本体并用电子照射半导体体。 在用质子照射的过程和用电子照射的过程之后，对半导体体进行热处理，以通过扩散将质子附着到空位。

公开(公告)号：US11121242B2

公开(公告)日：2021-09-14

申请号：US16918141

申请日：2020-07-01

Applicant: Infineon Technologies AG

Inventor： Johannes Laven ,  Hans-Joachim Schulze

IPC: H01L29/739 ,  H01L29/66 ,  H03K17/041 ,  H01L29/10 ,  H03K3/012 ,  H03K17/60 ,  H01L21/225 ,  H01L21/266 ,  H01L21/28 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H03K17/567

Abstract: A method is provided for operating a semiconductor device which includes an IGBT having a desaturation semiconductor structure connected to a first electrode terminal and a gate electrode terminal for controlling a desaturation channel. The method includes: applying a first gate voltage to the gate electrode terminal so that current flows through the IGBT between the first electrode terminal and a second electrode terminal and current flow through the desaturation channel is substantially blocked; applying a different second gate voltage to the gate electrode terminal so that current flows through the IGBT between the first and second electrode terminals and charge carriers flow as a desaturating current through the desaturation channel to the first electrode terminal; and applying a different third gate voltage to the gate electrode terminal so that current flow through the IGBT between the first and second electrode terminals is substantially blocked.

公开(公告)号：US09917186B2

公开(公告)日：2018-03-13

申请号：US15394303

申请日：2016-12-29

Applicant: Infineon Technologies AG

Inventor： Johannes Laven ,  Hans-Joachim Schulze ,  Matteo Dainese ,  Peter Lechner ,  Roman Baburske

IPC: H01L29/423 ,  H01L29/78 ,  H01L27/088 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L21/0243 ,  H01L21/02658 ,  H01L21/02664 ,  H01L23/544 ,  H01L27/088 ,  H01L27/0922 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/8613 ,  H01L2223/54426 ,  H01L2223/54453

Abstract: A semiconductor device includes transistor cells and control structures. The transistor cells include source zones of a first conductivity type and body zones of a second conductivity type. The source and body zones are formed in a semiconductor mesa formed from a portion of a semiconductor body. The control structures include first portions extending from a first surface into the semiconductor body on at least two opposing sides of the semiconductor mesa, second portions between the first portions and separated from the first surface by portions of the semiconductor mesa, and third portions connecting the first and the second portions and separated from the first surface by portions of the semiconductor mesa. Constricted sections of the semiconductor mesa separate third portions neighboring each other along a horizontal longitudinal extension of the semiconductor mesa.

公开(公告)号：US09847229B2

公开(公告)日：2017-12-19

申请号：US14706435

申请日：2015-05-07

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Johannes Laven

IPC: H01L21/02 ,  H01L21/225 ,  H01L21/266 ,  H01L27/04 ,  H01L29/36 ,  H01L21/265 ,  H01L29/66 ,  H01L29/739 ,  H01L29/861

CPC classification number: H01L21/26506 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02395 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0254 ,  H01L21/02546 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/225 ,  H01L21/266 ,  H01L27/04 ,  H01L29/36 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/861

Abstract: A method for forming a semiconductor device includes depositing an epitaxial layer on a semiconductor substrate, forming an oxygen diffusion region within the epitaxial layer by oxygen diffusion from the semiconductor substrate into a part of the epitaxial layer and tempering at least the oxygen diffusion region of the epitaxial layer at a temperature between 400° C. and 480° C. for more than 15 minutes.