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    Combinatorial Process System
    3.
    发明申请
    Combinatorial Process System 审中-公开
    组合过程系统

    公开(公告)号：US20150093898A1

    公开(公告)日：2015-04-02

    申请号：US14562952

    申请日：2014-12-08

    Applicant: Intermolecular, Inc.

    Inventor： Rick Endo ,  Jeremy Cheng ,  Indranil De ,  James Tsung ,  Kurt Weiner ,  Maosheng Zhao

    IPC: H01L21/3205

    CPC classification number: H01L21/32051 ,  B01J19/0046 ,  B01J2219/0043 ,  B01J2219/00536 ,  B01J2219/00596 ,  B01J2219/00659 ,  B01J2219/00745 ,  B01J2219/00756 ,  C23C14/042 ,  C23C14/50 ,  C23C14/548 ,  C23C16/45544 ,  H01L21/67005 ,  H01L21/6719

    Abstract: A combinatorial processing chamber is provided. The combinatorial processing chamber is configured to isolate a radial portion of a rotatable substrate support, which in turn is configured to support a substrate. The chamber includes a plurality of clusters process heads in one embodiment. An insert having a base plate disposed between the substrate support and the process heads defines a confinement region for a deposition process in one embodiment. The base plate has an opening to enable access of the deposition material to the substrate. Through rotation of the substrate and movement of the opening, multiple regions of the substrate are accessible for performing combinatorial processing on a single substrate.

    Abstract translation: 提供组合处理室。 组合处理室被配置为隔离可旋转的衬底支撑件的径向部分，该可旋转衬底支撑件又被配置为支撑衬底。 在一个实施例中，腔室包括多个聚集过程头。 在一个实施例中，具有设置在基板支撑件和工艺头之间的基板的插入件限定了用于沉积工艺的约束区域。 基板具有能够将沉积材料接近基板的开口。 通过基板的旋转和开口的移动，基板的多个区域是可访问的，以在单个基板上执行组合处理。

    Substrate Processing Including Correction for Deposition Location
    4.
    发明申请
    Substrate Processing Including Correction for Deposition Location 审中-公开
    衬底处理包括校正位置

    公开(公告)号：US20150025670A1

    公开(公告)日：2015-01-22

    申请号：US14505184

    申请日：2014-10-02

    Applicant: Intermolecular, Inc.

    Inventor： Jeremy Cheng ,  Indranil De ,  Ho Yin Owen Fong ,  Zhendong Hong ,  Dan Wang

    IPC: G05B19/402

    CPC classification number: G05B19/402 ,  B01J19/0046 ,  B01J2219/00326 ,  B01J2219/0043 ,  B01J2219/00443 ,  B01J2219/00536 ,  B01J2219/00612 ,  B01J2219/00689 ,  B01J2219/00693 ,  B01J2219/00695 ,  C23C14/042 ,  C23C14/505 ,  C23C14/54 ,  G05B2219/45031

    Abstract: Substrate processing including correction for deposition location is described, including a combinatorial processing chamber that incorporates the correction. The combinatorial processing chamber can be used to process multiple regions of a substrate using different processing parameters on different regions. For example, one region can have one material deposited on it and another region can have a different material deposited on it, although other combinations and variations are possible. The combinatorial processing chamber uses a rotating and revolving substrate pedestal to be able to deposit on all locations or positions on a substrate. The combinatorial processing chamber uses a correction factor that accounts for variations in alignment and/or configuration of the processing chamber so that the actual location of deposition of a region is approximately the same as a desired location of deposition.

    Abstract translation: 描述包括用于沉积位置的校正的衬底处理，包括结合了校正的组合处理室。 组合处理室可用于在不同区域上使用不同的处理参数处理衬底的多个区域。 例如，一个区域可以具有沉积在其上的一个材料，而另一个区域可以具有沉积在其上的不同材料，尽管其它组合和变化是可能的。 组合处理室使用旋转和旋转的基板基座能够沉积在基板上的所有位置或位置上。 组合处理室使用考虑处理室的对准和/或配置变化的校正因子，使得区域的实际沉积位置与期望的沉积位置大致相同。

    Shadow Mask for Patterned Deposition on Substrates
    6.
    发明申请
    Shadow Mask for Patterned Deposition on Substrates 审中-公开
    阴影掩模用于图案沉积在底物上

    公开(公告)号：US20150031148A1

    公开(公告)日：2015-01-29

    申请号：US14505256

    申请日：2014-10-02

    Applicant: Intermolecular, Inc.

    Inventor： Indranil De ,  Kurt Weiner

    IPC: H01L21/02 ,  H01L21/66

    CPC classification number: H01L21/02266 ,  B05C21/00 ,  B05C21/005 ,  C23C14/04 ,  C23C14/042 ,  H01L22/10

    Abstract: A method for performing a physical vapor deposition (PVD) on a substrate is disclosed, comprising placing a substrate on a susceptor disposed below one or more PVD guns and below a plasma shield assembly having a bellows and a shadow mask coupled to a bottom side of the bellows, lowering the bellows toward the substrate to place the shadow mask in contact with the substrate; and depositing a material on an isolated region on the substrate through the shadow mask. In one implementation, the shadow mask may include a plate having openings in the shape of individual dies on the substrate, and a layer having openings in the shape of features patterned on the substrate, wherein the layer is coupled to a bottom surface of the plate by an epoxy.

    Abstract translation: 公开了一种用于在基板上进行物理气相沉积（PVD）的方法，包括将基板放置在设置在一个或多个PVD枪下方的基座上并且在等离子体屏蔽组件的下方，该等离子体屏蔽组件具有耦合到底部的波纹管和荫罩 波纹管，将波纹管朝向基板降低以使荫罩与基板接触; 以及通过所述荫罩将材料沉积在所述衬底上的隔离区域上。 在一个实施方案中，荫罩可以包括具有在基板上的各个模具形状的开口的板，以及具有在基板上图案化的特征形状的开口的层，其中该层耦合到板的底表面 通过环氧树脂。

    Yttrium and titanium high-k dielectric films
    7.
    发明授权
    Yttrium and titanium high-k dielectric films 有权
    钇和钛高k电介质膜

    公开(公告)号：US08900418B2

    公开(公告)日：2014-12-02

    申请号：US13677126

    申请日：2012-11-14

    Applicant: Intermolecular, Inc.

    Inventor： Imran Hashim ,  Hanhong Chen ,  Tony Chiang ,  Indranil De ,  Nobi Fuchigami ,  Edward Haywood ,  Pragati Kumar ,  Sandra Malhotra ,  Sunil Shanker

    IPC: C23C14/34 ,  B05D5/12 ,  H01L49/02 ,  C23C16/40 ,  C23C16/455 ,  H01L21/314 ,  H01L21/316 ,  H01L27/108 ,  H01L21/02

    CPC classification number: H01L28/65 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02697 ,  H01L21/3141 ,  H01L21/31604 ,  H01L27/10852 ,  H01L28/40

    Abstract: This disclosure provides (a) methods of making an oxide layer (e.g., a dielectric layer) based on yttrium and titanium, to have a high dielectric constant and low leakage characteristic and (b) related devices and structures. An oxide layer having both yttrium and titanium may be fabricated either as an amorphous oxide or as an alternating series of monolayers. In several embodiments, the oxide is characterized by a yttrium contribution to total metal that is specifically controlled. The oxide layer can be produced as the result of a reactive process, if desired, via either a PVD process or, alternatively, via an atomic layer deposition process that employs specific precursor materials to allow for a common process temperature window for both titanium and yttrium reactions.

    Abstract translation: 本公开内容提供（a）制造基于钇和钛的氧化物层（例如电介质层）的方法，以具有高介电常数和低泄漏特性，以及（b）相关的器件和结构。 具有钇和钛的氧化物层可以制成无定形氧化物或交替的单层系列。 在几个实施方案中，氧化物的特征在于对特定控制的总金属的钇贡献。 如果需要，可以通过PVD工艺或者通过使用特定的前体材料以允许钛和钇的共同工艺温度窗口的原子层沉积工艺，作为反应过程的结果来生产氧化物层 反应。

    Composition And Method For Removing Photoresist And Bottom Anti-Reflective Coating For A Semiconductor Substrate
    8.
    发明申请
    Composition And Method For Removing Photoresist And Bottom Anti-Reflective Coating For A Semiconductor Substrate 审中-公开
    用于去除半导体衬底的光刻胶和底部防反射涂层的组合物和方法

    公开(公告)号：US20130244186A1

    公开(公告)日：2013-09-19

    申请号：US13891412

    申请日：2013-05-10

    Applicant: Intermolecular Inc.

    Inventor： Indranil De ,  Anh Duong

    IPC: G03F7/32

    CPC classification number: G03F7/327 ,  C11D7/3209 ,  C11D7/5009 ,  C11D7/5013 ,  C11D7/5022 ,  C11D11/0047 ,  G03F7/425 ,  H01L21/02052

    Abstract: A composition for removing photoresist and bottom anti-reflective coating from a semiconductor substrate is disclosed. The composition may comprise a nontoxic solvent, the nontoxic solvent having a flash point above 80 degrees Celsius and being capable of dissolving acrylic polymer and phenolic polymer. The composition may further comprise Tetramethylammonium Hydroxide (TMAH) mixed with the nontoxic solvent.

    Abstract translation: 公开了一种用于从半导体衬底去除光致抗蚀剂和底部抗反射涂层的组合物。 组合物可以包含无毒溶剂，无毒溶剂具有高于80摄氏度的闪点，并且能够溶解丙烯酸聚合物和酚醛聚合物。 组合物还可以包含与无毒溶剂混合的四甲基氢氧化铵（TMAH）。

    Shadow mask for patterned deposition on substrates
    10.
    发明授权
    Shadow mask for patterned deposition on substrates 有权
    阴影掩模用于图案沉积在基底上

    公开(公告)号：US08881677B2

    公开(公告)日：2014-11-11

    申请号：US13707910

    申请日：2012-12-07

    Applicant: Intermolecular, Inc.

    Inventor： Indranil De ,  Kurt Weiner

    IPC: B05C21/00 ,  B05C11/00 ,  C23C14/04

    CPC classification number: H01L21/02266 ,  B05C21/00 ,  B05C21/005 ,  C23C14/04 ,  C23C14/042 ,  H01L22/10

    Abstract: A method for performing a physical vapor deposition (PVD) on a substrate is disclosed, comprising placing a substrate on a susceptor disposed below one or more PVD guns and below a plasma shield assembly having a bellows and a shadow mask coupled to a bottom side of the bellows, lowering the bellows toward the substrate to place the shadow mask in contact with the substrate; and depositing a material on an isolated region on the substrate through the shadow mask. In one implementation, the shadow mask may include a plate having openings in the shape of individual dies on the substrate, and a layer having openings in the shape of features patterned on the substrate, wherein the layer is coupled to a bottom surface of the plate by an epoxy.

    Abstract translation: 公开了一种用于在基板上进行物理气相沉积（PVD）的方法，包括将基板放置在设置在一个或多个PVD枪下方的基座上并且在等离子体屏蔽组件的下方，该等离子体屏蔽组件具有耦合到底部的波纹管和荫罩 波纹管，将波纹管朝向基板降低以使荫罩与基板接触; 以及通过所述荫罩将材料沉积在所述衬底上的隔离区域上。 在一个实施方案中，荫罩可以包括具有在基板上的各个模具的形状的开口的板，以及具有在基板上图案化的特征形状的开口的层，其中该层耦合到板的底表面 通过环氧树脂。

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