公开(公告)号：US20050215043A1

公开(公告)日：2005-09-29

申请号：US11136650

申请日：2005-05-24

申请人： Jin Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

发明人： Jin Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

IPC分类号： H01L21/44 ,  H01L21/56 ,  H01L21/60 ,  H01L23/31 ,  H01L23/485 ,  H01L23/525 ,  H04B1/707 ,  H04B7/26 ,  H05K3/10 ,  H05K3/24 ,  H05K3/34

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/525 ,  H01L24/11 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/85399 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H04B1/712 ,  H05K3/108 ,  H05K3/243 ,  H05K3/3473 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2201/0949 ,  H05K2203/043 ,  H05K2203/054 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is deposited, a first photoresist mask is created exposing the barrier/seed layer where this layer overlies the contact pad and, contiguous therewith, over a surface area that is adjacent to the contact pad and emanating in one direction from the contact pad. The exposed surface of the barrier/seed layer is electroplated for the creation of interconnect traces. The first photoresist mask is removed from the surface of the barrier/seed layer. A second photoresist mask, defining the solder bump, is created exposing the surface area of the barrier/seed layer that is adjacent to the contact pad and emanating in one direction from the contact pad. The solder bump is created in accordance with the second photoresist mask, the second photoresist mask is removed from the surface of the barrier/seed layer, exposing the electroplating and the barrier/seed layer with the metal plating overlying the barrier/seed layer. The exposed barrier/seed layer is etched in accordance with the pattern formed by the electroplating, reflow of the solder bump is optionally performed.

公开(公告)号：US07338890B2

公开(公告)日：2008-03-04

申请号：US11136650

申请日：2005-05-24

申请人： Jin Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

发明人： Jin Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

IPC分类号： H01L21/44

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/525 ,  H01L24/11 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/85399 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H04B1/712 ,  H05K3/108 ,  H05K3/243 ,  H05K3/3473 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2201/0949 ,  H05K2203/043 ,  H05K2203/054 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is deposited, a first photoresist mask is created exposing the barrier/seed layer where this layer overlies the contact pad and, contiguous therewith, over a surface area that is adjacent to the contact pad and emanating in one direction from the contact pad. The exposed surface of the barrier/seed layer is electroplated for the creation of interconnect traces. The first photoresist mask is removed from the surface of the barrier/seed layer. A second photoresist mask, defining the solder bump, is created exposing the surface area of the barrier/seed layer that is adjacent to the contact pad and emanating in one direction from the contact pad. The solder bump is created in accordance with the second photoresist mask, the second photoresist mask is removed from the surface of the barrier/seed layer, exposing the electroplating and the barrier/seed layer with the metal plating overlying the barrier/seed layer. The exposed barrier/seed layer is etched in accordance with the pattern formed by the electroplating, reflow of the solder bump is optionally performed.

公开(公告)号：US08481418B2

公开(公告)日：2013-07-09

申请号：US11930220

申请日：2007-10-31

申请人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

发明人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

IPC分类号： H01L21/44

CPC分类号： H04B1/7113 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/14 ,  H01L24/15 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/11901 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H04B1/712 ,  H01L2224/13099 ,  H01L2924/00

摘要： The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is deposited, a first photoresist mask is created exposing the barrier/seed layer where this layer overlies the contact pad and, contiguous therewith, over a surface area that is adjacent to the contact pad and emanating in one direction from the contact pad. The exposed surface of the barrier/seed layer is electroplated for the creation of interconnect traces. The first photoresist mask is removed from the surface of the barrier/seed layer. A second photoresist mask, defining the solder bump, is created exposing the surface area of the barrier/seed layer that is adjacent to the contact pad and emanating in one direction from the contact pad. The solder bump is created in accordance with the second photoresist mask, the second photoresist mask is removed from the surface of the barrier/seed layer, exposing the electroplating and the barrier/seed layer with the metal plating overlying the barrier/seed layer. The exposed barrier/seed layer is etched in accordance with the pattern formed by the electroplating, reflow of the solder bump is optionally performed.

摘要翻译： 本发明提供了一种新的方法和芯片级封装。 本发明从提供接触点的基底开始，接触点通过在钝化层中形成的开口和聚合物或弹性体层暴露。 形成屏障/种子层，产生第一光致抗蚀剂掩模，暴露阻挡层/籽晶层，其中该层覆盖在接触焊盘上，并与其邻接，在与接触焊盘相邻的表面区域上并且沿一个方向从 接触垫 电镀/种子层的暴露表面被电镀以产生互连迹线。 从阻挡层/种子层的表面去除第一光致抗蚀剂掩模。 产生限定焊料凸块的第二光致抗蚀剂掩模产生暴露与接触焊盘相邻并且在一个方向上从接触焊盘发出的势垒/种子层的表面积。 根据第二光致抗蚀剂掩模产生焊料凸块，从阻挡层/种子层的表面去除第二光致抗蚀剂掩模，用覆盖在阻挡层/种子层上的金属电镀暴露电镀和阻挡层/籽晶层。 根据由电镀形成的图案蚀刻暴露的阻挡层/籽晶层，任选地进行焊料凸点的回流。

公开(公告)号：US20100038803A9

公开(公告)日：2010-02-18

申请号：US11930210

申请日：2007-10-31

申请人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

发明人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

IPC分类号： H01L23/52

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/525 ,  H01L24/11 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/85399 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H04B1/712 ,  H05K3/108 ,  H05K3/243 ,  H05K3/3473 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2201/0949 ,  H05K2203/043 ,  H05K2203/054 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is deposited, a first photoresist mask is created exposing the barrier/seed layer where this layer overlies the contact pad and, contiguous therewith, over a surface area that is adjacent to the contact pad and emanating in one direction from the contact pad. The exposed surface of the barrier/seed layer is electroplated for the creation of interconnect traces. The first photoresist mask is removed from the surface of the barrier/seed layer. A second photoresist mask, defining the solder bump, is created exposing the surface area of the barrier/seed layer that is adjacent to the contact pad and emanating in one direction from the contact pad. The solder bump is created in accordance with the second photoresist mask, the second photoresist mask is removed from the surface of the barrier/seed layer, exposing the electroplating and the barrier/seed layer with the metal plating overlying the barrier/seed layer. The exposed barrier/seed layer is etched in accordance with the pattern formed by the electroplating, reflow of the solder bump is optionally performed.

摘要翻译： 本发明提供了一种新的方法和芯片级封装。 本发明从提供接触点的基底开始，接触点通过在钝化层中形成的开口和聚合物或弹性体层暴露。 形成屏障/种子层，产生第一光致抗蚀剂掩模，暴露阻挡层/籽晶层，其中该层覆盖在接触焊盘上，并与其邻接，在与接触焊盘相邻的表面区域上并且沿一个方向从 接触垫 电镀/种子层的暴露表面被电镀以产生互连迹线。 从阻挡层/种子层的表面去除第一光致抗蚀剂掩模。 产生限定焊料凸块的第二光致抗蚀剂掩模产生暴露与接触焊盘相邻并且在一个方向上从接触焊盘发出的势垒/种子层的表面积。 根据第二光致抗蚀剂掩模产生焊料凸块，从阻挡层/种子层的表面去除第二光致抗蚀剂掩模，用覆盖在阻挡层/种子层上的金属电镀暴露电镀和阻挡层/籽晶层。 根据由电镀形成的图案蚀刻暴露的阻挡层/籽晶层，任选地进行焊料凸点的回流。

公开(公告)号：US20080099928A1

公开(公告)日：2008-05-01

申请号：US11930210

申请日：2007-10-31

申请人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

发明人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

IPC分类号： H01L23/52

CPC分类号： H01L24/12 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/525 ,  H01L24/11 ,  H01L24/16 ,  H01L24/48 ,  H01L2224/0231 ,  H01L2224/02311 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05599 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2224/45099 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/85399 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H04B1/712 ,  H05K3/108 ,  H05K3/243 ,  H05K3/3473 ,  H05K2201/0367 ,  H05K2201/09436 ,  H05K2201/0949 ,  H05K2203/043 ,  H05K2203/054 ,  H01L2224/13099 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/00012

摘要： The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is deposited, a first photoresist mask is created exposing the barrier/seed layer where this layer overlies the contact pad and, contiguous therewith, over a surface area that is adjacent to the contact pad and emanating in one direction from the contact pad. The exposed surface of the barrier/seed layer is electroplated for the creation of interconnect traces. The first photoresist mask is removed from the surface of the barrier/seed layer. A second photoresist mask, defining the solder bump, is created exposing the surface area of the barrier/seed layer that is adjacent to the contact pad and emanating in one direction from the contact pad. The solder bump is created in accordance with the second photoresist mask, the second photoresist mask is removed from the surface of the barrier/seed layer, exposing the electroplating and the barrier/seed layer with the metal plating overlying the barrier/seed layer. The exposed barrier/seed layer is etched in accordance with the pattern formed by the electroplating, reflow of the solder bump is optionally performed.

公开(公告)号：US07465653B2

公开(公告)日：2008-12-16

申请号：US10962964

申请日：2004-10-12

申请人： Ching-Cheng Huang ,  Chuen-Jye Lin ,  Ming-Ta Lei ,  Mou-Shiung Lin

发明人： Ching-Cheng Huang ,  Chuen-Jye Lin ,  Ming-Ta Lei ,  Mou-Shiung Lin

IPC分类号： H01L21/44 ,  H01L23/48

CPC分类号： H01L24/05 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/02166 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05018 ,  H01L2224/05019 ,  H01L2224/05027 ,  H01L2224/05093 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00012

摘要： In accordance with the objectives of the invention a new method is provided for the creation of metal bumps over surfaces of I/O pads. Contact pads are provided over the surface of a layer of dielectric. The aluminum of the I/O pads, which have been used as I/O pads during wafer level semiconductor device testing, is completely or partially removed over a surface area that is smaller than the surface area of the contact pad using methods of metal dry etching or wet etching. The contact pad can be accessed either by interconnect metal created in a plane of the contact pad or by via that are provided through the layer of dielectric over which the contact pad has been deposited. The process can be further extended by the deposition, patterning and etching of a layer of polyimide over the layer of passivation that serves to protect the contact pad.

摘要翻译： 根据本发明的目的，提供了一种在I / O焊盘的表面上形成金属凸块的新方法。 接触垫设置在电介质层的表面上。 在晶片级半导体器件测试期间用作I / O焊盘的I / O焊盘的铝在使用金属干燥的方法的表面积小于接触焊盘的表面积的情况下被完全或部分地去除 蚀刻或湿蚀刻。 接触焊盘可以通过在接触焊盘的平面中产生的互连金属或通过已经沉积接触焊盘的电介质层提供的通孔来访问。 通过在用于保护接触焊盘的钝化层上的聚酰亚胺层的沉积，图案化和蚀刻可以进一步扩展该工艺。

公开(公告)号：US20080113504A1

公开(公告)日：2008-05-15

申请号：US11930224

申请日：2007-10-31

申请人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

发明人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

IPC分类号： H01L21/441

CPC分类号： H04B1/7113 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/14 ,  H01L24/15 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/11901 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H04B1/712 ,  H01L2224/13099 ,  H01L2924/00

摘要： The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is deposited, a first photoresist mask is created exposing the barrier/seed layer where this layer overlies the contact pad and, contiguous therewith, over a surface area that is adjacent to the contact pad and emanating in one direction from the contact pad. The exposed surface of the barrier/seed layer is electroplated for the creation of interconnect traces. The first photoresist mask is removed from the surface of the barrier/seed layer. A second photoresist mask, defining the solder bump, is created exposing the surface area of the barrier/seed layer that is adjacent to the contact pad and emanating in one direction from the contact pad. The solder bump is created in accordance with the second photoresist mask, the second photoresist mask is removed from the surface of the barrier/seed layer, exposing the electroplating and the barrier/seed layer with the metal plating overlying the barrier/seed layer. The exposed barrier/seed layer is etched in accordance with the pattern formed by the electroplating, reflow of the solder bump is optionally performed.

公开(公告)号：US20080111236A1

公开(公告)日：2008-05-15

申请号：US11930213

申请日：2007-10-31

申请人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

发明人： Jin-Yuan Lee ,  Ming-Ta Lei ,  Ching-Cheng Huang ,  Chuen-Jye Lin

IPC分类号： H01L23/488

CPC分类号： H04B1/7113 ,  H01L21/563 ,  H01L23/3114 ,  H01L23/3128 ,  H01L24/11 ,  H01L24/12 ,  H01L24/13 ,  H01L24/14 ,  H01L24/15 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/1147 ,  H01L2224/11831 ,  H01L2224/11901 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01041 ,  H01L2924/01042 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01084 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/351 ,  H04B1/712 ,  H01L2224/13099 ,  H01L2924/00

摘要： The invention provides a new method and chip scale package is provided. The inventions starts with a substrate over which a contact point is provided, the contact point is exposed through an opening created in the layer of passivation and a layer of polymer or elastomer. A barrier/seed layer is deposited, a first photoresist mask is created exposing the barrier/seed layer where this layer overlies the contact pad and, contiguous therewith, over a surface area that is adjacent to the contact pad and emanating in one direction from the contact pad. The exposed surface of the barrier/seed layer is electroplated for the creation of interconnect traces. The first photoresist mask is removed from the surface of the barrier/seed layer. A second photoresist mask, defining the solder bump, is created exposing the surface area of the barrier/seed layer that is adjacent to the contact pad and emanating in one direction from the contact pad. The solder bump is created in accordance with the second photoresist mask, the second photoresist mask is removed from the surface of the barrier/seed layer, exposing the electroplating and the barrier/seed layer with the metal plating overlying the barrier/seed layer. The exposed barrier/seed layer is etched in accordance with the pattern formed by the electroplating, reflow of the solder bump is optionally performed.

摘要翻译： 本发明提供了一种新的方法和芯片级封装。 本发明从提供接触点的基底开始，接触点通过在钝化层中形成的开口和聚合物或弹性体层暴露。 形成屏障/种子层，产生第一光致抗蚀剂掩模，暴露阻挡层/籽晶层，其中该层覆盖在接触焊盘上，并与其邻接，在与接触焊盘相邻的表面区域上并且沿一个方向从 接触垫 电镀/种子层的暴露表面被电镀以产生互连迹线。 从阻挡层/种子层的表面去除第一光致抗蚀剂掩模。 产生限定焊料凸块的第二光致抗蚀剂掩模产生暴露与接触焊盘相邻并且在一个方向上从接触焊盘发出的势垒/种子层的表面积。 根据第二光致抗蚀剂掩模产生焊料凸块，从阻挡层/种子层的表面去除第二光致抗蚀剂掩模，用覆盖在阻挡层/种子层上的金属电镀暴露电镀和阻挡层/籽晶层。 根据由电镀形成的图案蚀刻暴露的阻挡层/籽晶层，任选地进行焊料凸点的回流。

公开(公告)号：US08901733B2

公开(公告)日：2014-12-02

申请号：US12182145

申请日：2008-07-30

申请人： Ching-Cheng Huang ,  Chuen-Jye Lin ,  Ming-Ta Lei ,  Mou-Shiung Lin

发明人： Ching-Cheng Huang ,  Chuen-Jye Lin ,  Ming-Ta Lei ,  Mou-Shiung Lin

IPC分类号： H01L23/48 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L24/05 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/02166 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05018 ,  H01L2224/05019 ,  H01L2224/05027 ,  H01L2224/05093 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00012

摘要： In accordance with the objectives of the invention a new method is provided for the creation of metal bumps over surfaces of I/O pads. Contact pads are provided over the surface of a layer of dielectric. The aluminum of the I/O pads, which have been used as I/O pads during wafer level semiconductor device testing, is completely or partially removed over a surface area that is smaller than the surface area of the contact pad using methods of metal dry etching or wet etching. The contact pad can be accessed either by interconnect metal created in a plane of the contact pad or by via that are provided through the layer of dielectric over which the contact pad has been deposited. The process can be further extended by the deposition, patterning and etching of a layer of polyimide over the layer of passivation that serves to protect the contact pad.

摘要翻译： 根据本发明的目的，提供了一种在I / O焊盘的表面上形成金属凸块的新方法。 接触垫设置在电介质层的表面上。 在晶片级半导体器件测试期间用作I / O焊盘的I / O焊盘的铝在使用金属干燥的方法的表面积小于接触焊盘的表面积的情况下被完全或部分去除 蚀刻或湿蚀刻。 接触焊盘可以通过在接触焊盘的平面中产生的互连金属或通过已经沉积接触焊盘的电介质层提供的通孔来访问。 通过在用于保护接触焊盘的钝化层上的聚酰亚胺层的沉积，图案化和蚀刻可以进一步扩展该工艺。

公开(公告)号：US20080284016A1

公开(公告)日：2008-11-20

申请号：US12182145

申请日：2008-07-30

申请人： Ching-Cheng Huang ,  Chuen-Jye Lin ,  Ming-Ta Lei ,  Mou-Shiung Lin

发明人： Ching-Cheng Huang ,  Chuen-Jye Lin ,  Ming-Ta Lei ,  Mou-Shiung Lin

IPC分类号： H01L23/488

CPC分类号： H01L24/05 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/11 ,  H01L24/12 ,  H01L2224/02166 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05016 ,  H01L2224/05018 ,  H01L2224/05019 ,  H01L2224/05027 ,  H01L2224/05093 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05558 ,  H01L2224/05562 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/11901 ,  H01L2224/13006 ,  H01L2224/13022 ,  H01L2224/13099 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/00012

摘要： In accordance with the objectives of the invention a new method is provided for the creation of metal bumps over surfaces of I/O pads. Contact pads are provided over the surface of a layer of dielectric. The aluminum of the I/O pads, which have been used as I/O pads during wafer level semiconductor device testing, is completely or partially removed over a surface area that is smaller than the surface area of the contact pad using methods of metal dry etching or wet etching. The contact pad can be accessed either by interconnect metal created in a plane of the contact pad or by via that are provided through the layer of dielectric over which the contact pad has been deposited. The process can be further extended by the deposition, patterning and etching of a layer of polyimide over the layer of passivation that serves to protect the contact pad.