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17 条记录 (耗时 0.017 秒)

    Method of forming reproducible impurity zone of gallium or aluminum in a wafer by implanting through composite layers and diffusion annealing
    1.
    发明授权
    Method of forming reproducible impurity zone of gallium or aluminum in a wafer by implanting through composite layers and diffusion annealing 失效
    通过植入复合层和扩散退火在晶片中形成镓或铝的可再现杂质区的方法

    公开(公告)号：US4426234A

    公开(公告)日：1984-01-17

    申请号：US327190

    申请日：1981-12-03

    申请人： Jiro Ohshima ,  Yutaka Koshino ,  Takashi Ajima ,  Toshio Yonezawa

    发明人： Jiro Ohshima ,  Yutaka Koshino ,  Takashi Ajima ,  Toshio Yonezawa

    IPC分类号： H01L21/225 ,  H01L21/265 ,  H01L21/3115 ,  H01L21/425 ,  H01L21/74

    CPC分类号： H01L21/31155 ,  H01L21/2255 ,  H01L21/265

    摘要： The invention discloses a method for fabricating a semiconductor device comprising the steps of: forming, on an entire surface of a semiconductor substrate of one conductivity type, a first thin film of a diffusion coefficient greater than a diffusion coefficient of the substrate; forming, on an entire surface of the first thin film, a second thin film having a diffusion coefficient smaller than the diffusion coefficient of the first thin film; ion-implanting an impurity through the second thin film into the first thin film to form an impurity region, said impurity having a conductivity type opposite to the conductivity type of the substrate; and effecting annealing to set a junction depth of the impurity region to a predetermined value. According to the method of the invention, an impurity region having a desired sheet resistivity and a desired diffusion depth can be formed in the semiconductor substrate with excellent reproducibility and control. The formation of the lattice defect can be prevented and the carrier life time can be improved. Gallium is preferably used as the impurity according to the invention.

    摘要翻译： 本发明公开了一种制造半导体器件的方法，包括以下步骤：在一个导电类型的半导体衬底的整个表面上形成大于衬底扩散系数的扩散系数的第一薄膜; 在所述第一薄膜的整个表面上形成扩散系数小于所述第一薄膜的扩散系数的第二薄膜; 将杂质通过第二薄膜离子注入到第一薄膜中以形成杂质区，所述杂质具有与衬底的导电类型相反的导电类型; 并进行退火以将杂质区域的结深度设定为预定值。 根据本发明的方法，可以在半导体衬底中形成具有期望的电阻率和期望的扩散深度的杂质区，具有优异的再现性和控制性。 可以防止晶格缺陷的形成，并且可以提高载体寿命。 优选使用镓作为本发明的杂质。

    Method of making transistors by ion implantations, electron beam irradiation and thermal annealing
    2.
    发明授权
    Method of making transistors by ion implantations, electron beam irradiation and thermal annealing 失效
    通过离子注入，电子束照射和热退火制造晶体管的方法

    公开(公告)号：US4415372A

    公开(公告)日：1983-11-15

    申请号：US313332

    申请日：1981-10-20

    申请人： Yutaka Koshino ,  Toshio Yonezawa ,  Takashi Ajima ,  Jiro Ohshima

    发明人： Yutaka Koshino ,  Toshio Yonezawa ,  Takashi Ajima ,  Jiro Ohshima

    IPC分类号： H01L21/263 ,  H01L21/265 ,  H01L21/324

    CPC分类号： H01L21/324 ,  H01L21/2636 ,  H01L21/26513 ,  Y10S148/046

    摘要： The invention provides a method for fabricating a semiconductor device which comprises the steps of ion-implanting an impurity into a monocrystalline semiconductor substrate; irradiating the region into which the impurity ions have been implanted with an accelerated electron beam under the conditions that the acceleration voltage is 20 to 200 KeV, and the current is 0.01 to 1 mA and the exposure dose is 10.sup.20 to 10.sup.15 /cm.sup.2 ; and carrying out annealing to form a semiconductor region of one conductivity type. According to the present invention, a semiconductor device can be fabricated which has fewer lattice defects and in which the lifetime of the carriers is long.

    摘要翻译： 本发明提供一种制造半导体器件的方法，该方法包括以下步骤：将杂质离子注入到单晶半导体衬底中; 在加速电压为20〜200KeV，电流为0.01〜1mA，曝光量为1020〜1015 / cm2的条件下，用加速电子束照射杂质离子注入的区域; 并进行退火以形成一种导电类型的半导体区域。 根据本发明，可以制造具有更少的晶格缺陷并且其中载体的寿命长的半导体器件。

    Method for forming metallization structure having flat surface on semiconductor substrate
    9.
    发明授权
    Method for forming metallization structure having flat surface on semiconductor substrate 失效
    在半导体衬底上形成具有平坦表面的金属化结构的方法

    公开(公告)号：US4520041A

    公开(公告)日：1985-05-28

    申请号：US548440

    申请日：1983-11-03

    申请人： Masaharu Aoyama ,  Masahiro Abe ,  Takashi Ajima ,  Toshio Yonezawa

    发明人： Masaharu Aoyama ,  Masahiro Abe ,  Takashi Ajima ,  Toshio Yonezawa

    IPC分类号： H01L21/3205 ,  H01L21/306 ,  H01L21/768 ,  H01L23/532 ,  H01L21/283 ,  H01L21/302

    CPC分类号： H01L23/53295 ,  H01L21/7684 ,  H01L23/5329 ,  H01L2924/0002

    摘要： A metallization structure having a substantially flat surface can be formed on a semiconductor substrate by forming first and second insulating layers on the substrate. The second insulating layer is selectively removed to form grooves therein. Then, a metallic material layer is conformably formed. The metallic layer has grooves corresponding to the grooves of the second insulating layer. A flowable polymer is applied to the surface of the resultant structure to form a layer having a flat surface. The polymer layer and the metallic layer are sequentially ion-etched to expose the second insulating layer. Thus, the metallization structure constituted by the remaining metallic layer and the second insulating layer is formed to have a flat surface.

    摘要翻译： 通过在衬底上形成第一绝缘层和第二绝缘层，可以在半导体衬底上形成具有基本平坦表面的金属化结构。 选择性地去除第二绝缘层以在其中形成凹槽。 然后，顺应地形成金属材料层。 金属层具有与第二绝缘层的槽对应的槽。 将可流动的聚合物施加到所得结构的表面以形成具有平坦表面的层。 依次离子蚀刻聚合物层和金属层以露出第二绝缘层。 因此，由剩余的金属层和第二绝缘层构成的金属化结构形成为具有平坦的表面。