公开(公告)号：US20060178004A1

公开(公告)日：2006-08-10

申请号：US11053610

申请日：2005-02-08

申请人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes

发明人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes

IPC分类号： H01L21/4763

CPC分类号： B81C1/00476 ,  B81B2203/0118 ,  B81C2201/0132 ,  G01N1/32 ,  Y10S438/933

摘要： A method of patterning and releasing chemically sensitive low k films without the complication of a permanent hardmask stack, yielding an unaltered free-standing structure is provided. The method includes providing a structure including a Si-containing substrate having in-laid etch stop layers located therein; forming a chemically sensitive low k film and a protective hardmask having a pattern atop the structure; transferring the pattern to the chemically sensitive low k film to provide an opening that exposes a portion of the Si-containing substrate; and etching the exposed portion of the Si-containing substrate through the opening to provide a cavity in the Si-containing substrate in which a free-standing low k film structure is formed, while removing the hardmask. In accordance with the present invention, the etching comprises a XeF2 etch gas.

摘要翻译： 提供了图案化和释放化学敏感性低k膜的方法，而不需要永久性硬掩模堆叠的复杂性，产生未改变的独立结构。 该方法包括提供包括其中位于其中的内置蚀刻停止层的含Si衬底的结构; 形成化学敏感的低k膜和在结构顶部具有图案的保护性硬掩模; 将图案转移到化学敏感的低k膜上以提供暴露一部分含Si衬底的开口; 并且通过所述开口蚀刻含Si衬底的暴露部分，以在去除硬掩模的同时在其中形成独立的低k膜结构的含Si衬底中提供空腔。 根据本发明，蚀刻包括XeF 2 N 2蚀刻气体。

公开(公告)号：US20080067683A1

公开(公告)日：2008-03-20

申请号：US11871533

申请日：2007-10-12

申请人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes ,  Robert Wisnieff

发明人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes ,  Robert Wisnieff

IPC分类号： H01L23/48

CPC分类号： H01L21/306 ,  H01L21/32135 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76865 ,  H01L23/5227 ,  H01L23/53238 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2924/01002 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01054 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/00

摘要： Disclosed are a method and a system for processing a semiconductor structure of the type including a substrate, a dielectric layer, and a TaN—Ta liner on the dielectric layer. The method comprises the step of using XeF2 to remove at least a portion of the TaN—Ta liner completely to the dielectric layer. In the preferred embodiments, the present invention uses XeF2 selective gas phase etching as alternatives to Ta—TaN Chemical Mechanical Polishing (CMP) as a basic “liner removal process” and as a “selective cap plating base removal process.” In this first use, XeF2 is used to remove the metal liner, TaN—Ta, after copper CMP. In the second use, the XeF2 etch is used to selectively remove a plating base (TaN—Ta) that was used to form a metal cap layer over the copper conductor.

公开(公告)号：US20080066860A1

公开(公告)日：2008-03-20

申请号：US11871504

申请日：2007-10-12

申请人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes ,  Robert Wisnieff

发明人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes ,  Robert Wisnieff

IPC分类号： C23F1/00

CPC分类号： H01L21/306 ,  H01L21/32135 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76865 ,  H01L23/5227 ,  H01L23/53238 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2924/01002 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01054 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/00

摘要： Disclosed are a method and a system for processing a semiconductor structure of the type including a substrate, a dielectric layer, and a TaN—Ta liner on the dielectric layer. The method comprises the step of using XeF2 to remove at least a portion of the TaN—Ta liner completely to the dielectric layer. In the preferred embodiments, the present invention uses XeF2 selective gas phase etching as alternatives to Ta—TaN Chemical Mechanical Polishing (CMP) as a basic “liner removal process” and as a “selective cap plating base removal process.” In this first use, XeF2 is used to remove the metal liner, TaN—Ta, after copper CMP. In the second use, the XeF2 etch is used to selectively remove a plating base (TaN—Ta) that was used to form a metal cap layer over the copper conductor.

摘要翻译： 公开了一种在电介质层上处理包括衬底，电介质层和TaN-Ta衬垫的类型的半导体结构的方法和系统。 该方法包括使用XeF 2将至少一部分TaN-Ta衬套完全去除到介电层的步骤。 在优选实施例中，本发明使用XeF2选择性气相蚀刻作为Ta-TaN化学机械抛光（CMP）的替代品作为基本的“衬垫去除工艺”，并且作为“选择性电镀镀层去除工艺”。 在第一次使用中，XeF2用于在铜CMP之后去除金属衬垫TaN-Ta。 在第二次使用中，XeF2蚀刻用于选择性地去除用于在铜导体上形成金属覆盖层的电镀基底（TaN-Ta）。

公开(公告)号：US20060189134A1

公开(公告)日：2006-08-24

申请号：US11064561

申请日：2005-02-24

申请人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes ,  Robert Wisnieff

发明人： John Cotte ,  Nils Hoivik ,  Christopher Jahnes ,  Robert Wisnieff

IPC分类号： H01L21/44 ,  H01L23/48

CPC分类号： H01L21/306 ,  H01L21/32135 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76865 ,  H01L23/5227 ,  H01L23/53238 ,  H01L24/11 ,  H01L2224/13099 ,  H01L2924/01002 ,  H01L2924/01006 ,  H01L2924/01018 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01054 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/19042 ,  H01L2924/30105 ,  H01L2924/00

摘要： Disclosed are a method and a system for processing a semiconductor structure of the type including a substrate, a dielectric layer, and a TaN—Ta liner on the dielectric layer. The method comprises the step of using XeF2 to remove at least a portion of the TaN—Ta liner completely to the dielectric layer. In the preferred embodiments, the present invention uses XeF2 selective gas phase etching as alternatives to Ta—TaN Chemical Mechanical Polishing (CMP) as a basic “liner removal process” and as a “selective cap plating base removal process.” In this first use, XeF2 is used to remove the metal liner, TaN—Ta, after copper CMP. In the second use, the XeF2 etch is used to selectively remove a plating base (TaN—Ta) that was used to form a metal cap layer over the copper conductor.

公开(公告)号：US06639488B2

公开(公告)日：2003-10-28

申请号：US09948478

申请日：2001-09-07

申请人： Hariklia Deligianni ,  Robert Groves ,  Christopher Jahnes ,  Jennifer L. Lund ,  Panayotis Andricacos ,  John Cotte ,  L. Paivikki Buchwalter ,  David Seeger ,  Raul E. Acosta

发明人： Hariklia Deligianni ,  Robert Groves ,  Christopher Jahnes ,  Jennifer L. Lund ,  Panayotis Andricacos ,  John Cotte ,  L. Paivikki Buchwalter ,  David Seeger ,  Raul E. Acosta

IPC分类号： H01P110

CPC分类号： H01P1/12 ,  H01H59/0009 ,  H01H2059/0036

摘要： Disclosed is a capacitive electrostatic MEMS RF switch comprised of a lower electrode that acts as both a transmission line and as an actuation electrode. Also, there is an array of one or more fixed beams above the lower electrode that is connected to ground. The lower electrode transmits the RF signal when the top beam or beams are up and when the upper beams are actuated and bent down, the transmission line is shunted to ground ending the RF transmission. A high dielectric constant material is used in the capacitive portion of the switch to achieve a high capacitance per unit area thus reducing the required chip area and enhancing the insertion loss characteristics in the non-actuated state. A gap between beam and lower electrode of less than 1 &mgr;m is incorporated in order to minimize the electrostatic potential (pull-in voltage) required to actuate the switch.

摘要翻译： 公开了一种电容静电MEMS RF开关，其由作为传输线和致动电极两者的下电极组成。 此外，在下电极上方有一个或多个连接到地面的固定梁的阵列。 当顶部梁或梁向上时，下部电极发射RF信号，并且当上部梁被致动并向下弯曲时，传输线被分流到结束RF传输的地面。 在开关的电容部分中使用高介电常数材料以实现每单位面积的高电容，从而在非致动状态下减少所需的芯片面积并增强插入损耗特性。 引入小于1um的光束和下电极之间的间隙以便使致动开关所需的静电电位（拉入电压）最小化。

公开(公告)号：US20060164194A1

公开(公告)日：2006-07-27

申请号：US11358823

申请日：2006-02-21

申请人： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John Magerlein ,  Kenneth Stein ,  Richard Volant ,  James Tornello ,  Jennifer Lund

发明人： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Paivikki Buchwalter ,  John Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John Magerlein ,  Kenneth Stein ,  Richard Volant ,  James Tornello ,  Jennifer Lund

IPC分类号： H01H51/22

CPC分类号： H01H59/0009 ,  H01H2001/0052 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204

摘要： A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400° C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.

摘要翻译： 描述了提供有作为铜电极的氧阻隔的贵金属触点的半导体微机电系统（MEMS）开关。 MEMS开关完全集成到CMOS半导体制造线中。 集成技术，材料和工艺完全兼容铜芯片金属化工艺，通常是低成本和低温工艺（低于400℃）。 MEMS开关包括：在空腔内的可移动光束，可移动光束在光束的一端或两端锚定到空腔的壁; 嵌入可移动光束中的第一电极; 以及第二电极，其嵌入在所述空腔的壁中并且面向所述第一电极，其中所述第一和第二电极分别被所述贵金属接触物覆盖。

公开(公告)号：US20050007217A1

公开(公告)日：2005-01-13

申请号：US10604278

申请日：2003-07-08

申请人： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Buchwalter ,  John Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John Magerlein ,  Kenneth Stein ,  Richard Volant ,  James Tornello ,  Jennifer Lund

发明人： Hariklia Deligianni ,  Panayotis Andricacos ,  L. Buchwalter ,  John Cotte ,  Christopher Jahnes ,  Mahadevaiyer Krishnan ,  John Magerlein ,  Kenneth Stein ,  Richard Volant ,  James Tornello ,  Jennifer Lund

IPC分类号： H01H59/00 ,  H01H51/22

CPC分类号： H01H59/0009 ,  H01H2001/0052 ,  Y10T29/49156 ,  Y10T29/49165 ,  Y10T29/49204

摘要： A semiconductor micro-electromechanical system (MEMS) switch provided with noble metal contacts that act as an oxygen barrier to copper electrodes is described. The MEMS switch is fully integrated into a CMOS semiconductor fabrication line. The integration techniques, materials and processes are fully compatible with copper chip metallization processes and are typically, a low cost and a low temperature process (below 400°0 C.). The MEMS switch includes: a movable beam within a cavity, the movable beam being anchored to a wall of the cavity at one or both ends of the beam; a first electrode embedded in the movable beam; and a second electrode embedded in an wall of the cavity and facing the first electrode, wherein the first and second electrodes are respectively capped by the noble metal contact.

摘要翻译： 描述了提供有作为铜电极的氧阻隔的贵金属触点的半导体微机电系统（MEMS）开关。 MEMS开关完全集成到CMOS半导体制造线中。 集成技术，材料和工艺完全兼容铜芯片金属化工艺，通常是低成本和低温工艺（低于400°C）。 MEMS开关包括：在空腔内的可移动光束，可移动光束在光束的一端或两端锚定到空腔的壁; 嵌入可移动光束中的第一电极; 以及第二电极，其嵌入在所述空腔的壁中并且面向所述第一电极，其中所述第一和第二电极分别被所述贵金属接触物覆盖。

公开(公告)号：US07738753B2

公开(公告)日：2010-06-15

申请号：US12164580

申请日：2008-06-30

申请人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

发明人： Solomon Assefa ,  Christopher Jahnes ,  Yurii Vlasov

IPC分类号： G02B6/12 ,  G02B6/10 ,  H01L21/302

CPC分类号： G02B6/30 ,  B82Y20/00 ,  G02B6/1223

摘要： An optoelectronic circuit fabrication method and integrated circuit apparatus fabricated therewith. Integrated circuits are fabricated with an integral optical coupling transition to efficiently couple optical energy from an optical fiber to an integrated optical waveguide on the integrated circuit. Layers of specific materials are deposited onto a semiconductor circuit to support etching of a trench to receive an optical coupler that performs proper impedance matching between an optical fiber and an on-circuit optical waveguide that extends part way into the transition channel. A silicon based dielectric that includes at least a portion with a refractive index substantially equal to a section of the optical fiber is deposited into the etched trench to create the optical coupler. Silicon based dielectrics with graded indices are also able to be used. Chemical mechanical polishing is used finalize preparation of the optical transition and integrated circuit.

摘要翻译： 一种光电子电路制造方法及其制造的集成电路装置。 集成电路采用集成光耦合过渡制造，以有效地将光能从光纤耦合到集成电路上的集成光波导。 特定材料的层被沉积到半导体电路上以支持蚀刻沟槽以接收光纤耦合器，该光耦合器在光纤和部分地延伸到过渡通道中的在线光波导之间执行适当的阻抗匹配。 包括折射率基本上等于光纤的一部分的至少一部分的硅基电介质被沉积到蚀刻沟槽中以产生光耦合器。 也可以使用具有分级指数的硅基电介质。 化学机械抛光用于确定光学转换和集成电路的准备。

公开(公告)号：US06197364B1

公开(公告)日：2001-03-06

申请号：US09373792

申请日：1999-08-09

申请人： Milan Paunovic ,  Christopher Jahnes

发明人： Milan Paunovic ,  Christopher Jahnes

IPC分类号： B05D512

CPC分类号： G11B5/858 ,  C23C18/36 ,  H01F41/24

摘要： This invention provides a method and solution for the electroless deposition of Co(P) with a designed coercivity via the programmed addition of supporting electrolytes comprising such sulfur containing compounds as sulfamic acid, potassium sulfate or sodium sulfate to a solution having a source of cobalt ions, a source of citrate ions, a buffering compound to stabilize the pH of the solution, a source of hypophosphite ions and sufficient hydroxide anions to obtain a pH of between about 7 and 9. The magnetized Co(P) material is useful in, for example, rigid magnetic storage disks, hard bias layers for MR thin film heads and magnetic detector tags.

摘要翻译： 本发明提供了一种通过向含有钴离子源的溶液中加入包含含硫化合物如氨基磺酸，硫酸钾或硫酸钠的支持电解质来设计具有设计矫顽力的Co（P）的无电沉积方法和解决方案 ，柠檬酸根离子源，用于稳定溶液pH的缓冲化合物，次磷酸根离子源和足够的氢氧化物阴离子，以获得约7至9的pH。磁化的Co（P）材料可用于 例如，刚性磁存储盘，用于MR薄膜头的硬偏置层和磁性检测器标签。

公开(公告)号：US20120103534A1

公开(公告)日：2012-05-03

申请号：US13349596

申请日：2012-01-13

申请人： JOHN M. COTTE ,  Nils D. Hoivik ,  Christopher Jahnes ,  Minhua Lu ,  Hongqing Zhang

发明人： JOHN M. COTTE ,  Nils D. Hoivik ,  Christopher Jahnes ,  Minhua Lu ,  Hongqing Zhang

IPC分类号： B32B38/10 ,  B32B7/02

CPC分类号： B81C1/00476 ,  G02B26/0841 ,  Y10T156/11 ,  Y10T428/24942 ,  Y10T428/24975 ,  Y10T428/263

摘要： The beam bending of a MEMS device is minimized by reducing interfacial strength between a sacrificial layer and a MEMS structure.

摘要翻译： 通过降低牺牲层和MEMS结构之间的界面强度，使MEMS器件的光束弯曲最小化。