-
公开(公告)号：US06429383B1
公开(公告)日：2002-08-06
申请号：US09291724
申请日：1999-04-14
申请人： John T. Sprietsma , Steve Joy , Bryce Horine
发明人： John T. Sprietsma , Steve Joy , Bryce Horine
IPC分类号： H05K116
CPC分类号： H05K3/0094 , H05K1/113 , H05K3/3452 , H05K2201/0959 , H05K2201/10636 , H05K2201/10689 , H05K2201/10734 , Y02P70/611 , Y10T29/49165
摘要： A circuit board includes electrical interconnect mounting pads for mounting electronic devices thereto. Some of the electrical interconnect mounting pads include a plated through hole which traverses through the circuit board. One end of the plated through holes is closed, plugged or covered to prevent migration of solder through the plated through holes during a solder operation. The reduction in solder migration, as a result of plugging the plated through hole, increases solder joint quality over solder joint quality achieved using plated through holes which are not closed at one end.
摘要翻译： 电路板包括用于将电子装置安装到其上的电互连安装垫。 一些电气互连安装焊盘包括穿过电路板的电镀通孔。 电镀通孔的一端封闭，堵塞或覆盖，以防止焊料在焊接操作期间通过电镀通孔迁移。 由于堵塞电镀通孔，导致焊料迁移的减少增加了使用在一端未闭合的电镀通孔所达到的焊点质量。
-
2.发明授权公开(公告)号：US06288906B1
公开(公告)日：2001-09-11
申请号：US09216780
申请日：1998-12-18
IPC分类号： H01R900
CPC分类号： H05K1/0207 , H05K1/0203 , H05K1/0209 , H05K1/0218 , H05K1/112 , H05K3/3452 , H05K3/429 , H05K2201/0715 , H05K2201/0989 , H05K2203/0455
摘要： A multi-layer printed circuit board includes power planes located on outer conductive layers. The outer conductive layers are patterned to accept circuitry, such as integrated circuits and surface mount devices. Mounting pads are provided on the outer conductive layers which include plated through vias for electrical interconnection with other conductive layers of the printed circuit board. To increase solderability, the plated through vias are located on the mounting pads such that they are covered by the circuit component mounted thereto. By locating the vias under the electrical components, such as surface mount capacitors, the quality of solder fillets is increased. To enhance heat dissipation, openings are provided in solder masks located on exterior surfaces of the outer conductive planes. These openings are located in the solder mask to expose the conductive plane. As such, the openings are located in areas where circuitry is not mounted to the printed circuit board.
摘要翻译： 多层印刷电路板包括位于外导电层上的电源层。 外部导电层被图案化以接受诸如集成电路和表面安装器件的电路。 安装焊盘设置在外导电层上，其包括电镀通孔，用于与印刷电路板的其它导电层电互连。 为了增加可焊性，电镀通孔位于安装焊盘上，使得它们被安装在其上的电路部件覆盖。 通过将通孔定位在诸如表面贴装电容器之类的电气部件下方，焊盘的质量得到提高。 为了增强散热，在位于外部导电平面的外表面上的焊接掩模中提供开口。 这些开口位于焊接掩模中以暴露导电平面。 因此，开口位于电路未安装到印刷电路板的区域中。
-
公开(公告)号：US06180215B2
公开(公告)日：2001-01-30
申请号：US09353310
申请日：1999-07-14
申请人： John T. Sprietsma , James V. Noval
发明人： John T. Sprietsma , James V. Noval
IPC分类号： B32B300
CPC分类号： B32B5/024 , B32B5/022 , B32B7/12 , B32B27/04 , B32B27/10 , B32B2315/085 , B32B2457/08 , H05K1/024 , H05K3/4688 , H05K2201/0284 , H05K2201/09309 , Y10S428/901 , Y10T428/24917
摘要： Disclosed is a multilayer (e.g., 4-layer) printed circuit board and method of manufacture thereof. The multilayer printed circuit board has at least one inner substrate (inner core) that includes a phenolic resin (e.g., a phenolic resin-laminated paper). Outer insulating layers of the multilayer printed circuit board can have a low dielectric constant (e.g., 3.8-4.4) and a high Tg (e.g., 180°-200° C.). The multilayer printed circuit board can be provided by steps including forming electrical circuit patterns from a copper foil on the inner substrate, to form a printed circuit board, forming a stack of at least one printed circuit board and outer copper foil layers, with insulating layers of, e.g., a semi-cured resin (e.g., prepreg layers) interposed between adjacent conductive metal layers, and then laminating the stack.
摘要翻译： 公开了一种多层（例如4层）印刷电路板及其制造方法。 多层印刷电路板具有至少一个包含酚醛树脂（例如酚醛树脂层压纸）的内基材（内芯）。 多层印刷电路板的外绝缘层可以具有低介电常数（例如3.8-4.4）和高Tg（例如180°-200℃）。 多层印刷电路板可以通过包括从内部基板上的铜箔形成电路图案的步骤来形成印刷电路板，形成具有绝缘层的至少一个印刷电路板和外部铜箔层的堆叠 例如介于相邻的导电金属层之间的半固化树脂（例如，预浸料层），然后层叠该叠层。
-
公开(公告)号：US20080266778A1
公开(公告)日：2008-10-30
申请号：US12052804
申请日：2008-03-21
CPC分类号： G11C5/025 , G11C5/04 , H05K1/0298 , H05K1/181 , H05K2201/09227 , H05K2201/10159 , Y02P70/611
摘要： In some embodiments a memory module circuit board includes a first surface adapted to couple a first plurality of memory devices, a plurality of signal lines, and a command and address bus coupled to the signal lines. The command and address bus is routed from the signal lines and adapted to couple to at least one of the first plurality of memory devices in a manner that does not require the command and address bus lines to turn more than approximately ninety degrees before coupling to the at least one of the first plurality of memory devices. Other embodiments are described and claimed.
摘要翻译： 在一些实施例中，存储器模块电路板包括适于耦合第一多个存储器件，多条信号线以及耦合到信号线的命令和地址总线的第一表面。 命令和地址总线从信号线路由并且适于以不要求命令和地址总线转过多于九十度的方式耦合到第一多个存储器件中的至少一个，在耦合到 所述第一多个存储器件中的至少一个。 描述和要求保护其他实施例。
-
公开(公告)号：US06739879B2
公开(公告)日：2004-05-25
申请号：US10190167
申请日：2002-07-03
IPC分类号： H01R1200
CPC分类号： H05K3/222 , H05K1/0262 , H05K1/141 , H05K3/3436
摘要： A circuit board assembly is provided, comprising a first circuit board and a ball-grid array jumper. The ball-grid array jumper comprises a second circuit board smaller in size than the first printed circuit board and has at least one layer of conductive traces and at least two solder ball connectors. The ball grid array jumper is mounted to the first printed circuit board via the solder ball connectors.
摘要翻译： 提供了一种电路板组件，包括第一电路板和球栅阵列跳线。 球栅阵列跳线包括尺寸小于第一印刷电路板的第二电路板，并具有至少一层导电迹线和至少两个焊球连接器。 球栅阵列跳线通过焊球连接器安装到第一印刷电路板。
-
公开(公告)号：US20090004891A1
公开(公告)日：2009-01-01
申请号：US11772201
申请日：2007-06-30
IPC分类号： H01R12/06
CPC分类号： G01R1/0408 , G01R1/07378 , H01L2224/16225 , H01L2924/15184 , H01L2924/15192 , H05K1/0268 , H05K1/112 , H05K1/181 , H05K3/3457 , H05K3/4611 , H05K2203/1581
摘要： A novel HDI board that enables test probe access comprises a stack of insulating layers having a first surface and a second surface, wherein the first surface includes at least two devices and the second surface includes a test probe accessible solder bead. The two devices are electrically coupled by at least one metal interconnect formed within the plurality of insulating layers. The HDI board also includes a backside μVia electrically coupling the solder bead to the metal interconnect. Testing of the device may be carried out by way of the solder bead and the backside μVia.
摘要翻译： 使得能够进行测试探针存取的新型HDI板包括具有第一表面和第二表面的绝缘层堆叠，其中第一表面包括至少两个器件，并且第二表面包括测试探针可接近的焊珠。 两个器件通过在多个绝缘层内形成的至少一个金属互连电耦合。 HDI板还包括一个背面的muVia，使焊珠与金属互连电连接。 器件的测试可以通过焊珠和背面muVia进行。
-
公开(公告)号：US06952783B2
公开(公告)日：2005-10-04
申请号：US09992244
申请日：2001-11-14
CPC分类号： G06F1/26 , Y10T307/50 , Y10T307/549
摘要： A power supply system, a circuit board, and a computer, as well as a method of providing power to a circuit element are disclosed. The power supply system may include two or more voltage sources coupled to a circuit element. The voltage output of one voltage source may be coupled to one portion of a plurality of power and return connection terminals on the circuit element, and the voltage output of another voltage source may be coupled to another portion of the plurality of power and return connection terminals. The method may include selecting the portions of the power and return connection terminals, and connecting voltage sources to the selected portions.
摘要翻译： 公开了电源系统，电路板和计算机，以及向电路元件供电的方法。 电源系统可以包括耦合到电路元件的两个或更多个电压源。 一个电压源的电压输出可以耦合到电路元件上的多个功率和返回连接端子的一部分，并且另一电压源的电压输出可以耦合到多个电源和返回连接端子的另一部分 。 该方法可以包括选择功率部分和返回连接端子，以及将电压源连接到所选择的部分。
-
-
-
-
-
-
搜索结果
7 条记录 (耗时 0.017 秒)
