公开(公告)号：US09741738B2

公开(公告)日：2017-08-22

申请号：US15141135

申请日：2016-04-28

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

IPC分类号： H01L29/51 ,  H01L27/11 ,  H01L27/11582 ,  G11C16/04 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11578 ,  H01L27/105 ,  H01L27/11575 ,  H01L27/11551

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L27/1052 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578 ,  H01L29/513

摘要： A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers function as gate electrodes of the memory cells.

公开(公告)号：US20170200734A1

公开(公告)日：2017-07-13

申请号：US15228378

申请日：2016-08-04

申请人： Kabushiki Kaisha Toshiba

发明人： Jun Fujiki ,  Takeshi Kamigaichi ,  Hideaki Aochi

IPC分类号： H01L27/115 ,  H01L29/04 ,  H01L21/02 ,  H01L29/417 ,  H01L23/532 ,  H01L21/28 ,  H01L29/16 ,  H01L29/45

CPC分类号： H01L27/11582 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/28273 ,  H01L21/28282 ,  H01L23/53204 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/04 ,  H01L29/16 ,  H01L29/41741 ,  H01L29/456

摘要： One embodiment includes a plurality of memory cells and a plurality of conducting layers. The memory cells are three-dimensionally disposed on a semiconductor substrate. The conducting layers are disposed in a laminating direction. Each of the plurality of the conducting layers is connected to each of the plurality of the memory cells. Each conducting layer has a structure where a first conductive film and a second conductive film are laminated in the laminating direction. The conducting layers adjacent to one another in the laminating direction have a laminating order of the first conductive film and the second conductive film different from one another.

公开(公告)号：US09548132B2

公开(公告)日：2017-01-17

申请号：US14742181

申请日：2015-06-17

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Yoshiaki Fukuzumi ,  Hideaki Aochi

IPC分类号： G11C19/08 ,  G11C13/00 ,  G11C11/14 ,  G11C19/02 ,  G11C19/00

CPC分类号： G11C19/085 ,  G11C11/14 ,  G11C11/161 ,  G11C11/1675 ,  G11C13/0016 ,  G11C19/005 ,  G11C19/02 ,  G11C19/0808 ,  G11C19/0875 ,  G11C2213/71

摘要： According to one embodiment, a shift register memory device includes a shift register, a program/read element, and a rotating force application unit. The shift register includes a plurality of rotors arranged along one direction and provided with a uniaxial anisotropy. Each of the plurality of rotors has a characteristic direction rotatable around a rotational axis extending in the one direction. The program/read element is configured to program data to the shift register by causing the characteristic direction of one of the rotors to match one selected from two directions conforming to the uniaxial anisotropy and configured to read the data by detecting the characteristic direction. The rotating force application unit is configured to apply a rotating force to the shift register to urge the characteristic direction to rotate. The plurality of rotors are organized into a plurality of pairs of every two mutually adjacent rotors. A first force acts to urge the characteristic directions to be opposingly parallel for two of the rotors belonging to the same pair. A second force acts to urge the characteristic directions to be opposingly parallel for two mutually adjacent rotors belonging to mutually adjacent pairs.

摘要翻译： 根据一个实施例，移位寄存器存储器件包括移位寄存器，程序/读取元件和旋转力施加单元。 移位寄存器包括沿着一个方向布置并具有单轴各向异性的多个转子。 所述多个转子中的每一个具有围绕沿所述一个方向延伸的旋转轴线可旋转的特征方向。 程序/读取元件被配置为通过使转子中的一个的特征方向与从单轴各向异性相一致的两个方向中选出的一个来匹配从而将数据编程到移位寄存器，并通过检测特征方向来读取数据。 旋转力施加单元构造成向移位寄存器施加旋转力以促使特征方向旋转。 多个转子被组织成每对两个彼此相邻的转子的多对。 第一力作用以促使属于同一对的两个转子的特征方向相对平行。 第二力作用以促使特征方向相对地平行于属于彼此相邻的对的两个相互相邻的转子。

公开(公告)号：US09520407B2

公开(公告)日：2016-12-13

申请号：US14614588

申请日：2015-02-05

申请人： Kabushiki Kaisha Toshiba

发明人： Yoshiaki Fukuzumi ,  Shinya Arai ,  Masaki Tsuji ,  Hideaki Aochi ,  Hiroyasu Tanaka

IPC分类号： H01L27/115 ,  H01L29/66 ,  H01L29/792

CPC分类号： H01L27/11582 ,  H01L27/11565 ,  H01L27/11575 ,  H01L29/42344 ,  H01L29/66833 ,  H01L29/7926

摘要： A semiconductor memory device includes a connecting member including a semiconductor material, a first electrode film, a first insulating film, a stacked body and three or more semiconductor pillars. The stacked body includes second electrode films and second insulating films that alternately stacked. The semiconductor pillars are arrayed along two or more directions, extend in a stacking direction, pierce through the stacked body and the first insulating film, and are connected to the connecting member. The device includes a third insulating film provided between the semiconductor pillars and the stacked body and between the connecting member and the first electrode film. A charge storage layer is provided at least between one of the second electrode films and the third insulating film.

摘要翻译： 一种半导体存储器件，包括：包括半导体材料，第一电极膜，第一绝缘膜，堆叠体和三个或更多个半导体柱的连接构件。 层叠体包括交替堆叠的第二电极膜和第二绝缘膜。 半导体柱沿着两个或更多个方向排列，沿层叠方向延伸，穿过层叠体和第一绝缘膜，并连接到连接构件。 该装置包括设置在半导体柱和层叠体之间以及连接构件和第一电极膜之间的第三绝缘膜。 至少在一个第二电极膜和第三绝缘膜之间设置电荷存储层。

公开(公告)号：US09450065B2

公开(公告)日：2016-09-20

申请号：US14495958

申请日：2014-09-25

申请人： Kabushiki Kaisha Toshiba

发明人： Shigeki Hattori ,  Reika Ichihara ,  Masaya Terai ,  Hideyuki Nishizawa ,  Tsukasa Tada ,  Koji Asakawa ,  Hiroyuki Fuke ,  Satoshi Mikoshiba ,  Yoshiaki Fukuzumi ,  Hideaki Aochi

IPC分类号： H01L21/338 ,  H01L29/51 ,  H01L27/115 ,  H01L51/05 ,  H01L21/28 ,  H01L21/02

CPC分类号： H01L29/513 ,  H01L21/02118 ,  H01L21/02227 ,  H01L21/28282 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582 ,  H01L51/0591

摘要： According to one embodiment, a nonvolatile semiconductor memory device includes a first stacked structure body, a first semiconductor layer, a first organic film, a first semiconductor-side insulating film, and a first electrode-side insulating film. The first stacked structure body includes a plurality of first electrode films stacked along a first direction and a first inter-electrode insulating film provided between the first electrode films. The first semiconductor layer is opposed to side faces of the first electrode films. The first organic film is provided between the side faces of the first electrode films and the first semiconductor layer and containing an organic compound. The first semiconductor-side insulating film is provided between the first organic film and the first semiconductor layer. The first electrode-side insulating film provided between the first organic film and the side faces of the first electrode films.

公开(公告)号：US09184212B2

公开(公告)日：2015-11-10

申请号：US14341059

申请日：2014-07-25

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Hirofumi Morise ,  Yoshiaki Fukuzumi ,  Shiho Nakamura ,  Tsuyoshi Kondo ,  Hideaki Aochi ,  Takuya Shimada

IPC分类号： G11C19/08 ,  H01L27/22 ,  G11C11/16 ,  H01L43/08

CPC分类号： H01L27/222 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  H01L43/08

摘要： A magnetic storage element according to an embodiment includes: a magnetic nanowire having a cross-sectional area varying in a first direction, the magnetic nanowire having at least two positions where the cross-sectional area is minimal; first and second electrode groups having the magnetic nanowire interposed in between, the magnetic nanowire including at least one of a first region where the first electrodes overlap the second electrodes with the magnetic nanowire interposed in between and a second region where neither the first electrodes nor the second electrodes exist with the magnetic nanowire interposed in between, the magnetic nanowire including at least one of a third region where the first electrodes exist and the second electrodes do not exist with the magnetic nanowire interposed in between and a fourth region where the first electrodes do not exist and the second electrodes exist with the magnetic nanowire interposed in between.

摘要翻译： 根据实施例的磁存储元件包括：具有在第一方向上变化的横截面积的磁性纳米线，所述磁性纳米线具有截面积最小的至少两个位置; 具有介于其间的磁性纳米线的第一和第二电极组，所述磁性纳米线包括第一电极与第二电极重叠的第一区域和介于其间的磁性纳米线的第一区域和第二区域中的至少一个， 存在介于其间的磁性纳米线的第二电极，磁纳米线包括存在第一电极的第三区域和不存在插入在其间的磁性纳米线的第二电极和第一电极的第四区域中的至少一个 不存在第二电极，并且介于其间的磁性纳米线存在。

公开(公告)号：US20150263036A1

公开(公告)日：2015-09-17

申请号：US14635246

申请日：2015-03-02

申请人： Kabushiki Kaisha Toshiba

发明人： Naoki YASUDA ,  Hideaki Aochi

IPC分类号： H01L27/115

CPC分类号： H01L27/11582

摘要： According to one embodiment, the columnar section includes a first region having a first diameter and a second region having a second diameter smaller than the first diameter. The plurality of electrode layers include a first electrode layer adjacent to the first region and a second electrode layer adjacent to the first region, and a third electrode layer adjacent to the second region and a fourth electrode layer adjacent to the second region. A distance between the third electrode layer and the fourth electrode layer is smaller than a distance between the first electrode layer and the second electrode layer.

摘要翻译： 根据一个实施例，柱状部分包括具有第一直径的第一区域和具有小于第一直径的第二直径的第二区域。 多个电极层包括与第一区域相邻的第一电极层和与第一区域相邻的第二电极层，以及与第二区域相邻的第三电极层和与第二区域相邻的第四电极层。 第三电极层和第四电极层之间的距离小于第一电极层和第二电极层之间的距离。

公开(公告)号：US09129860B2

公开(公告)日：2015-09-08

申请号：US14142138

申请日：2013-12-27

申请人： Kabushiki Kaisha Toshiba

发明人： Yoshiaki Fukuzumi ,  Hideaki Aochi

IPC分类号： H01L27/24 ,  H01L27/115 ,  G11C16/04

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L27/1157 ,  H01L27/2481

摘要： In this embodiment, a mask material is formed above a film to be processed, and a plurality of sacrifice films are formed above the mask material, each of the sacrifice films having a columnar shape. Then, a sidewall film is formed on a sidewall of the sacrifice films, and then the sacrifice films are removed. Thereafter, the sidewall films are caused to flow. In addition, a plurality of holes are formed in the mask material using the sidewall film as a mask. Then, isotropic etching is performed for the mask material to etch back the sidewall of the mask material with respect to a sidewall of the sidewall film by a first distance. Thereafter, a deposition layer is deposited inside the plurality of holes to close an opening of the plurality of holes with the deposition layer. Anisotropic etching is conducted to remove the deposition layer in the opening.

摘要翻译： 在本实施方式中，在被处理膜上形成掩模材料，在掩模材料的上方形成多个牺牲膜，每个牺牲膜具有柱状。 然后，在牺牲膜的侧壁上形成侧壁膜，然后除去牺牲膜。 此后，使侧壁膜流动。 此外，使用侧壁膜作为掩模，在掩模材料中形成多个孔。 然后，对掩模材料进行各向同性蚀刻，以相对于侧壁膜的侧壁蚀刻掩模材料的侧壁第一距离。 此后，在多个孔内沉积沉积层，以用沉积层封闭多个孔的开口。 进行各向异性蚀刻以去除开口中的沉积层。

公开(公告)号：US08878254B2

公开(公告)日：2014-11-04

申请号：US14064380

申请日：2013-10-28

申请人： Kabushiki Kaisha Toshiba

发明人： Yoshiaki Fukuzumi ,  Hideaki Aochi

IPC分类号： H01L27/10 ,  G11C16/04 ,  H01L27/24 ,  H01L23/525 ,  G11C13/00

CPC分类号： H01L27/2463 ,  G11C13/0007 ,  G11C16/04 ,  G11C2213/73 ,  H01L23/525 ,  H01L23/528 ,  H01L27/2436 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor memory device according to one embodiment of the present invention includes a dielectric film configured to store information depending on presence or absence of a conductive path therein, and a plurality of electrodes provided to contact a first surface of the dielectric film. The conductive path can be formed between two electrodes arbitrarily selected form the plurality of electrodes. The conductive path has a rectifying property of allowing a current to flow more easily in a first direction connecting arbitrary two electrodes than in a second direction opposite to the first direction. The largest possible number of the conductive paths that may be formed is larger than the number of the plurality of electrodes.

摘要翻译： 根据本发明的一个实施例的半导体存储器件包括：电介质膜，被配置为根据存在或不存在导电路径来存储信息;以及多个电极，设置成与电介质膜的第一表面接触。 导电路径可以形成在从多个电极任意选择的两个电极之间。 导电路径具有使电流在连接任意两个电极的第一方向上比在与第一方向相反的第二方向更容易流动的整流特性。 可能形成的最大可能数量的导电路径大于多个电极的数量。

公开(公告)号：US20140241030A1

公开(公告)日：2014-08-28

申请号：US13935763

申请日：2013-07-05

申请人： Kabushiki Kaisha Toshiba

发明人： Yoshiaki Fukuzumi ,  Hideaki Aochi ,  Hirofumi Morise

IPC分类号： G11C19/02

CPC分类号： G11C19/02 ,  G11C19/08

摘要： A shift register according to an embodiment includes: a magnetic nanowire; a first control electrode group and a second control electrode group arranged with the magnetic nanowire being sandwiched therebetween, the first control electrode group including a plurality of first control electrodes arranged to be spaced apart from each other along a direction in which the magnetic nanowire extends, the second control electrode group including a plurality of second control electrodes arranged to be spaced apart from each other to correspond to the plurality of first control electrodes along the direction in which the magnetic nanowire extends, and the second control electrodes corresponding to the first control electrodes being shifted in the direction in which the magnetic nanowire extends; a first driving unit for driving the first control electrode group; and a second driving unit for driving the second control electrode group.

摘要翻译： 根据实施例的移位寄存器包括：磁性纳米线; 所述第一控制电极组和所述磁性纳米线夹在其间的第二控制电极组，所述第一控制电极组包括沿着所述磁性纳米线延伸的方向彼此间隔开的多个第一控制电极， 所述第二控制电极组包括多个第二控制电极，所述多个第二控制电极被布置为沿着所述多个第一控制电极沿着所述磁性纳米线延伸的方向彼此间隔开，并且所述第二控制电极对应于所述第一控制电极 沿着磁性纳米线延伸的方向移动; 用于驱动第一控制电极组的第一驱动单元; 以及用于驱动第二控制电极组的第二驱动单元。