公开(公告)号：US08835048B2

公开(公告)日：2014-09-16

申请号：US13153503

申请日：2011-06-06

申请人： Kazutaka Kuriki ,  Kiyofumi Ogino ,  Tomokazu Yokoi ,  Makoto Ishikawa ,  Toshihiko Takeuchi

发明人： Kazutaka Kuriki ,  Kiyofumi Ogino ,  Tomokazu Yokoi ,  Makoto Ishikawa ,  Toshihiko Takeuchi

IPC分类号： H01M4/64 ,  H01G9/042 ,  H01M10/04 ,  H01M10/0525 ,  H01M4/66 ,  H01M4/134 ,  H01G11/26 ,  H01M4/02

CPC分类号： H01G11/26 ,  H01M4/134 ,  H01M4/661 ,  H01M4/667 ,  H01M10/0525 ,  H01M2004/025 ,  Y02E60/122 ,  Y02E60/13

摘要： An electrode for a power storage device with less deterioration due to charge and discharge and a power storage device using the electrode are provided. In the electrode for a power storage device and the power storage device, a region including a metal element which functions as a catalyst is selectively provided over a current collector, and then, an active material layer is formed. By selectively providing the region including the metal element, a whisker can be effectively generated in the active material layer over the current collector, and the whisker generation region can be controlled. Accordingly, the discharge capacity can be increased and the cycle characteristics can be improved.

摘要翻译： 提供了一种用于蓄电装置的放电劣化少的电极和使用该电极的蓄电装置。 在蓄电装置用电极和蓄电装置中，在集电体上选择性地设置作为催化剂的金属元素的区域，形成活性物质层。 通过选择性地提供包括金属元素的区域，可以在集电体上的有源材料层中有效地产生晶须，并且可以控制晶须产生区域。 因此，可以提高放电容量，并且可以提高循环特性。

公开(公告)号：US08476638B2

公开(公告)日：2013-07-02

申请号：US13550776

申请日：2012-07-17

申请人： Satoshi Toriumi ,  Ryota Tajima ,  Takashi Ohtsuki ,  Tetsuhiro Tanaka ,  Ryo Tokumaru ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo ,  Shunpei Yamazaki

发明人： Satoshi Toriumi ,  Ryota Tajima ,  Takashi Ohtsuki ,  Tetsuhiro Tanaka ,  Ryo Tokumaru ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo ,  Shunpei Yamazaki

IPC分类号： H01L29/04 ,  H01L31/036

CPC分类号： H01J37/32541 ,  C23C16/24 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/5096 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32834 ,  H01L21/0262 ,  H01L29/66765 ,  H01L29/78696

摘要： An object of the present invention is to provide a technique for manufacturing a dense crystalline semiconductor film without a cavity between crystal grains. A plasma region is formed between a first electrode and a second electrode by supplying high-frequency power of 60 MHz or less to the first electrode under a condition where a pressure of a reactive gas in a reaction chamber of a plasma CVD apparatus is set to 450 Pa to 13332 Pa, and a distance between the first electrode and the second electrode of the plasma CVD apparatus is set to 1 mm to 20 mm; crystalline deposition precursors are formed in a gas phase including the plasma region; a crystal nucleus of 5 nm to 15 nm is formed by depositing the deposition precursors; and a microcrystalline semiconductor film is formed by growing a crystal from the crystal nucleus.

摘要翻译： 本发明的目的是提供一种在晶粒之间没有空腔的致密结晶半导体膜的制造技术。 在等离子体CVD装置的反应室中的反应气体的压力设定为：将第一电极和第二电极的反应气体的压力设定为第一电极的状态下，向第一电极供给60MHz以下的高频电力，在第一电极和第二电极之间形成等离子体区域 450Pa〜13332Pa，等离子体CVD装置的第一电极和第二电极之间的距离设定为1mm〜20mm; 在包括等离子体区域的气相中形成结晶沉积前体; 通过沉积沉积前体形成5nm至15nm的晶核; 并且通过从晶核生长晶体形成微晶半导体膜。

公开(公告)号：US08486777B2

公开(公告)日：2013-07-16

申请号：US13343734

申请日：2012-01-05

申请人： Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo

发明人： Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo

IPC分类号： H01L21/205

CPC分类号： H01L21/02532 ,  C23C16/45565 ,  C23C16/505 ,  H01L21/02595 ,  H01L21/0262 ,  H01L27/1214 ,  H01L27/127 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate.

摘要翻译： 提供了一种以高质量生产率制造微晶半导体层的技术。 在等离子体CVD装置的反应室中，上部电极和下部电极彼此平行地设置。 在上部电极中形成中空部，上部电极具有形成在上部电极的与下部电极相对的面上形成的多个孔的喷淋板。 衬底设置在下电极上。 含有沉积气体和氢气的气体从淋浴板通过上部电极的中空部分供应到反应室，并且稀有气体从不同于上部电极的部分供应到反应室。 因此，向上部电极提供高频电力以产生等离子体，从而在基板上形成微晶半导体层。

公开(公告)号：US08344378B2

公开(公告)日：2013-01-01

申请号：US12820201

申请日：2010-06-22

申请人： Miyako Nakajima ,  Hidekazu Miyairi ,  Toshiyuki Isa ,  Erika Kato ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi

发明人： Miyako Nakajima ,  Hidekazu Miyairi ,  Toshiyuki Isa ,  Erika Kato ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L31/062 ,  H01L31/113 ,  H01L31/0376

CPC分类号： H01L29/6675 ,  H01L29/04 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/78696

摘要： An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility. A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current.

公开(公告)号：US20120304932A1

公开(公告)日：2012-12-06

申请号：US13550776

申请日：2012-07-17

申请人： Satoshi Toriumi ,  Ryota Tajima ,  Takashi Ohtsuki ,  Tetsuhiro Tanaka ,  Ryo Tokumaru ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo ,  Shunpei Yamazaki

发明人： Satoshi Toriumi ,  Ryota Tajima ,  Takashi Ohtsuki ,  Tetsuhiro Tanaka ,  Ryo Tokumaru ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo ,  Shunpei Yamazaki

IPC分类号： C23C16/448

CPC分类号： H01J37/32541 ,  C23C16/24 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/5096 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32834 ,  H01L21/0262 ,  H01L29/66765 ,  H01L29/78696

摘要： An object of the present invention is to provide a technique for manufacturing a dense crystalline semiconductor film without a cavity between crystal grains. A plasma region is formed between a first electrode and a second electrode by supplying high-frequency power of 60 MHz or less to the first electrode under a condition where a pressure of a reactive gas in a reaction chamber of a plasma CVD apparatus is set to 450 Pa to 13332 Pa, and a distance between the first electrode and the second electrode of the plasma CVD apparatus is set to 1 mm to 20 mm; crystalline deposition precursors are formed in a gas phase including the plasma region; a crystal nucleus of 5 nm to 15 nm is formed by depositing the deposition precursors; and a microcrystalline semiconductor film is formed by growing a crystal from the crystal nucleus.

摘要翻译： 本发明的目的是提供一种在晶粒之间没有空腔的致密结晶半导体膜的制造技术。 在等离子体CVD装置的反应室中的反应气体的压力设定为：将第一电极和第二电极的反应气体的压力设定为第一电极的状态下，向第一电极供给60MHz以下的高频电力，在第一电极与第二电极之间形成等离子体区域 450Pa〜13332Pa，等离子体CVD装置的第一电极和第二电极之间的距离设定为1mm〜20mm; 在包括等离子体区域的气相中形成结晶沉积前体; 通过沉积沉积前体形成5nm至15nm的晶核; 并且通过从晶核生长晶体形成微晶半导体膜。

公开(公告)号：US08252669B2

公开(公告)日：2012-08-28

申请号：US12860175

申请日：2010-08-20

申请人： Satoshi Toriumi ,  Ryota Tajima ,  Takashi Ohtsuki ,  Tetsuhiro Tanaka ,  Ryo Tokumaru ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo ,  Shunpei Yamazaki

发明人： Satoshi Toriumi ,  Ryota Tajima ,  Takashi Ohtsuki ,  Tetsuhiro Tanaka ,  Ryo Tokumaru ,  Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo ,  Shunpei Yamazaki

IPC分类号： H01L21/20 ,  H01L21/36

CPC分类号： H01J37/32541 ,  C23C16/24 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/5096 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32834 ,  H01L21/0262 ,  H01L29/66765 ,  H01L29/78696

摘要： An object of one embodiment of the present invention is to provide a technique for manufacturing a dense crystalline semiconductor film (e.g., a microcrystalline semiconductor film) without a cavity between crystal grains. A plasma region is formed between a first electrode and a second electrode by supplying high-frequency power of 60 MHz or less to the first electrode under a condition where a pressure of a reactive gas in a reaction chamber of a plasma CVD apparatus is set to 450 Pa to 13332 Pa, and a distance between the first electrode and the second electrode of the plasma CVD apparatus is set to 1 mm to 20 mm; crystalline deposition precursors are formed in a gas phase including the plasma region; a crystal nucleus of 5 nm to 15 nm is formed by depositing the deposition precursors; and a microcrystalline semiconductor film is formed by growing a crystal from the crystal nucleus.

摘要翻译： 本发明的一个实施例的目的是提供一种在晶粒之间没有空腔的致密结晶半导体膜（例如，微晶半导体膜）的制造技术。 在等离子体CVD装置的反应室中的反应气体的压力设定为：将第一电极和第二电极的反应气体的压力设定为第一电极的状态下，向第一电极供给60MHz以下的高频电力，在第一电极与第二电极之间形成等离子体区域 450Pa〜13332Pa，等离子体CVD装置的第一电极和第二电极之间的距离设定为1mm〜20mm; 在包括等离子体区域的气相中形成结晶沉积前体; 通过沉积沉积前体形成5nm至15nm的晶核; 并且通过从晶核生长晶体形成微晶半导体膜。

公开(公告)号：US08114760B2

公开(公告)日：2012-02-14

申请号：US12908228

申请日：2010-10-20

申请人： Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo

发明人： Mitsuhiro Ichijo ,  Kazutaka Kuriki ,  Tomokazu Yokoi ,  Toshiya Endo

IPC分类号： H01L21/00

CPC分类号： H01L21/02532 ,  C23C16/45565 ,  C23C16/505 ,  H01L21/02595 ,  H01L21/0262 ,  H01L27/1214 ,  H01L27/127 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

摘要： A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate.

摘要翻译： 提供了一种以高质量生产率制造微晶半导体层的技术。 在等离子体CVD装置的反应室中，上部电极和下部电极彼此平行地设置。 在上部电极中形成中空部，上部电极具有形成在上部电极的与下部电极相对的面上形成的多个孔的喷淋板。 衬底设置在下电极上。 含有沉积气体和氢气的气体从淋浴板通过上部电极的中空部分供应到反应室，并且稀有气体从不同于上部电极的部分供应到反应室。 因此，向上部电极提供高频电力以产生等离子体，从而在基板上形成微晶半导体层。

公开(公告)号：US08969866B2

公开(公告)日：2015-03-03

申请号：US13173484

申请日：2011-06-30

申请人： Tomokazu Yokoi ,  Kensuke Yoshizumi

发明人： Tomokazu Yokoi ,  Kensuke Yoshizumi

IPC分类号： H01L29/06 ,  H01L29/45 ,  H01L21/285 ,  H01L21/768 ,  H01L29/78 ,  H01L29/786

CPC分类号： H01L29/45 ,  H01L21/28525 ,  H01L21/76879 ,  H01L29/458 ,  H01L29/78 ,  H01L29/7869 ,  H01L2221/1094

摘要： Provided is a structure to obtain a reliable electrical contact through a narrow contact hole formed in an insulating layer, which is required in the miniaturization of a semiconductor device. An exemplified structure includes a thin film transistor comprising: a lower electrode over and in contact with a semiconductor layer, the lower electrode comprising a metal or a metal compound; an insulating layer over the lower electrode, the insulating layer having a contact hole reaching the lower electrode; a conductive silicon whisker grown from a surface of the lower electrode; and an upper electrode over the insulating layer and in contact with the conductive silicon whisker. The ability of the conductive silicon whisker grown from the lower electrode to ohmically contact with the lower and upper electrodes leads to a reliable electrical contact between the thin film transistor and a wiring.

摘要翻译： 提供了通过形成在半导体器件的小型化所需的绝缘层中的窄接触孔获得可靠的电接触的结构。 示例性结构包括薄膜晶体管，其包括：在半导体层上方并与其接触的下电极，所述下电极包括金属或金属化合物; 在所述下电极上的绝缘层，所述绝缘层具有到达所述下电极的接触孔; 从下电极的表面生长的导电硅晶须; 以及在绝缘层上方并与导电硅晶须接触的上电极。 从下电极生长的导电硅晶须与下电极和上电极欧姆接触的能力导致薄膜晶体管和布线之间的可靠的电接触。

公开(公告)号：US08785766B2

公开(公告)日：2014-07-22

申请号：US13161669

申请日：2011-06-16

申请人： Yoshinobu Asami ,  Tomokazu Yokoi

发明人： Yoshinobu Asami ,  Tomokazu Yokoi

IPC分类号： H01L31/06

CPC分类号： B82Y20/00 ,  B82Y10/00 ,  H01L21/02422 ,  H01L21/0245 ,  H01L21/02488 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/0262 ,  H01L31/035218 ,  H01L31/035236 ,  H01L31/0384 ,  H01L31/075 ,  H01L31/18 ,  Y02E10/52 ,  Y02E10/548

摘要： A novel photoelectric conversion device in which energy of light can be effectively utilized and performance can be improved is provided. A photoelectric conversion device includes a photoelectric conversion element and an energy conversion layer provided on a light-receiving side of a photoelectric conversion layer included in the photoelectric conversion element. The energy conversion layer includes a plurality of first layers and a plurality of second layers. The first layer and the second layer are alternately stacked. The thickness of the first layer is greater than or equal to 0.5 nm and less than or equal to 10 nm, and the thickness of the second layer is greater than or equal to 0.5 nm and less than or equal to 10 nm. The second layer can be formed using a material having a larger energy band gap than that of a material used for the first layer.

摘要翻译： 提供了能够有效利用光的能量并提高性能的新颖的光电转换装置。 光电转换装置包括光电转换元件和设置在包含在光电转换元件中的光电转换层的光接收侧的能量转换层。 能量转换层包括多个第一层和多个第二层。 第一层和第二层交替堆叠。 第一层的厚度大于或等于0.5nm且小于或等于10nm，第二层的厚度大于或等于0.5nm且小于或等于10nm。 可以使用具有比用于第一层的材料更大的能带隙的材料形成第二层。

公开(公告)号：US20120135302A1

公开(公告)日：2012-05-31

申请号：US13301020

申请日：2011-11-21

申请人： Tomokazu Yokoi ,  Takayuki Inoue ,  Makoto Furuno

发明人： Tomokazu Yokoi ,  Takayuki Inoue ,  Makoto Furuno

IPC分类号： H01M4/13 ,  H01L21/28 ,  H01M4/02 ,  H01L29/02

CPC分类号： H01L29/12 ,  H01M4/0428 ,  H01M4/134 ,  H01M4/366 ,  H01M4/386

摘要： Provided are a semiconductor film including silicon microstructures formed at high density, and a manufacturing method thereof. Further, provided are a semiconductor film including silicon microstructures whose density is controlled, and a manufacturing method thereof Furthermore, a power storage device with improved charge-discharge capacity is provided. A manufacturing method in which a semiconductor film with a silicon layer including silicon structures is formed over a substrate with a metal surface is used. The thickness of a silicide layer formed by reaction between the metal and the silicon is controlled, so that the grain sizes of silicide grains formed at an interface between the silicide layer and the silicon layer are controlled and the shapes of the silicon structures are controlled. Such a semiconductor film can be applied to an electrode of a power storage device.

摘要翻译： 提供了包括以高密度形成的硅微结构的半导体膜及其制造方法。 此外，提供了包括其密度被控制的硅微结构的半导体膜及其制造方法。此外，提供了具有改善的充放电容量的蓄电装置。 使用其中在具有金属表面的基板上形成具有包括硅结构的硅层的半导体膜的制造方法。 控制由金属与硅之间的反应形成的硅化物层的厚度，从而控制在硅化物层和硅层之间的界面处形成的硅化物晶粒的晶粒尺寸，并且控制硅结构的形状。 这样的半导体膜可以应用于蓄电装置的电极。