公开(公告)号：US5371380A

公开(公告)日：1994-12-06

申请号：US188731

申请日：1994-01-31

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Mitsuyuki Niwa ,  Toshimitsu Kariya ,  Yuzo Koda

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Mitsuyuki Niwa ,  Toshimitsu Kariya ,  Yuzo Koda

IPC分类号： H01L21/205 ,  H01L29/16 ,  H01L29/26 ,  H01L45/00

CPC分类号： H01L29/1604 ,  H01L21/02422 ,  H01L21/02425 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/263

摘要： A non-single crystalline semiconductor containing at least one kind of atoms selected from the group consisting of silicon atoms (Si) and germanium atoms (Ge) as a matrix, and at least one kind of atoms selected from the group consisting of hydrogen atoms (H) and halogen atoms (X), wherein said non-single crystalline semiconductor has an average radius of 3.5 .ANG. or less and a density of 1.times.10.sup.19 (cm.sup.-3) or less as for microvoids contained therein. The non-single crystalline semiconductor excels in semiconductor characteristics and adhesion with other materials and are effectively usable as a constituent element of various semiconductor devices.

摘要翻译： 含有选自硅原子（Si）和锗原子（Ge）作为基体的至少一种原子的非单晶半导体，以及选自氢原子中的至少一种原子（ H）和卤素原子（X），其中所述非单晶半导体的平均半径为3.5AANG或更小，密度为1×1019（cm-3）或更小，对于其中包含的微孔。 非单晶半导体具有优异的半导体特性和与其他材料的粘合性，并且可以有效地用作各种半导体器件的组成元件。

公开(公告)号：US5418680A

公开(公告)日：1995-05-23

申请号：US155655

申请日：1993-11-22

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Mitsuyuki Niwa ,  Toshimitsu Kariya ,  Yuzo Koda

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Mitsuyuki Niwa ,  Toshimitsu Kariya ,  Yuzo Koda

IPC分类号： H01L21/28 ,  H01L31/0224 ,  H01L31/0392 ,  H01L31/20 ,  H05F7/00

CPC分类号： H01L31/208 ,  H01L21/28 ,  H01L31/022466 ,  H01L31/03921 ,  Y02E10/50 ,  Y02P70/521 ,  Y10S136/29

摘要： An apparatus for repairing a defective semiconductor device having an electrically short-circuited portion, wherein the semiconductor device includes a semiconductor thin film and a conductive thin film disposed in the named order on a conductive surface of a substrate and in which the conductive thin film and the conductive surface of the substrate are electrically short-circuited at a pinhole occurring in the semiconductor thin film to form an electrically short-circuited portion so that the semiconductor device is defective. The apparatus includes a substrate holding unit for holding the substrate of the defective semiconductor device and an electrode arranged above the substrate holding unit so that, when the defective semiconductor is positioned on the substrate holding unit, there is a predetermined distance between the electrode and the conductive thin film of the defective semiconductor device, the electrode being capable of moving in relation to the substrate of the defective semiconductor device. The apparatus further includes a voltage applying unit for applying a desired voltage to the electrode, wherein discharge is caused between the electrode and the conductive thin film of the defective semiconductor device by applying a desired voltage to the electrode through the voltage applying means to thereby modify a region of the conductive thin film of the defective semiconductor device in electrical contact with the conductive surface of the substrate of the defective semiconductor device.

摘要翻译： 一种用于修复具有电短路部分的有缺陷的半导体器件的装置，其中所述半导体器件包括半导体薄膜和导电薄膜，所述半导体薄膜和导电薄膜按照所述顺序设置在衬底的导电表面上，并且其中导电薄膜和 衬底的导电表面在发生在半导体薄膜中的针孔处电短路以形成电短路部分，使得半导体器件有缺陷。 该装置包括用于保持有缺陷的半导体器件的衬底的衬底保持单元和布置在衬底保持单元上方的电极，使得当缺陷半导体位于衬底保持单元上时，电极和 有缺陷的半导体器件的导电薄膜，电极能够相对于有缺陷的半导体器件的衬底移动。 该装置还包括用于向电极施加期望电压的电压施加单元，其中通过施加期望的电压通过电压施加装置在电极和缺陷半导体器件的导电薄膜之间引起放电，从而修改 所述有缺陷的半导体器件的导电薄膜的区域与有缺陷的半导体器件的衬底的导电表面电接触。

公开(公告)号：US5281541A

公开(公告)日：1994-01-25

申请号：US755439

申请日：1991-09-05

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Mitsuyuki Niwa ,  Toshimitsu Kariya ,  Yuzo Koda

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Mitsuyuki Niwa ,  Toshimitsu Kariya ,  Yuzo Koda

IPC分类号： H01L21/28 ,  H01L31/0224 ,  H01L31/0392 ,  H01L31/20 ,  H01L21/306

CPC分类号： H01L31/208 ,  H01L21/28 ,  H01L31/022466 ,  H01L31/03921 ,  Y02E10/50 ,  Y02P70/521 ,  Y10S136/29

摘要： A method for repairing a defective semiconductor device, the defective semiconductor device including a semiconductor thin film and a conductive thin film, disposed in the named order, on a conductive surface of a substrate, such that the conductive thin film and the conductive surface of the substrate are electrically short-circuited at a pinhole occurring in the semiconductor thin film to form an electrically short-circuited portion. The method includes the steps of applying desired a voltage through an electrode positioned above a surface of the defective semiconductor device, and moving the electrode along the surface of the defective semiconductor device while maintaining a distance between the electrode and the conductive thin film sufficient to allow a discharge to occur when the electrode is above the electrically short-circuited portion, such that the discharge modifies a region of the conductive thin film which is in electrical contact with the conductive surface of the substrate, to establish an electrically noncontacted state between the conductive thin film and the conductive surface of the substrate.

摘要翻译： 一种用于修复有缺陷的半导体器件的方法，所述有缺陷的半导体器件包括半导体薄膜和导电薄膜，其以所述的顺序设置在衬底的导电表面上，使得导电薄膜和导电薄膜的导电表面 衬底在半导体薄膜中出现的针孔处电短路以形成电短路部分。 该方法包括以下步骤：通过位于缺陷半导体器件的表面上方的电极施加所需的电压，并且沿着有缺陷的半导体器件的表面移动电极，同时保持电极和导电薄膜之间的距离足以允许 当电极在电气短路部分之上时，发生放电，使得放电改变与衬底的导电表面电接触的导电薄膜的区域，以在导电之间建立电非接触状态 薄膜和基板的导电表面。

公开(公告)号：US5510631A

公开(公告)日：1996-04-23

申请号：US289258

申请日：1994-08-11

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Toshimitsu Kariya ,  Yuzo Koda

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Toshimitsu Kariya ,  Yuzo Koda

IPC分类号： H01L21/205 ,  H01L29/78 ,  H01L29/786 ,  H01L31/04 ,  H01L31/08 ,  H01L31/10 ,  H01L31/20 ,  H01L31/0312 ,  H01L29/76 ,  H01L31/06

CPC分类号： H01L31/204 ,  Y02E10/50 ,  Y02P70/521 ,  Y10S438/931

摘要： A non-monocrystalline silicon carbide semiconductor comprises carbon atoms, silicon atoms, and at least one of hydrogen atoms and halogen atoms, the non-monocrystalline silicon carbide semiconductor having therein microvoids with an average radius of not more than 3.5 .ANG. at a microvoid density of not more than 1.times.10.sup.19 cm.sup.-3.

摘要翻译： 非单晶碳化硅半导体包含碳原子，硅原子和氢原子和卤素原子中的至少一个，非单晶碳化硅半导体具有微孔密度为平均半径不超过3.5的微孔 不超过1×1019 cm-3。

公开(公告)号：US5362684A

公开(公告)日：1994-11-08

申请号：US840537

申请日：1992-02-25

申请人： Keishi Saito ,  Tatsuyuki Aoike ,  Toshimitsu Kariya ,  Yuzo Koda

发明人： Keishi Saito ,  Tatsuyuki Aoike ,  Toshimitsu Kariya ,  Yuzo Koda

IPC分类号： H01L21/205 ,  H01L29/78 ,  H01L29/786 ,  H01L31/04 ,  H01L31/08 ,  H01L31/10 ,  H01L31/20

CPC分类号： H01L31/204 ,  Y02E10/50 ,  Y02P70/521 ,  Y10S438/931

摘要： A non-monocrystalline silicon carbide semiconductor comprises carbon atoms, silicon atoms, and at least one of hydrogen atoms and halogen atoms, the non-monocrystalline silicon carbide semiconductor having therein microvoids with an average radius of not more than 3.5.ANG. at a microvoid density of not more than 1.times.10.sup.19 cm.sup.-3.

摘要翻译： 非单晶碳化硅半导体包含碳原子，硅原子和氢原子和卤素原子中的至少一个，非单晶碳化硅半导体具有微孔密度为平均半径不超过3.5的微孔 不超过1×1019 cm-3。

公开(公告)号：US5439533A

公开(公告)日：1995-08-08

申请号：US337195

申请日：1994-11-07

申请人： Keishi Saito ,  Jinsho Matsuyama ,  Toshimitsu Kariya ,  Koichi Matsuda ,  Yuzo Koda ,  Naoto Okada

发明人： Keishi Saito ,  Jinsho Matsuyama ,  Toshimitsu Kariya ,  Koichi Matsuda ,  Yuzo Koda ,  Naoto Okada

IPC分类号： H01L31/04 ,  H01L31/0392 ,  H01L31/075 ,  H01L31/076 ,  H01L31/20 ,  H01L31/18

CPC分类号： H01L31/03921 ,  H01L31/075 ,  H01L31/076 ,  H01L31/202 ,  H01L31/204 ,  Y02E10/548 ,  Y02P70/521 ,  Y10S136/293

摘要： An object of the present invention is to provide a photovoltaic device and a method of producing the photovoltaic device which can prevent recombination of photo-excited carriers and which permits increases in the open circuit voltage and the carrier range. The photovoltaic device of the present invention has a laminate structure composed of at least a p-type layer of a silicon non-single crystal semiconductor, a photoactive layer having a plurality of i-type layers, and an n-type layer. The photoactive layer has a laminate structure composed of a first i-type layer deposited on the side of the n-type layer by a microwave plasma CVD process, and a second i-type layer deposited on the side of said the p-type layer by an RF plasma CVD process. The first i-type layer deposited by the microwave plasma CVD process contains at least silicon and carbon atoms, and has a minimum band gap between the center thereof and the p-type layer, and the second i-type layer deposited by the RF plasma CVD process contains at least silicon atoms and has a thickness of 30 nm or less.

摘要翻译： 本发明的目的是提供一种能够防止光激发载流子复合并且允许开路电压和载流子范围增加的光电器件及其制造方法。 本发明的光电器件具有至少由非硅单晶半导体的p型层，具有多个i型层的光活性层和n型层构成的层叠结构。 光敏层具有由微波等离子体CVD工艺在n型层侧沉积的第一i型层和沉积在所述p型层侧的第二i型层构成的层叠结构 通过RF等离子体CVD工艺。 通过微波等离子体CVD法沉积的第一i型层至少包含硅和碳原子，并且在其中心和p型层之间具有最小的带隙，并且由RF等离子体沉积的第二i型层 CVD工艺至少含有硅原子，其厚度为30nm以下。

公开(公告)号：US07211708B2

公开(公告)日：2007-05-01

申请号：US09822191

申请日：2001-04-02

申请人： Takeshi Shishido ,  Shotaro Okabe ,  Masahiro Kanai ,  Yuzo Koda ,  Yasuyoshi Takai ,  Tadashi Hori ,  Koichiro Moriyama ,  Hidetoshi Tsuzuki ,  Hiroyuki Ozaki

发明人： Takeshi Shishido ,  Shotaro Okabe ,  Masahiro Kanai ,  Yuzo Koda ,  Yasuyoshi Takai ,  Tadashi Hori ,  Koichiro Moriyama ,  Hidetoshi Tsuzuki ,  Hiroyuki Ozaki

IPC分类号： A62D3/00 ,  B08B15/00 ,  B08B5/00 ,  H05H1/03 ,  H05H1/16 ,  H05H1/48

CPC分类号： H01J37/32844 ,  C23C14/564 ,  C23C16/4412 ,  Y02C20/30 ,  Y02P70/605

摘要： A chemical-reaction inducing means is provided in an exhaust line connecting a processing space for subjecting a substrate or a film to plasma processing to an exhaust means, and at least either an unreacted gas or byproduct exhausted from the processing space are caused to chemically react without allowing plasma in the processing space to reach the chemical-reaction inducing means, thereby improving the processing ability of the chemical-reaction inducing means to process the unreacted gas or byproduct.

摘要翻译： 化学反应诱发装置设置在连接用于对衬底或膜进行等离子体处理的处理空间到排气装置的排气管线中，并且至少从处理空间排出的未反应气体或副产物发生化学反应 不允许处理空间中的等离子体到达化学反应诱导装置，从而提高化学反应诱导装置处理未反应气体或副产物的处理能力。

公开(公告)号：US5769963A

公开(公告)日：1998-06-23

申请号：US697783

申请日：1996-08-30

申请人： Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Akira Sakai ,  Yuzo Koda ,  Tadashi Hori ,  Tomonori Nishimoto ,  Takahiro Yajima

发明人： Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Akira Sakai ,  Yuzo Koda ,  Tadashi Hori ,  Tomonori Nishimoto ,  Takahiro Yajima

IPC分类号： H01L31/0368 ,  H01L31/075 ,  H01L31/20 ,  H01L31/0352

CPC分类号： H01L31/076 ,  H01L31/03682 ,  H01L31/075 ,  H01L31/206 ,  Y02E10/546 ,  Y02E10/548 ,  Y02P70/521

摘要： A photovoltaic device comprises a semiconductor region having at least one set of semiconductor layers comprised of a first semiconductor layer having a first conductivity type, an intrinsic or substantially intrinsic second semiconductor layer, and a third semiconductor layer having a conductivity type opposite to that of the first conductivity type, the layers being formed in this order, and first and second electrodes provided such that the electrodes interpose the semiconductor region; wherein the density of a dopant impurity determining the conductivity type of the first semiconductor layer in a set of semiconductor layers which is in contact with the first electrode is varied so as to be lower on the side of the first electrode, or the grain size of crystals in the first semiconductor layer is varied so as to be smaller on the side of the first electrode. This provides a photovoltaic device that does not exhibit great lowering of characteristics even when short circuits locally occur in the semiconductor layers during long-term service.

摘要翻译： 一种光电器件包括具有至少一组半导体层的半导体区域，该组半导体层由具有第一导电类型的第一半导体层，本征的或基本上本征的第二半导体层组成，以及具有与第 第一导电类型，这些层依次形成，第一和第二电极设置成使得电极插入半导体区域; 其中确定与第一电极接触的一组半导体层中的第一半导体层的导电类型的掺杂剂杂质的密度在第一电极的侧面变化，或者在第一电极的一侧的晶粒尺寸 第一半导体层中的晶体在第一电极侧变化较小。 这提供了即使在长期服务期间在半导体层中局部出现短路的情况下也不会出现特性的降低的光电器件。

公开(公告)号：US06653165B2

公开(公告)日：2003-11-25

申请号：US10058322

申请日：2002-01-30

申请人： Takaharu Kondo ,  Masafumi Sano ,  Akira Sakai ,  Koichi Matsuda ,  Yuzo Koda ,  Tadashi Hori

发明人： Takaharu Kondo ,  Masafumi Sano ,  Akira Sakai ,  Koichi Matsuda ,  Yuzo Koda ,  Tadashi Hori

IPC分类号： H01L2100

CPC分类号： H01L31/202 ,  H01L31/056 ,  H01L31/076 ,  H01L31/1884 ,  H01L31/206 ,  Y02E10/52 ,  Y02E10/548 ,  Y02P70/521

摘要： For efficiently forming a semiconductor element with excellent adhesion and environment resistance, a semiconductor element forming method is configured to have a step of forming a plurality of pin junctions of a silicon-based material on a substrate by a high-frequency plasma CVD process under a pressure of not more than atmospheric pressure, and the method further has a step of forming a p-layer, an i-layer, and a portion of an n-layer of a first pin junction of the pin junctions or forming an n-layer, an i-layer, and a portion of a p-layer of a first pin junction of the pin junctions, and thereafter exposing the p-layer or the n-layer exposed in the surface, to an oxygen-containing atmosphere; a step of forming on the p-layer or the n-layer as exposed to the oxygen-containing atmosphere a layer of the same conductivity type as that of the p-layer or the n-layer; and a step of forming an n-layer or a p-layer of a second pin junction adjacent to the first pin junction to form a pn interface.

公开(公告)号：US06472296B2

公开(公告)日：2002-10-29

申请号：US09912343

申请日：2001-07-26

申请人： Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Akira Sakai ,  Tadashi Sawayama ,  Yuzo Koda ,  Takahiro Yajima

发明人： Yasushi Fujioka ,  Shotaro Okabe ,  Masahiro Kanai ,  Akira Sakai ,  Tadashi Sawayama ,  Yuzo Koda ,  Takahiro Yajima

IPC分类号： H01L2120

CPC分类号： C23C16/509 ,  H01J37/32082 ,  H01J37/32706 ,  H01L21/02425 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02661 ,  H01L31/1824 ,  H01L31/202 ,  H01L31/204 ,  H01L31/206 ,  Y02E10/545 ,  Y02P70/521

摘要： A process for producing a semiconductor layer by introducing a raw gas into a discharge chamber and supplying high-frequency power to the chamber to decompose the raw gas by discharge, thereby forming a semiconductor layer on a substrate within the discharge chamber, the process comprising the steps of supplying high-frequency power of at least very high frequency (VHF) as the high-frequency power; supplying bias power of direct current power and/or high-frequency power of radio-frequency (RF) together with the high-frequency power of VHF to the discharge chamber; and controlling a direct current component of an electric current flowing into an electrode, to which the bias power is supplied, so as to fall within a range of from 0.1 A/m2 to 10 A/m2 in terms of a current density based on the area of an inner wall of the discharge chamber. A good-quality semiconductor layer can be deposited over a large area at a high speed.

摘要翻译： 一种制造半导体层的方法，该方法是通过将原料气体引入放电室并向室内供给高频电力，以通过放电来分解原料气体，由此在放电室内的基板上形成半导体层，该方法包括 提供至少非常高频（VHF）的高频功率作为高频功率的步骤; 将直流电力和/或射频（RF）的高频功率与VHF的高频功率一起提供给放电室; 并且以电流密度为基础控制流入施加偏压功率的电极的电流的直流分量，以0.1A / m 2至10A / m 2的范围内 放电室内壁面积。 高质量的半导体层可以在大面积上高速沉积。