公开(公告)号：US20150294705A1

公开(公告)日：2015-10-15

申请号：US14563690

申请日：2014-12-08

申请人： Ji-Wang LEE ,  Dong-Keun KIM ,  Masahiro TAKAHASHI ,  Tsuneo INABA

发明人： Ji-Wang LEE ,  Dong-Keun KIM ,  Masahiro TAKAHASHI ,  Tsuneo INABA

IPC分类号： G11C11/16 ,  G11C13/00

CPC分类号： G11C11/1673 ,  G11C11/15 ,  G11C11/16 ,  G11C11/1659 ,  G11C11/5607 ,  G11C11/5657 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C16/28 ,  G11C2013/0054 ,  G11C2213/79

摘要： A semiconductor memory unit includes first to Nth variable resistance elements each having different resistance values according to values stored therein, wherein N is a natural number equal to or greater than 2; a reference resistance element having a first reference resistance value; and first to Nth comparison units which correspond to the first to Nth variable resistance elements, respectively, and each of which determines whether a resistance value of the corresponding variable resistance element is greater or less than a second reference resistance value, wherein the first to Nth comparison units are commonly coupled to the reference resistance element.

摘要翻译： 半导体存储单元包括根据存储在其中的值具有不同电阻值的第一至第N可变电阻元件，其中N是等于或大于2的自然数; 具有第一参考电阻值的参考电阻元件; 以及分别对应于第一至第N可变电阻元件的第一至第N比较单元，并且每个比较单元确定相应的可变电阻元件的电阻值是否大于或小于第二参考电阻值，其中第一至第N 比较单元通常耦合到参考电阻元件。

公开(公告)号：US20150055396A1

公开(公告)日：2015-02-26

申请号：US14201664

申请日：2014-03-07

申请人： Masahiro TAKAHASHI

发明人： Masahiro TAKAHASHI

IPC分类号： G11C13/00

CPC分类号： G11C13/0021 ,  G11C5/147 ,  G11C5/148 ,  G11C7/00 ,  G11C7/06 ,  G11C7/14 ,  G11C11/16 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  G11C11/1697 ,  G11C11/5678 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0038 ,  G11C13/004 ,  G11C13/0069 ,  G11C16/28 ,  G11C29/021 ,  G11C2013/0054

摘要： According to one embodiment, a resistance change memory includes a first memory cell, a word line, a first bit line, first and second inverters, first to sixth MOS transistors, and a control circuit. The first transistor is connected to the first output terminal of the first inverter. The second transistor is connected to the second output terminal of the second inverter. The fifth transistor has a first current path whose one end is connected to the first voltage terminal of the first inverter. The sixth transistor has a second current path whose one end is connected to the third voltage terminal of the second inverter. The control circuit makes the first and second transistors a cutoff state by a first signal and makes the fifth and sixth transistors the cutoff state by a second signal in a standby state.

摘要翻译： 根据一个实施例，电阻变化存储器包括第一存储单元，字线，第一位线，第一和第二反相器，第一至第六MOS晶体管和控制电路。 第一晶体管连接到第一反相器的第一输出端。 第二晶体管连接到第二反相器的第二输出端。 第五晶体管具有第一电流路径，其一端连接到第一反相器的第一电压端子。 第六晶体管具有第二电流路径，其一端连接到第二反相器的第三电压端子。 控制电路通过第一信号使第一和第二晶体管成为截止状态，并且在待机状态下通过第二信号使第五和第六晶体管成为截止状态。

公开(公告)号：US20120138922A1

公开(公告)日：2012-06-07

申请号：US13307398

申请日：2011-11-30

申请人： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Hiroki OHARA ,  Tatsuya HONDA ,  Takatsugu OMATA ,  Yusuke NONAKA ,  Masahiro TAKAHASHI ,  Akiharu MIYANAGA

发明人： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Hiroki OHARA ,  Tatsuya HONDA ,  Takatsugu OMATA ,  Yusuke NONAKA ,  Masahiro TAKAHASHI ,  Akiharu MIYANAGA

IPC分类号： H01L29/12

CPC分类号： H01L29/78696 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

摘要： An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.

摘要翻译： 提供了具有更稳定的导电性的氧化物半导体膜。 此外，通过使用氧化物半导体膜提供具有稳定的电特性和高可靠性的半导体器件。 氧化物半导体膜包括结晶区域，并且结晶区域包括其中a-b平面基本上平行于膜的表面并且c轴基本上垂直于膜的表面的晶体; 氧化物半导体膜具有稳定的导电性，并且相对于可见光，紫外线等的照射而言更加电稳定。 通过使用这种用于晶体管的氧化物半导体膜，可以提供具有稳定电特性的高可靠性半导体器件。

公开(公告)号：US20110121289A1

公开(公告)日：2011-05-26

申请号：US12950186

申请日：2010-11-19

申请人： Akiharu MIYANAGA ,  Junichiro SAKATA ,  Masayuki SAKAKURA ,  Masahiro TAKAHASHI ,  Hideyuki KISHIDA ,  Shunpei YAMAZAKI

发明人： Akiharu MIYANAGA ,  Junichiro SAKATA ,  Masayuki SAKAKURA ,  Masahiro TAKAHASHI ,  Hideyuki KISHIDA ,  Shunpei YAMAZAKI

IPC分类号： H01L29/786

CPC分类号： H01L29/7869 ,  H01L29/10 ,  H01L29/41733

摘要： A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.

摘要翻译： 提供了包括具有良好电特性的氧化物半导体的薄膜晶体管。 薄膜晶体管包括设置在基板上的栅极电极，设置在栅极上的栅极绝缘膜，设置在栅电极和栅极绝缘膜上的氧化物半导体膜，设置在氧化物半导体膜上的金属氧化物膜， 以及设置在金属氧化物膜上的金属膜。 氧化物半导体膜与金属氧化物膜接触，并且包括金属的浓度高于氧化物半导体膜中的任何其它区域（高金属浓度区域）的区域。 在高金属浓度区域中，包含在氧化物半导体膜中的金属可以作为晶粒或微晶存在。

公开(公告)号：US20110079778A1

公开(公告)日：2011-04-07

申请号：US12894791

申请日：2010-09-30

申请人： Shunpei YAMAZAKI ,  Akiharu MIYANAGA ,  Masahiro TAKAHASHI ,  Hideyuki KISHIDA ,  Junichiro SAKATA

发明人： Shunpei YAMAZAKI ,  Akiharu MIYANAGA ,  Masahiro TAKAHASHI ,  Hideyuki KISHIDA ,  Junichiro SAKATA

IPC分类号： H01L29/12 ,  H01L21/34

CPC分类号： H01L21/02554 ,  G02F1/1368 ,  G02F1/167 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02266 ,  H01L21/02422 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/127 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

摘要： An object is to provide a semiconductor device with stable electric characteristics in which an oxide semiconductor is used. The impurity concentration in the oxide semiconductor layer is reduced in the following manner: a silicon oxide layer including many defects typified by dangling bonds is formed in contact with the oxide semiconductor layer, and an impurity such as hydrogen or moisture (a hydrogen atom or a compound including a hydrogen atom such as H2O) included in the oxide semiconductor layer is diffused into the silicon oxide layer. Further, a mixed region is provided between the oxide semiconductor layer and the silicon oxide layer. The mixed region includes oxygen, silicon, and at least one kind of metal element that is included in the oxide semiconductor.

摘要翻译： 本发明的目的是提供一种其中使用氧化物半导体的稳定电特性的半导体器件。 氧化物半导体层中的杂质浓度以如下方式降低：以与氧化物半导体层接触的方式形成包括以悬挂键为代表的许多缺陷的氧化硅层，以及诸如氢或水分的杂质（氢原子或 包含在氧化物半导体层中的包括氢原子的化合物如H 2 O的化合物）扩散到氧化硅层中。 此外，在氧化物半导体层和氧化硅层之间设置混合区域。 混合区域包括氧，硅以及包含在氧化物半导体中的至少一种金属元素。

公开(公告)号：US20160064059A1

公开(公告)日：2016-03-03

申请号：US14627592

申请日：2015-02-20

申请人： Masahiro TAKAHASHI

发明人： Masahiro TAKAHASHI

IPC分类号： G11C11/16

CPC分类号： G11C11/1675 ,  G11C11/1673 ,  G11C11/1693 ,  G11C13/004 ,  G11C13/0069 ,  G11C2213/79 ,  G11C2213/82

摘要： According to one embodiment, a semiconductor memory device comprises a memory cell including a variable resistance element, a sense amplifier connected to one side of the memory cell, and a write driver connected to the other side of the memory cell. A write current flows between the sense amplifier and the write driver in a write operation.

摘要翻译： 根据一个实施例，半导体存储器件包括存储单元，该存储单元包括可变电阻元件，连接到存储单元的一侧的读出放大器以及与该存储单元的另一侧连接的写入驱动器。 在写入操作中，写入电流在读出放大器和写入驱动器之间流动。

公开(公告)号：US20140286080A1

公开(公告)日：2014-09-25

申请号：US14018011

申请日：2013-09-04

申请人： Masahiro TAKAHASHI ,  Dong Keun KIM ,  Hyuck Sang YIM

发明人： Masahiro TAKAHASHI ,  Dong Keun KIM ,  Hyuck Sang YIM

IPC分类号： G11C13/00

CPC分类号： G11C13/003 ,  G11C11/1659 ,  G11C11/1673 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/004 ,  G11C2013/0054

摘要： According to one embodiment, a resistance change memory includes the following configuration. A first inverter includes first input and first output terminals and first and second voltage terminals. A second inverter includes second input and second output terminals and third and fourth voltage terminals. The second input terminal is connected to the first output terminal. The second output terminal is connected to the first input terminal. First and second transistors are connected to the first and second output terminals, respectively. Third and fourth transistors are connected to the first and third voltage terminals, respectively. A fifth transistor is connected between the first voltage terminal and the first memory cell. A sixth transistor is connected to the third voltage terminal. A controller turns on the first and second transistors, after turning off the fifth and sixth transistors.

摘要翻译： 根据一个实施例，电阻变化存储器包括以下配置。 第一反相器包括第一输入端和第一输出端以及第一和第二电压端。 第二反相器包括第二输入端和第二输出端以及第三和第四电压端。 第二输入端子连接到第一输出端子。 第二输出端子连接到第一输入端子。 第一和第二晶体管分别连接到第一和第二输出端子。 第三和第四晶体管分别连接到第一和第三电压端子。 第五晶体管连接在第一电压端和第一存储单元之间。 第六晶体管连接到第三电压端子。 在关闭第五和第六晶体管之后，控制器接通第一和第二晶体管。

公开(公告)号：US20120261657A1

公开(公告)日：2012-10-18

申请号：US13438206

申请日：2012-04-03

申请人： Masahiro TAKAHASHI ,  Kengo AKIMOTO ,  Shunpei YAMAZAKI

发明人： Masahiro TAKAHASHI ,  Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC分类号： H01L29/78 ,  H01L29/38

CPC分类号： H01L29/7869 ,  C01G15/006 ,  C01P2006/40 ,  G02F1/134309 ,  G02F1/136213 ,  G02F1/1368 ,  G02F2201/123 ,  H01L21/02565 ,  H01L21/02609 ,  H01L27/1225 ,  H01L27/1285 ,  H01L27/3262 ,  H01L29/045 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78696

摘要： To provide an oxide semiconductor film having stable electric conductivity and a highly reliable semiconductor device having stable electric characteristics by using the oxide semiconductor film. The oxide semiconductor film contains indium (In), gallium (Ga), and zinc (Zn) and includes a c-axis-aligned crystalline region aligned in the direction parallel to a normal vector of a surface where the oxide semiconductor film is formed. Further, the composition of the c-axis-aligned crystalline region is represented by In1+δGa1−δO3(ZnO)m (0

摘要翻译： 为了提供具有稳定的导电性的氧化物半导体膜和通过使用氧化物半导体膜具有稳定的电特性的高度可靠的半导体器件。 氧化物半导体膜含有铟（In），镓（Ga）和锌（Zn），并且包括在与形成氧化物半导体膜的表面的法线向平行的方向上排列的c轴取向的结晶区。 此外，c轴取向的结晶区域的组成由In1 +δGa1-δO3（ZnO）m（满足0 <δ<1且m = 1〜3）表示，氧化物半导体膜的整体的组成 包括c轴取向的结晶区域由In x Ga y O 3（ZnO）m（0

公开(公告)号：US20120132903A1

公开(公告)日：2012-05-31

申请号：US13297474

申请日：2011-11-16

申请人： Shunpei YAMAZAKI ,  Masahiro TAKAHASHI ,  Tetsunori MARUYAMA

发明人： Shunpei YAMAZAKI ,  Masahiro TAKAHASHI ,  Tetsunori MARUYAMA

IPC分类号： H01L29/786 ,  H01L21/34

CPC分类号： H01L29/06 ,  H01L21/0242 ,  H01L21/02422 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/0259 ,  H01L29/36 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78693

摘要： A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed. An oxide semiconductor film formed in this manner is used for an active layer of the transistor.

摘要翻译： 通过向其中使用氧化物半导体膜的通道的晶体管提供稳定的电特性来制造高度可靠的半导体器件。 通过热处理可以具有第一晶体结构的氧化物半导体膜和通过热处理可以具有第二晶体结构的氧化物半导体膜被形成为堆叠，然后进行热处理; 因此，通过使用具有第二晶体结构的氧化物半导体膜作为种子发生晶体生长，从而形成具有第一晶体结构的氧化物半导体膜。 以这种方式形成的氧化物半导体膜用于晶体管的有源层。

公开(公告)号：US20100255645A1

公开(公告)日：2010-10-07

申请号：US12750739

申请日：2010-03-31

申请人： Shunpei YAMAZAKI ,  Akiharu MIYANAGA ,  Masahiro TAKAHASHI ,  Takuya HIROHASHI

发明人： Shunpei YAMAZAKI ,  Akiharu MIYANAGA ,  Masahiro TAKAHASHI ,  Takuya HIROHASHI

IPC分类号： H01L21/86

CPC分类号： H01L27/1251 ,  H01L21/0237 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02675 ,  H01L21/02686 ,  H01L27/1281

摘要： An island-shaped single crystal semiconductor layer whose top surface has a plane within ±10° from a {211} plane is formed on an insulating surface; a non-single-crystal semiconductor layer is formed in contact with the top surface and a side surface of the single crystal semiconductor layer and on the insulating surface; the non-single-crystal semiconductor layer is irradiated with laser light to melt the non-single-crystal semiconductor layer, and to crystallize the non-single-crystal semiconductor layer formed on the insulating surface with use of the single crystal semiconductor layer as a seed crystal, so that a crystalline semiconductor layer is formed. A semiconductor device having an n-channel transistor and a p-channel transistor formed with use of the crystalline semiconductor layer is provided.

摘要翻译： 在绝缘面上形成顶面与{211}面成±10°以内的岛状单晶半导体层， 形成与单晶半导体层的顶表面和侧表面以及绝缘表面接触的非单晶半导体层; 用激光照射非单晶半导体层以熔化非单晶半导体层，并且使用单晶半导体层将形成在绝缘表面上的非单晶半导体层结晶为 晶种，从而形成结晶半导体层。 提供了具有使用晶体半导体层形成的n沟道晶体管和p沟道晶体管的半导体器件。