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公开(公告)号：US06181620B2
公开(公告)日：2001-01-30
申请号：US09484023
申请日：2000-01-18
IPC分类号： G11C1124
CPC分类号： G11C11/405 , G11C7/1042 , G11C7/12 , G11C7/22 , G11C11/4091 , G11C11/4094
摘要： The semiconductor storage device of this invention includes memory cells each having two transistors and one storage capacitor. Each memory cell is connected with a first word line and a first bit line for a first port and a second word line and a second bit line for a second port. The first and second bit lines are alternately disposed in an open bit line configuration. In the operation of the semiconductor storage device, in a period when a first precharge signal for precharging each first bit line or a first sense amplifier activating signal for activating a first sense amplifier is kept in an active state, a second precharge signal for precharging each second bit line and a second sense amplifier activating signal for activating a second sense amplifier are both placed in an inactive state.
摘要翻译： 本发明的半导体存储装置包括具有两个晶体管和一个存储电容器的存储单元。 每个存储单元与第一字线和用于第一端口的第一位线和用于第二端口的第二字线和第二位线连接。 第一位线和第二位线以开放位线配置交替布置。 在半导体存储装置的动作中，在对第一读出放大器的第一预定电荷进行预充电的第一预充电信号或激活第一读出放大器的第一读出放大器的激活信号保持为有效状态的期间内， 第二位线和用于激活第二读出放大器的第二读出放大器激活信号都处于非活动状态。
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公开(公告)号：US06226223B1
公开(公告)日：2001-05-01
申请号：US09511901
申请日：2000-02-23
IPC分类号： G11C800
CPC分类号： G11C7/222 , G11C7/22 , G11C11/24 , G11C11/4076
摘要： In a semiconductor memory device with multiple memory cells, each including a charge storage device and two transfer devices for transferring its charge, these memory cells are accessible with no select signal provided externally. The memory device includes a clock generator for generating first and second mutually complementary clock signals. In response to the first and second clock signals, one of first word lines and one of second word lines are activated alternately. Specifically, the first clock signal makes a memory cell accessible through a first bit line by activating the first word line and first transistor, while the second clock signal makes the memory cell accessible through a second bit line by activating the second word line and second transistor.
摘要翻译： 在具有多个存储器单元的半导体存储器件中，每个存储单元包括一个电荷存储器件和两个用于传送其电荷的转移器件，这些存储器单元是可以被访问的，没有从外部提供的选择信号。 存储器件包括用于产生第一和第二互补时钟信号的时钟发生器。 响应于第一和第二时钟信号，交替地激活第一字线和第二字线之一中的一个。 具体地，第一时钟信号通过激活第一字线和第一晶体管使得可通过第一位线访问存储单元，而第二时钟信号通过激活第二字线和第二晶体管使存储单元通过第二位线访问 。
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公开(公告)号：US06169684A
公开(公告)日：2001-01-02
申请号：US09495473
申请日：2000-02-01
IPC分类号： G11C1500
CPC分类号： G11C11/4097 , G06F12/0893 , G06F2212/3042 , G11C11/005
摘要： A cache memory including a first memory array and a main memory including a second memory array are integrated together on the same semiconductor substrate. Each memory cell in the first memory array is of a 2Tr1C type including: first and second transistors, the sources of which are connected together; and a data storage capacitor, one of the two electrodes of which is connected to the common source of the first and second transistors. Each memory cell in the second memory array is of a 1Tr1C type including: a third transistor; and a data storage capacitor, one of the two electrodes of which is connected to the source of the third transistor.
摘要翻译： 包括第一存储器阵列和包括第二存储器阵列的主存储器的高速缓存存储器集成在同一半导体衬底上。 第一存储器阵列中的每个存储单元是2Tr1C类型，包括：第一和第二晶体管，其源极连接在一起; 以及数据存储电容器，其两个电极中的一个连接到第一和第二晶体管的公共源。 第二存储器阵列中的每个存储单元是1Tr1C类型，包括：第三晶体管; 以及数据存储电容器，其两个电极中的一个连接到第三晶体管的源极。
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公开(公告)号：US5661066A
公开(公告)日：1997-08-26
申请号：US965967
申请日：1991-04-02
申请人： Toyoki Takemoto , Haruyasu Yamada , Tsutomu Fujita , Tadao Komeda
发明人： Toyoki Takemoto , Haruyasu Yamada , Tsutomu Fujita , Tadao Komeda
IPC分类号： H01L21/8222 , H01L27/02 , H01L27/06 , H01L29/8605 , H01L29/93 , H01L21/265 , H01L21/70 , H01L27/00
CPC分类号： H01L27/0233 , H01L21/8222 , H01L27/0244 , H01L27/0647 , H01L29/8605 , H01L29/93
摘要： In an integrated circuit comprising an IIL and a high frequency npn bipolar transistor which has a deep p.sup.- -type base region 45 for its inverted npn output transistors, circuit elements such as a resistor part R, a capacitor part C, a diode part D and an isolated crossing connection part Cr are provided with deep p.sup.- -type regions 54, 54', 65', 71 and 82 which are formed at the same time with the p.sup.- -type region 45 in the IIL, and thereby, reliability of the circuit elements as well as characteristic thereof are improved, thereby further improving manufacturing yields.
摘要翻译： 在包括IIL和高频npn双极晶体管的集成电路中，其具有用于其反相npn输出晶体管的深p型基极区45，电路元件如电阻器部分R，电容器部分C，二极管部分D 并且隔离交叉连接部分Cr设置有与IIL中的p型区域45同时形成的深P型区域54,54'，65'，71和82，从而可靠性 的电路元件及其特性得到改善，从而进一步提高了制造成品率。
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公开(公告)号：US5555527A
公开(公告)日：1996-09-10
申请号：US358606
申请日：1994-12-14
IPC分类号： G09G5/39 , G11C11/406 , G11C13/00
CPC分类号： G09G5/39 , G11C11/406 , G09G2360/123 , G09G5/001
摘要： A memory array divided into a plurality of sub-memory-arrays is disposed on a chip so that, if a specified sub-memory-array is selected by a sub-memory-array selecting circuit, a normal read/write operation is performed with respect to the sub-memory-array based on an address indicated by a group of external address signals. At the same time, a clock generator for self-refresh mounted on a chip generates a word-line basic clock for self-refresh and a word-line basic clock for refresh, thereby selecting the word lines in the sub-memory-arrays which have not been selected. Prior to a predetermined time at which the sub-memory-array subjected to a refresh operation is subsequently selected, a refresh halt signal is outputted so as to forcibly halt the refresh operation, thereby preventing insufficient recharging of a memory cell. Each of the plurality of sub-memory-arrays stores, of sequential sets of image data, data on one frame or one field.
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公开(公告)号：US5077784A
公开(公告)日：1991-12-31
申请号：US598758
申请日：1990-10-09
申请人： Tsutomu Fujita , Takeshi Ban , Yoshinobu Ido , Masaaki Sugihara , Tsuneyoshi Yamada , Takashi Sugiyama , Yoshihito Higashitutumi
发明人： Tsutomu Fujita , Takeshi Ban , Yoshinobu Ido , Masaaki Sugihara , Tsuneyoshi Yamada , Takashi Sugiyama , Yoshihito Higashitutumi
IPC分类号： H04N7/18
CPC分类号： H04N7/186
摘要： A visible telephone includes a housing in which a video camera is accommodated in a manner that an aperture thereof is directed to the front. The camera is fixed to a rotatable holder which is rotated by an operation of a knob outside the housing, responsively, an angle of declination or elevation of the aperture of the camera is changed. The camera includes a lens system and a solid-state image sensor which converts a light image from the lens system into an electrical signal (video signal), which is mounted on a circuit board. The solid-state image sensor is responsive to at least an infrared light. On the same or the other circuit board, an infrared LED is mounted. The infrared LED is lightened at necessary timing to expose a person or subject in the front of the aperture of the camera.
摘要翻译： 可视电话包括其中摄像机以其孔径指向前方的方式容纳的壳体。 照相机被固定到可旋转的保持器，其通过旋钮外壳外部的操作而旋转，响应地改变照相机的光圈的偏角或仰角。 相机包括透镜系统和将来自透镜系统的光图像转换成安装在电路板上的电信号（视频信号）的固态图像传感器。 固态图像传感器至少响应于红外光。 在相同或另一个电路板上安装了一个红外LED。 红外LED在必要的时间被点亮，以使照相机孔径前方的人或物体曝光。
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公开(公告)号：US4819311A
公开(公告)日：1989-04-11
申请号：US062506
申请日：1987-06-15
申请人： Hitoshi Hashimoto , Tsutomu Fujita , Eiji Ryukawa , Hideo Kodachi
发明人： Hitoshi Hashimoto , Tsutomu Fujita , Eiji Ryukawa , Hideo Kodachi
CPC分类号： B23B31/263 , B23Q1/017 , B23Q1/28 , B23Q39/02 , B23Q5/20 , B23Q2039/004 , Y10T29/5155 , Y10T29/5167 , Y10T408/37 , Y10T409/307672 , Y10T409/308232 , Y10T409/309352
摘要： A machine tool comprises an upstanding column, a tool-driving unit vertically movable on the column, and a pair of guide rails on a front surface of the column to extend vertically thereon and horizontally spaced apart from each other for guiding the upward and downward movement of the tool-driving unit. The tool-driving unit includes a lift frame on the guide rails and a tilting-type turret head which is supported on a front surface of the lift frame and is rotatable about an axis inclined relative to the longitudinal direction of the frame in a horizontal plane. One of the pair of guide rails is relatively disposed forwardly of the other guide rail, so that the individual guide rails both assume positions close to the turret head thereby to minimize the amount of overhang of the tool-driving unit.
摘要翻译： 一种机床包括直立柱，可在柱上垂直移动的工具驱动单元和在柱的前表面上的一对导轨，其在其上垂直延伸并且彼此水平间隔开以引导向上和向下运动 的工具驱动单元。 工具驱动单元包括在导轨上的提升框架和倾斜式转塔头，该倾斜式转台头部被支撑在提升框架的前表面上，并且能够绕水平面相对于框架的纵向方向倾斜的轴线旋转 。 一对导轨中的一个相对地设置在另一个导轨的前方，使得各个导轨都采取靠近转台头的位置，从而最小化工具驱动单元的悬伸量。
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公开(公告)号：US4563227A
公开(公告)日：1986-01-07
申请号：US660255
申请日：1984-10-12
IPC分类号： H01L21/762 , H01L21/38 , H01L21/467
CPC分类号： H01L21/76232 , H01L21/762
摘要： The invention provides a method for manufacturing a semiconductor device, wherein a semiconductor substrate is vertically etched to form a groove, antioxidant insulating films are formed on the side walls of the groove, and local oxidation is performed. Lateral extrusion of an oxide film which is a so-called bird's beak and a projection of the oxide film which is a so-called bird's head are substantially eliminated. As a result, the active region of the transistor, that is, the element formation region may not be narrowed, providing high packing density and high precision. Furthermore, the surface of the semiconductor substrate is flattened to prevent short-circuiting and disconnections of wiring layers. Stable manufacturing process provides a high yield of the semiconductor device. Electrical characteristics of the semiconductor device are greatly improved.
摘要翻译： 本发明提供一种制造半导体器件的方法，其中半导体衬底被垂直蚀刻以形成沟槽，在沟槽的侧壁上形成抗氧化绝缘膜，并进行局部氧化。 基本上消除了所谓的鸟喙的氧化膜的侧向挤出和所谓的鸟头的氧化膜的突起。 结果，晶体管的有源区，即元件形成区域可能不会变窄，提供高的堆积密度和高精度。 此外，半导体衬底的表面被平坦化以防止布线层的短路和断开。 稳定的制造工艺提供了高产量的半导体器件。 半导体器件的电气特性大大提高。
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公开(公告)号：US4040985A
公开(公告)日：1977-08-09
申请号：US674086
申请日：1976-04-06
IPC分类号： H01J29/45 , H01L31/0248 , H01L31/00
CPC分类号： H01J29/456 , Y10T428/31678
摘要： A photoconductive film comprises a first region containing Se in which Te and an element capable of forming deep levels in Se are added at concentrations lower than 10 atomic % inclusive on average, respectively, a second region disposed on the first region and containing Se in which Te is added with a continuous distribution of concentration having a peak value greater than 15 atomic % inclusive, a third region disposed on the second region and containing Se in which an element capable of forming deep levels in Se is added with a continuous distribution of concentration having a peak value greater than 15 atomic % inclusive, and a fourth region disposed on the third region and containing Se in which Te and an element capable of forming deep levels in Se are added at concentrations lower than 10 atomic % inclusive on average, respectively.
摘要翻译： 光电导膜包括含有Se的第一区域，其中Te和能够形成Se的深度水平的元素分别平均加入低于10原子％的平均值，第二区域设置在第一区域上并包含Se，其中 加入具有峰值大于15原子％的浓度的连续分布的浓度，第三区域设置在第二区域上，并且包含Se，其中能够形成Se中的深层次的元素具有连续的浓度分布 具有大于15原子％的峰值的第一区域，以及设置在第三区域上并且含有Se的Se的第四区域，其中Te和Se中能够形成深度水平的元素分别以低于10原子％ 。
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10.发明授权Processing method and processing device of semiconductor wafer, and semiconductor wafer 有权半导体晶片和半导体晶片的处理方法和处理装置公开(公告)号：US08790995B2
公开(公告)日：2014-07-29
申请号：US13422470
申请日：2012-03-16
申请人： Shinya Takyu , Noriko Shimizu , Tsutomu Fujita
发明人： Shinya Takyu , Noriko Shimizu , Tsutomu Fujita
IPC分类号： H01L21/301
CPC分类号： H01L21/304 , B24B7/228 , H01L21/3043
摘要： According to one embodiment, a substrate processing method is disclosed. The above method includes: grinding an outer edge portion on a back surface of a semiconductor wafer with a semiconductor element formed on its front surface with a first grindstone or blade to thereby form an annular groove; grinding a projecting portion on an inner side of the groove with a second grindstone to thereby form a recessed portion integrally with the groove on the back surface of the semiconductor wafer; and grinding a bottom surface of the recessed portion including a ground surface made by the second grindstone with a third grindstone.
摘要翻译： 根据一个实施例，公开了一种基板处理方法。 上述方法包括：用第一磨石或刀片在其表面上形成半导体元件研磨半导体晶片的背面上的外边缘部分，从而形成环形槽; 用第二磨石研磨槽的内侧的突出部分，从而与半导体晶片的背面上的槽一体地形成凹部; 并且用第三磨石研磨包括由第二磨石制成的地面的凹部的底面。
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