公开(公告)号：US20080230800A1

公开(公告)日：2008-09-25

申请号：US10585744

申请日：2005-04-27

Applicant: Akira Bandoh ,  Hiromitsu Sakai ,  Masato Kobayakawa ,  Mineo Okuyama ,  Hideki Tomozawa ,  Hisayuki Miki ,  Joseph Gaze ,  Syunji Horikawa ,  Tetsuo Sakurai

Inventor： Akira Bandoh ,  Hiromitsu Sakai ,  Masato Kobayakawa ,  Mineo Okuyama ,  Hideki Tomozawa ,  Hisayuki Miki ,  Joseph Gaze ,  Syunji Horikawa ,  Tetsuo Sakurai

IPC: H01L33/00 ,  H01L29/22 ,  H01L21/205

CPC classification number: H01L33/025 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L33/32

Abstract: An object of the present invention is to provide a low-resistance n-type Group III nitride semiconductor layered structure having excellent flatness and few pits. The inventive n-type group III nitride semiconductor layered structure comprises a substrate and, stacked on the substrate, an n-type impurity concentration periodic variation layer comprising an n-type impurity atom higher concentration layer and an n-type impurity atom lower concentration layer, said lower concentration layer being stacked on said higher concentration layer.

Abstract translation: 本发明的目的是提供一种具有优异的平坦度和很少凹坑的低电阻n型III族氮化物半导体层状结构。 本发明的n型III族氮化物半导体层状结构包括基板，并且在基板上堆叠包括n型杂质原子较高浓度层和n型杂质原子较低浓度层的n型杂质浓度周期性变化层 所述低浓度层堆叠在所述较高浓度层上。

公开(公告)号：US07855386B2

公开(公告)日：2010-12-21

申请号：US10585744

申请日：2005-04-27

Applicant: Akira Bandoh ,  Hiromitsu Sakai ,  Masato Kobayakawa ,  Mineo Okuyama ,  Hideki Tomozawa ,  Hisayuki Miki ,  Joseph Gaze ,  Syunji Horikawa ,  Tetsuo Sakurai

Inventor： Akira Bandoh ,  Hiromitsu Sakai ,  Masato Kobayakawa ,  Mineo Okuyama ,  Hideki Tomozawa ,  Hisayuki Miki ,  Joseph Gaze ,  Syunji Horikawa ,  Tetsuo Sakurai

IPC: H01L33/00 ,  H01L21/00

CPC classification number: H01L33/025 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02433 ,  H01L21/02538 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L33/32

Abstract: An object of the present invention is to provide a low-resistance n-type Group III nitride semiconductor layered structure having excellent flatness and few pits.The inventive n-type group III nitride semiconductor layered structure comprises a substrate and, stacked on the substrate, an n-type impurity concentration periodic variation layer comprising an n-type impurity atom higher concentration layer and an n-type impurity atom lower concentration layer, said lower concentration layer being stacked on said higher concentration layer.

Abstract translation: 本发明的目的是提供一种具有优异的平坦度和很少凹坑的低电阻n型III族氮化物半导体层状结构。 本发明的n型III族氮化物半导体层状结构包括基板，并且在基板上堆叠包括n型杂质原子较高浓度层和n型杂质原子较低浓度层的n型杂质浓度周期性变化层 所述低浓度层堆叠在所述较高浓度层上。

公开(公告)号：US20070152232A1

公开(公告)日：2007-07-05

申请号：US10591584

申请日：2005-03-03

Applicant: Masato Kobayakawa ,  Hideki Tomozawa ,  Hisayuki Miki

Inventor： Masato Kobayakawa ,  Hideki Tomozawa ,  Hisayuki Miki

IPC: H01L33/00

CPC classification number: H01L29/2003 ,  H01L31/0304 ,  H01L31/105 ,  H01L33/14 ,  H01L33/32 ,  Y02E10/544

Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride (GaN) compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity and, in combination therewith, hydrogen. The top portion includes a region containing a Group III element and a Group V element at a non-stoichiometric atomic ratio.

Abstract translation: 氮化镓基半导体器件具有作为包含p型杂质且呈p型导电的氮化镓（GaN）化合物半导体层的p型层。 p型层包括顶部和位于顶部下方的内部。 内部部分含有p型杂质，并与其结合，含有氢。 顶部包括含有非化学计量原子比的III族元素和V族元素的区域。

公开(公告)号：US07453091B2

公开(公告)日：2008-11-18

申请号：US10591585

申请日：2005-03-03

Applicant: Masato Kobayakawa ,  Hideki Tomozawa ,  Hisayuki Miki

Inventor： Masato Kobayakawa ,  Hideki Tomozawa ,  Hisayuki Miki

IPC: H01L29/26

CPC classification number: H01L31/0304 ,  H01L33/025 ,  H01L33/32 ,  H01S5/3054 ,  H01S5/32341 ,  Y02E10/544

Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity element and, in combination therewith, hydrogen.

Abstract translation: 氮化镓类半导体器件具有作为含有p型杂质且呈p型导电性的氮化镓系化合物半导体层的p型层。 p型层包括顶部和位于顶部下方的内部。 内部包含p型杂质元素，并与其组合，包含氢。

公开(公告)号：US20070187693A1

公开(公告)日：2007-08-16

申请号：US10591585

申请日：2005-03-03

Applicant: Masato Kobayakawa ,  Hideki Tomozawa ,  Hisayuki Miki

Inventor： Masato Kobayakawa ,  Hideki Tomozawa ,  Hisayuki Miki

IPC: H01L29/15 ,  H01L33/00 ,  H01L31/00

CPC classification number: H01L31/0304 ,  H01L33/025 ,  H01L33/32 ,  H01S5/3054 ,  H01S5/32341 ,  Y02E10/544

Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity element and, in combination therewith, hydrogen.

Abstract translation: 氮化镓类半导体器件具有作为含有p型杂质且呈p型导电性的氮化镓系化合物半导体层的p型层。 p型层包括顶部和位于顶部下方的内部。 内部包含p型杂质元素，并与其组合，包含氢。

公开(公告)号：US07436045B2

公开(公告)日：2008-10-14

申请号：US10591584

申请日：2005-03-03

Applicant: Masato Kobayakawa ,  Hideki Tomozawa ,  Hisayuki Miki

Inventor： Masato Kobayakawa ,  Hideki Tomozawa ,  Hisayuki Miki

IPC: H01L29/20

CPC classification number: H01L29/2003 ,  H01L31/0304 ,  H01L31/105 ,  H01L33/14 ,  H01L33/32 ,  Y02E10/544

Abstract: A gallium nitride-based semiconductor device has a p-type layer that is a gallium nitride (GaN) compound semiconductor layer containing a p-type impurity and exhibiting p-type conduction. The p-type layer includes a top portion and an inner portion located under the top portion. The inner portion contains the p-type impurity and, in combination therewith, hydrogen. The top portion includes a region containing a Group III element and a Group V element at a non-stoichiometric atomic ratio.

Abstract translation: 氮化镓基半导体器件具有作为包含p型杂质且呈p型导电的氮化镓（GaN）化合物半导体层的p型层。 p型层包括顶部和位于顶部下方的内部。 内部部分含有p型杂质，并与其结合，含有氢。 顶部包括含有非化学计量原子比的III族元素和V族元素的区域。

公开(公告)号：US07488971B2

公开(公告)日：2009-02-10

申请号：US10574202

申请日：2004-10-01

Applicant: Masato Kobayakawa ,  Hideki Tomozawa ,  Mineo Okuyama

Inventor： Masato Kobayakawa ,  Hideki Tomozawa ,  Mineo Okuyama

IPC: H01L29/06

CPC classification number: H01L33/007 ,  B82Y20/00 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/32 ,  H01L33/325 ,  H01S5/3086 ,  H01S5/3407 ,  H01S5/34333 ,  H01S2304/04

Abstract: A nitride semiconductor product including an n-type layer, a light-emitting layer, and a p-type layer which are formed of a nitride semiconductor and sequentially stacked on a substrate in the above order, the light-emitting layer having a quantum well structure in which a well layer is sandwiched by barrier layers having band gaps wider than the band gap of the well layer. Each barrier layer includes a barrier sublayer C which has been grown at a temperature higher than a growth temperature of the well layer, and a barrier sublayer E which has been grown at a temperature lower than a growth temperature of the barrier sublayer C. The barrier sublayer C is disposed closer to the substrate with respect to the barrier sublayer E.

Abstract translation: 一种氮化物半导体产品，包括由氮化物半导体形成的n型层，发光层和p型层，并按顺序层叠在基板上，发光层具有量子阱 其中阱层被具有比阱层的带隙宽的带隙的势垒层夹持的结构。 每个阻挡层包括在比阱层的生长温度高的温度下生长的阻挡层C，以及在低于势垒层C的生长温度的温度下生长的势垒层E。 子层C相对于阻挡子层E更靠近衬底设置。

公开(公告)号：US07482635B2

公开(公告)日：2009-01-27

申请号：US10589610

申请日：2005-02-23

Applicant: Masato Kobayakawa ,  Hitoshi Takeda ,  Hisayuki Miki ,  Tetsuo Sakurai

Inventor： Masato Kobayakawa ,  Hitoshi Takeda ,  Hisayuki Miki ,  Tetsuo Sakurai

IPC: H01L29/221 ,  H01L33/00 ,  H01L29/225

CPC classification number: H01L33/32 ,  B82Y20/00 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/0262 ,  H01L33/06 ,  H01L33/24

Abstract: An object of the present invention is to provide a gallium nitride compound semiconductor multilayer structure useful for producing a gallium nitride compound semiconductor light-emitting device which operates at low voltage while maintaining satisfactory light emission output.The inventive gallium nitride compound semiconductor multilayer structure comprises a substrate, and an n-type layer, a light-emitting layer, and a p-type layer formed on the substrate, the light-emitting layer having a multiple quantum well structure in which a well layer and a barrier layer are alternately stacked repeatedly, said light-emitting layer being sandwiched by the n-type layer and the p-type layer, wherein the well layer comprises a thick portion and a thin portion, and the barrier layer contains a dopant.

Abstract translation: 本发明的目的是提供一种氮化镓化合物半导体多层结构，其可用于制造在低电压下工作并保持良好的发光输出的氮化镓化合物半导体发光器件。 本发明的氮化镓化合物半导体多层结构包括基板，形成在基板上的n型层，发光层和p型层，所述发光层具有多量子阱结构，其中， 阱层和阻挡层重复交替层叠，所述发光层被n型层和p型层夹持，其中阱层包括厚部和薄部，阻挡层含有 掺杂剂。

公开(公告)号：US20080076200A1

公开(公告)日：2008-03-27

申请号：US11662474

申请日：2005-09-12

Applicant: Masato Kobayakawa ,  Hisayuki Miki

Inventor： Masato Kobayakawa ,  Hisayuki Miki

IPC: H01L21/00

CPC classification number: C30B25/02 ,  C30B29/403 ,  C30B29/406 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L33/007 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/181 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method for the fabrication of a Group III nitride semiconductor includes the steps of installing a substrate in a reaction vessel, forming a Group III nitride semiconductor on the substrate, causing a solid nitrogen compound to exist in the reaction vessel as a nitrogen source for a Group III nitride semiconductor and supplying a raw material gas as a source for a Group III element into the reaction vessel to fabricate the Group III nitride semiconductor.

Abstract translation: 制造III族氮化物半导体的方法包括以下步骤：在反应容器中安装衬底，在衬底上形成III族氮化物半导体，使固体氮化合物存在于反应容器中作为氮源 III族氮化物半导体，并将作为第III族元素的源的原料气体供给到反应容器中以制造III族氮化物半导体。

公开(公告)号：US20070012932A1

公开(公告)日：2007-01-18

申请号：US10574202

申请日：2004-10-01

Applicant: Masato Kobayakawa ,  Hideki Tomozawa ,  Mineo Okuyama

Inventor： Masato Kobayakawa ,  Hideki Tomozawa ,  Mineo Okuyama

IPC: H01L33/00

CPC classification number: H01L33/007 ,  B82Y20/00 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L33/0075 ,  H01L33/06 ,  H01L33/32 ,  H01L33/325 ,  H01S5/3086 ,  H01S5/3407 ,  H01S5/34333 ,  H01S2304/04

Abstract: An object of the present invention is to provide a nitride semiconductor product which causes no time-dependent deterioration in reverse withstand voltage and maintains a satisfactory initial reverse withstand voltage. The inventive nitride semiconductor product comprises an n-type layer, a light-emitting layer, and a p-type layer which are formed of a nitride semiconductor and sequentially stacked on a substrate in the above order, the light-emitting layer having a quantum well structure in which a well layer is sandwiched by barrier layers having band gaps wider than the band gap of the well layer, wherein each barrier layer comprises a barrier sublayer C which has been grown at a temperature higher than a growth temperature of the well layer, and a barrier sublayer E which has been grown at a temperature lower than a growth temperature of the barrier sublayer C, and the barrier sublayer C is disposed closer to the substrate with respect to the barrier sublayer E.

Abstract translation: 本发明的目的是提供一种氮化物半导体产品，其不会导致反向耐受电压的时间依赖性劣化并且保持令人满意的初始反向耐受电压。 本发明的氮化物半导体产品包括由氮化物半导体形成的n型层，发光层和p型层，并按顺序层叠在基板上，发光层具有量子 其中阱层被具有比阱层的带隙宽的带隙的势垒层夹持的阱结构，其中每个势垒层包括在比阱层的生长温度高的温度下生长的势垒层C ，以及在低于势垒层C的生长温度的温度下生长的势垒层E，并且阻挡子层C相对于势垒子层E配置为更靠近衬底。