Testing Process for Semiconductor Devices
    3.
    发明申请
    Testing Process for Semiconductor Devices 有权
    半导体器件的测试过程

    公开(公告)号:US20130084659A1

    公开(公告)日:2013-04-04

    申请号:US13312758

    申请日:2011-12-06

    IPC分类号: H01L21/66

    摘要: In accordance with an embodiment of the present invention, a method of manufacturing a semiconductor device includes providing a wafer having a top surface and an opposite bottom surface. The top surface has a plurality of dicing channels. The wafer has a plurality of dies adjacent the top surface. Each die of the plurality of dies is separated by a dicing channel of the plurality of dicing channels from another die of the plurality of dies. Trenches are formed in the wafer from the top surface. The trenches are oriented along the plurality of dicing channels. After forming the trenches, the plurality of dies is tested to identify first dies to be separated from remaining dies of the plurality of dies. After testing the plurality of dies, the wafer is subjected to a grinding process from the back surface. The grinding process separates the wafer into the plurality of dies.

    摘要翻译: 根据本发明的实施例,制造半导体器件的方法包括提供具有顶表面和相对底表面的晶片。 顶面具有多个切割通道。 晶片具有与顶表面相邻的多个模具。 多个管芯中的每个管芯由多个切割通道的切割通道与多个管芯中的另一管芯分开。 沟槽从顶表面形成在晶片中。 沟槽沿着多个切割通道定向。 在形成沟槽之后,测试多个管芯以识别与多个管芯的剩余管芯分离的第一管芯。 在测试多个模具之后,从背面对晶片进行研磨处理。 研磨过程将晶片分离成多个模具。

    Testing process for semiconductor devices
    4.
    发明授权
    Testing process for semiconductor devices 有权
    半导体器件的测试过程

    公开(公告)号:US09099547B2

    公开(公告)日:2015-08-04

    申请号:US13312758

    申请日:2011-12-06

    IPC分类号: H01L21/00 H01L21/78 H01L21/66

    摘要: In accordance with an embodiment of the present invention, a method of manufacturing a semiconductor device includes providing a wafer having a top surface and an opposite bottom surface. The top surface has a plurality of dicing channels. The wafer has a plurality of dies adjacent the top surface. Each die of the plurality of dies is separated by a dicing channel of the plurality of dicing channels from another die of the plurality of dies. Trenches are formed in the wafer from the top surface. The trenches are oriented along the plurality of dicing channels. After forming the trenches, the plurality of dies is tested to identify first dies to be separated from remaining dies of the plurality of dies. After testing the plurality of dies, the wafer is subjected to a grinding process from the back surface. The grinding process separates the wafer into the plurality of dies.

    摘要翻译: 根据本发明的实施例,制造半导体器件的方法包括提供具有顶表面和相对底表面的晶片。 顶面具有多个切割通道。 晶片具有与顶表面相邻的多个模具。 多个管芯中的每个管芯由多个切割通道的切割通道与多个管芯中的另一管芯分开。 沟槽从顶表面形成在晶片中。 沟槽沿着多个切割通道定向。 在形成沟槽之后,测试多个管芯以识别与多个管芯的剩余管芯分离的第一管芯。 在测试多个模具之后,从背面对晶片进行研磨处理。 研磨过程将晶片分离成多个模具。