公开(公告)号：US07977783B1

公开(公告)日：2011-07-12

申请号：US12549083

申请日：2009-08-27

申请人： No Sun Park ,  Young Suk Chung ,  Jae Beom Shim

发明人： No Sun Park ,  Young Suk Chung ,  Jae Beom Shim

IPC分类号： H01L23/48

CPC分类号： H01L24/11 ,  H01L23/552 ,  H01L24/13 ,  H01L2224/0231 ,  H01L2224/0233 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/0558 ,  H01L2224/05644 ,  H01L2224/11334 ,  H01L2224/13021 ,  H01L2224/13099 ,  H01L2224/13111 ,  H01L2924/0001 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2924/01083

摘要： A wafer level chip size package (WLCSP) and a method of manufacturing the same are disclosed. Lands are formed at the ends of redistribution layers. The redistribution layers excluding the lands and a first dielectric layer are covered with a second dielectric layer. After forming a first under bump metallurgy (UBM) layer on the land, a solder ball is reflowed to the first UBM layer. A second UBM layer is widely formed on the entire second dielectric layer that is the outer circumference of the first UBM layer and is connected to the redistribution layer through a via-hole. Therefore, the second UBM layer having a large area can be used as a ground plane or a power plane. In addition, the second UBM layer can electrically connect the redistribution layers physically separated from each other. Therefore, the plurality of redistribution layers can cross each other without being electrically shorted with each other.

摘要翻译： 公开了一种晶片级芯片尺寸封装（WLCSP）及其制造方法。 地面在再分布层的末端形成。 除了焊盘之外的再分配层和第一介电层被第二介电层覆盖。 在焊盘上形成第一下凸块冶金（UBM）层之后，将焊球回流到第一UBM层。 第二UBM层被广泛地形成在作为第一UBM层的外周的整个第二电介质层上，并且通过通孔连接到再分配层。 因此，具有大面积的第二UBM层可以用作接地层或电源层。 此外，第二UBM层可以将再分布层彼此物理分离地电连接。 因此，多个再分配层可以彼此交叉而不彼此电短路。

公开(公告)号：US11420112B2

公开(公告)日：2022-08-23

申请号：US16999658

申请日：2020-08-21

申请人： No Sun Park

发明人： No Sun Park

IPC分类号： A63F13/28 ,  A63F13/837 ,  A63F13/44 ,  A63F13/245 ,  A63F13/26

摘要： The system for operating a match-up game includes a display unit having a plurality of player screen regions configured to display game screens a first input unit configured to receive an input from a first player a second input unit configured to receive an input from a second player a first air outlet configured to discharge air to the first player a second air outlet configured to discharge air to the second player; a control unit configured to control the display unit to count a game time and change the game screens displayed on the player screen regions for each counted game time, and when receiving an input to the first input unit from the first player, control the second air outlet so as to discharge air corresponding to the received input. The system for operating a match-up game may increase a player's sense of immersion.

公开(公告)号：US09070675B2

公开(公告)日：2015-06-30

申请号：US13973492

申请日：2013-08-22

申请人： Kwang Sup So ,  No Sun Park

发明人： Kwang Sup So ,  No Sun Park

IPC分类号： H01L23/498 ,  H01L21/768 ,  H01L23/31 ,  H01L23/00 ,  H01L23/525

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03901 ,  H01L2224/03903 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/0231 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/05552

摘要： A plating structure for wafer level packages are disclosed and may include a semiconductor wafer comprising a plurality of semiconductor die and a plating structure for forming an under bump metal on redistribution layers on the plurality of semiconductor die. The plating structure may comprise a plating connection line around a periphery of the semiconductor wafer, and a plating bar coupling the plating connection line to plating traces on the plurality of semiconductor die. The plating traces may be electrically coupled to the redistribution layers on the plurality of semiconductor die. The semiconductor wafer may comprise a reconstituted wafer of said semiconductor die. The semiconductor wafer may comprise a wafer prior to singulating the plurality of semiconductor die. The plating bar may be located in a sawing line for the singulating of the plurality of semiconductor die. A passivation layer may cover the redistribution layer and the plating traces.

摘要翻译： 公开了一种用于晶片级封装的电镀结构，并且可以包括半导体晶片，该半导体晶片包括多个半导体管芯和用于在多个半导体管芯上的再分配层上形成凸块状金属的电镀结构。 电镀结构可以包括围绕半导体晶片的周围的电镀连接线，以及将电镀连接线耦合到多个半导体管芯上的电镀迹线的电镀棒。 电镀迹线可以电耦合到多个半导体管芯上的再分配层。 半导体晶片可以包括所述半导体管芯的重构晶片。 在分离多个半导体管芯之前，半导体晶片可以包括晶片。 电镀棒可以位于用于单个多个半导体管芯的锯切线中。 钝化层可以覆盖再分布层和电镀痕迹。

公开(公告)号：US20140042600A1

公开(公告)日：2014-02-13

申请号：US13962735

申请日：2013-08-08

申请人： Jin Young Kim ,  No Sun Park ,  Yoon Joo Kim ,  Choon Heung Lee ,  Jin Han Kim ,  Seung Jae Lee ,  Se Woong Cha ,  Sung Kyu Kim ,  Glenn Rinne

发明人： Jin Young Kim ,  No Sun Park ,  Yoon Joo Kim ,  Choon Heung Lee ,  Jin Han Kim ,  Seung Jae Lee ,  Se Woong Cha ,  Sung Kyu Kim ,  Glenn Rinne

IPC分类号： H01L23/00

CPC分类号： H01L25/0657 ,  H01L23/00 ,  H01L23/293 ,  H01L23/3135 ,  H01L23/3171 ,  H01L24/09 ,  H01L24/19 ,  H01L24/73 ,  H01L24/81 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73209 ,  H01L2224/73267 ,  H01L2924/1461 ,  H01L2924/18162 ,  H01L2924/19107 ,  H01L2924/00

摘要： A semiconductor package and manufacturing method thereof are disclosed and may include a first semiconductor device comprising a first bond pad on a first surface of the first semiconductor device, a first encapsulant material surrounding side edges of the first semiconductor device, and a redistribution layer (RDL) formed on the first surface of the first semiconductor device and on a first surface of the encapsulant material. The RDL may electrically couple the first bond pad to a second bond pad formed above the first surface of the encapsulant material. A second semiconductor device comprising a third bond pad on a first surface of the second semiconductor device may face the first surface of the first semiconductor device and be electrically coupled to the first bond pad on the first semiconductor device. The first surface of the first semiconductor device may be coplanar with the first surface of the encapsulant material.

摘要翻译： 公开了半导体封装及其制造方法，并且可以包括第一半导体器件，其包括在第一半导体器件的第一表面上的第一接合焊盘，围绕第一半导体器件的侧边缘的第一密封材料和再分配层（RDL ）形成在第一半导体器件的第一表面上并且在密封剂材料的第一表面上。 RDL可以将第一接合焊盘电耦合到形成在密封剂材料的第一表面上方的第二接合焊盘。 包括在第二半导体器件的第一表面上的第三接合焊盘的第二半导体器件可面向第一半导体器件的第一表面并且电耦合到第一半导体器件上的第一接合焊盘。 第一半导体器件的第一表面可以与密封剂材料的第一表面共面。

公开(公告)号：US20140061900A1

公开(公告)日：2014-03-06

申请号：US13955422

申请日：2013-07-31

申请人： No Sun Park ,  Ji Yeon Ryu ,  Go Woon Jung

发明人： No Sun Park ,  Ji Yeon Ryu ,  Go Woon Jung

IPC分类号： H01L23/498 ,  H01L21/48

CPC分类号： H01L23/49811 ,  H01L21/4853 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/525 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L2224/02123 ,  H01L2224/02331 ,  H01L2224/0235 ,  H01L2224/02373 ,  H01L2224/02375 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05011 ,  H01L2224/05012 ,  H01L2224/05018 ,  H01L2224/05024 ,  H01L2224/05078 ,  H01L2224/0508 ,  H01L2224/05124 ,  H01L2224/05155 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05557 ,  H01L2224/05558 ,  H01L2224/05568 ,  H01L2224/05647 ,  H01L2224/06051 ,  H01L2224/06137 ,  H01L2224/10 ,  H01L2224/13027 ,  H01L2224/13028 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2224/05552

摘要： A semiconductor package with improved redistribution layer design and fabricating method thereof are disclosed and may include a semiconductor die comprising bond pads, a first redistribution layer (RDL) formed on the semiconductor die. The first RDL has a first end coupled to a bond pad and a second end coupled to a solder bump via under bump metal layers. A second RDL is formed in a same plane of the semiconductor die as the first RDL and is electrically isolated from the first RDL. A first end of the second RDL may be coupled to a bond pad and the second RDL may pass underneath, but be electrically isolated from, the solder bump. A passivation layer may be formed on the first and second RDLs exposing the second end of the first RDL. The under bump metal layers may be formed on the second end of the first RDL exposed by the passivation layer.

摘要翻译： 公开了具有改进的再分布层设计及其制造方法的半导体封装，并且可以包括半导体管芯，其包括接合焊盘，形成在半导体管芯上的第一再分配层（RDL）。 第一RDL具有耦合到接合焊盘的第一端和通过下凸块金属层耦合到焊料凸块的第二端。 第二RDL形成在与第一RDL相同的半导体管芯的平面中，并且与第一RDL电隔离。 第二RDL的第一端可以耦合到接合焊盘，并且第二RDL可以在下面通过，但是与焊料凸块电隔离。 可以在露出第一RDL的第二端的第一和第二RDL上形成钝化层。 底部凸块金属层可以形成在由钝化层暴露的第一RDL的第二端上。

公开(公告)号：US20210052979A1

公开(公告)日：2021-02-25

申请号：US16999658

申请日：2020-08-21

申请人： No Sun Park

发明人： No Sun Park

IPC分类号： A63F13/28 ,  A63F13/837 ,  A63F13/44 ,  A63F13/245 ,  A63F13/26

摘要： The system for operating a match-up game includes a display unit having a plurality of player screen regions configured to display game screens a first input unit configured to receive an input from a first player a second input unit configured to receive an input from a second player a first air outlet configured to discharge air to the first player a second air outlet configured to discharge air to the second player; a control unit configured to control the display unit to count a game time and change the game screens displayed on the player screen regions for each counted game time, and when receiving an input to the first input unit from the first player, control the second air outlet so as to discharge air corresponding to the received input. The system for operating a match-up game may increase a player's sense of immersion.

公开(公告)号：US20140070408A1

公开(公告)日：2014-03-13

申请号：US13973492

申请日：2013-08-22

申请人： Kwang Sup So ,  No Sun Park

发明人： Kwang Sup So ,  No Sun Park

IPC分类号： H01L23/498 ,  H01L21/768

CPC分类号： H01L23/49811 ,  H01L21/76885 ,  H01L23/3114 ,  H01L23/3192 ,  H01L23/525 ,  H01L23/562 ,  H01L23/564 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03901 ,  H01L2224/03903 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11334 ,  H01L2224/11849 ,  H01L2224/131 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/3841 ,  H01L2224/11 ,  H01L2224/03 ,  H01L2224/0231 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/05552

摘要： A plating structure for wafer level packages are disclosed and may include a semiconductor wafer comprising a plurality of semiconductor die and a plating structure for forming an under bump metal on redistribution layers on the plurality of semiconductor die. The plating structure may comprise a plating connection line around a periphery of the semiconductor wafer, and a plating bar coupling the plating connection line to plating traces on the plurality of semiconductor die. The plating traces may be electrically coupled to the redistribution layers on the plurality of semiconductor die. The semiconductor wafer may comprise a reconstituted wafer of said semiconductor die. The semiconductor wafer may comprise a wafer prior to singulating the plurality of semiconductor die. The plating bar may be located in a sawing line for the singulating of the plurality of semiconductor die. A passivation layer may cover the redistribution layer and the plating traces.

摘要翻译： 公开了一种用于晶片级封装的电镀结构，并且可以包括半导体晶片，该半导体晶片包括多个半导体管芯和用于在多个半导体管芯上的再分布层上形成凸块状金属的电镀结构。 电镀结构可以包括围绕半导体晶片的周围的电镀连接线，以及将电镀连接线耦合到多个半导体管芯上的电镀迹线的电镀棒。 电镀迹线可以电耦合到多个半导体管芯上的再分配层。 半导体晶片可以包括所述半导体管芯的重构晶片。 在分离多个半导体管芯之前，半导体晶片可以包括晶片。 电镀棒可以位于用于单个多个半导体管芯的锯切线中。 钝化层可以覆盖再分布层和电镀痕迹。