公开(公告)号：US07307406B2

公开(公告)日：2007-12-11

申请号：US11510819

申请日：2006-08-28

申请人： Nobuyuki Shirai ,  Ryotaro Kudo

发明人： Nobuyuki Shirai ,  Ryotaro Kudo

IPC分类号： G05F1/40

CPC分类号： H03K17/6871 ,  H02M3/1588 ,  H02M2001/0032 ,  H02M2001/0048 ,  H03K17/165 ,  Y02B70/1466 ,  Y02B70/1491 ,  Y02B70/16

摘要： A capacitor is disposed between the output side and the ground potential of an inductor which creates an output voltage. A first switch element supplies a current from an input voltage to an input side of the inductor, and a second switch element which is turned on when the first switch element is off sets the input side of the inductor to a prescribed potential. A control circuit detects the arrival of the voltage on the input side of the inductor at a high voltage corresponding to the input voltage when the load circuit is in a light load state and the second switch element is off, and turns on the first switch element. It invalidates the detection output of the voltage detecting circuit when the load circuit is in a heavy load state and, after the second switch element is turned off, turns on the first switch element.

摘要翻译： 电感器设置在产生输出电压的电感器的输出侧和接地电位之间。 第一开关元件将电流从输入电压提供给电感器的输入侧，并且当第一开关元件断开时导通的第二开关元件将电感器的输入侧设定为规定电位。 当负载电路处于轻负载状态并且第二开关元件断开时，控制电路以对应于输入电压的高电压检测电感器的输入侧的电压到达，并且接通第一开关元件 。 当负载电路处于重负载状态时，使电压检测电路的检测输出无效，并且在第二开关元件断开之后，导通第一开关元件。

公开(公告)号：US20070046275A1

公开(公告)日：2007-03-01

申请号：US11510819

申请日：2006-08-28

申请人： Nobuyuki Shirai ,  Ryotaro Kudo

发明人： Nobuyuki Shirai ,  Ryotaro Kudo

IPC分类号： G05F1/00

CPC分类号： H03K17/6871 ,  H02M3/1588 ,  H02M2001/0032 ,  H02M2001/0048 ,  H03K17/165 ,  Y02B70/1466 ,  Y02B70/1491 ,  Y02B70/16

摘要： A capacitor is disposed between the output side and the ground potential of an inductor which creates an output voltage. A first switch element supplies a current from an input voltage to an input side of the inductor, and a second switch element which is turned on when the first switch element is off sets the input side of the inductor to a prescribed potential. A control circuit detects the arrival of the voltage on the input side of the inductor at a high voltage corresponding to the input voltage when the load circuit is in a light load state and the second switch element is off, and turns on the first switch element. It invalidates the detection output of the voltage detecting circuit when the load circuit is in a heavy load state and, after the second switch element is turned off, turns on the first switch element.

公开(公告)号：US07659144B2

公开(公告)日：2010-02-09

申请号：US11618188

申请日：2006-12-29

申请人： Nobuyuki Shirai ,  Ryotaro Kudo ,  Yukihiro Sato

发明人： Nobuyuki Shirai ,  Ryotaro Kudo ,  Yukihiro Sato

IPC分类号： H01L21/00

CPC分类号： H01L25/162 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49575 ,  H01L23/544 ,  H01L24/05 ,  H01L24/06 ,  H01L24/28 ,  H01L24/37 ,  H01L24/40 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/84 ,  H01L24/85 ,  H01L24/91 ,  H01L25/16 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/0603 ,  H01L2224/32245 ,  H01L2224/371 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40095 ,  H01L2224/40245 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48599 ,  H01L2224/49111 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2224/73221 ,  H01L2224/73265 ,  H01L2224/8385 ,  H01L2224/84801 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01037 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/0781 ,  H01L2924/12032 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2924/00012

摘要： Disclosed is a semiconductor device which makes it easy to design a wiring pattern for a wiring substrate on which the semiconductor device is to be mounted. In manufacturing plural semiconductor devices for providing different amounts of output current, arrangements and numbers of leads to which semiconductor chips for power transistors of the semiconductor devices are to be electrically connected are changed according to output current requirements for the semiconductor devices, whereas arrangements and numbers of leads to which semiconductor chips for control circuits of the semiconductor devices are to be electrically connected are fixed to be common to the semiconductor devices. In this way, the probability of malfunction of control circuits (PWM circuits) of the semiconductor devices can be reduced, so that a semiconductor device which makes it easy to design a wiring pattern for a wiring substrate on which the semiconductor device is to be mounted can be provided.

摘要翻译： 公开了一种半导体器件，其能够容易地设计用于要安装半导体器件的布线基板的布线图案。 在制造多个用于提供不同数量的输出电流的半导体器件时，根据半导体器件的输出电流要求来改变半导体器件用于半导体器件的半导体芯片要被电连接的引线的布置和数量，而布置和数字 用于半导体器件的控制电路的半导体芯片要被电连接的导线固定为半导体器件的共同点。 以这种方式，可以减少半导体器件的控制电路（PWM电路）发生故障的可能性，使得能够容易地设计要安装半导体器件的布线基板的布线图案的半导体器件 可以提供。

公开(公告)号：US20080061756A1

公开(公告)日：2008-03-13

申请号：US11979093

申请日：2007-10-31

申请人： Nobuyuki Shirai ,  Ryotaro Kudo

发明人： Nobuyuki Shirai ,  Ryotaro Kudo

IPC分类号： G05F1/00

CPC分类号： H03K17/6871 ,  H02M3/1588 ,  H02M2001/0032 ,  H02M2001/0048 ,  H03K17/165 ,  Y02B70/1466 ,  Y02B70/1491 ,  Y02B70/16

摘要： A capacitor is disposed between the output side and the ground potential of an inductor which creates an output voltage. A first switch element supplies a current from an input voltage to an input side of the inductor, and a second switch element which is turned on when the first switch element is off sets the input side of the inductor to a prescribed potential. A control circuit detects the arrival of the voltage on the input side of the inductor at a high voltage corresponding to the input voltage when the load circuit is in a light load state and the second switch element is off, and turns on the first switch element. It invalidates the detection output of the voltage detecting circuit when the load circuit is in a heavy load state and, after the second switch element is turned off, turns on the first switch element.

摘要翻译： 电感器设置在产生输出电压的电感器的输出侧和接地电位之间。 第一开关元件将电流从输入电压提供给电感器的输入侧，并且当第一开关元件断开时导通的第二开关元件将电感器的输入侧设定为规定电位。 当负载电路处于轻负载状态并且第二开关元件断开时，控制电路以对应于输入电压的高电压检测电感器的输入侧的电压到达，并且接通第一开关元件 。 当负载电路处于重负载状态时，使电压检测电路的检测输出无效，并且在第二开关元件断开之后，导通第一开关元件。

公开(公告)号：US20090219002A1

公开(公告)日：2009-09-03

申请号：US12463790

申请日：2009-05-11

申请人： Nobuyuki Shirai ,  Ryotaro Kudo

发明人： Nobuyuki Shirai ,  Ryotaro Kudo

IPC分类号： G05F1/10

CPC分类号： H03K17/6871 ,  H02M3/1588 ,  H02M2001/0032 ,  H02M2001/0048 ,  H03K17/165 ,  Y02B70/1466 ,  Y02B70/1491 ,  Y02B70/16

摘要： A capacitor is disposed between the output side and the ground potential of an inductor which creates an output voltage. A first switch element supplies a current from an input voltage to an input side of the inductor, and a second switch element which is turned on when the first switch element is off sets the input side of the inductor to a prescribed potential. A control circuit detects the arrival of the voltage on the input side of the inductor at a high voltage corresponding to the input voltage when the load circuit is in a light load state and the second switch element is off, and turns on the first switch element. It invalidates the detection output of the voltage detecting circuit when the load circuit is in a heavy load state and, after the second switch element is turned off, turns on the first switch element.

摘要翻译： 电感器设置在产生输出电压的电感器的输出侧和接地电位之间。 第一开关元件将电流从输入电压提供给电感器的输入侧，并且当第一开关元件断开时导通的第二开关元件将电感器的输入侧设定为规定电位。 当负载电路处于轻负载状态并且第二开关元件断开时，控制电路以对应于输入电压的高电压检测电感器的输入侧的电压到达，并且接通第一开关元件 。 当负载电路处于重负载状态时，使电压检测电路的检测输出无效，并且在第二开关元件断开之后，导通第一开关元件。

公开(公告)号：US07548050B2

公开(公告)日：2009-06-16

申请号：US11979093

申请日：2007-10-31

申请人： Nobuyuki Shirai ,  Ryotaro Kudo

发明人： Nobuyuki Shirai ,  Ryotaro Kudo

IPC分类号： G05F1/40

CPC分类号： H03K17/6871 ,  H02M3/1588 ,  H02M2001/0032 ,  H02M2001/0048 ,  H03K17/165 ,  Y02B70/1466 ,  Y02B70/1491 ,  Y02B70/16

摘要： A capacitor is disposed between the output side and the ground potential of an inductor which creates an output voltage. A first switch element supplies a current from an input voltage to an input side of the inductor, and a second switch element which is turned on when the first switch element is off sets the input side of the inductor to a prescribed potential. A control circuit detects the arrival of the voltage on the input side of the inductor at a high voltage corresponding to the input voltage when the load circuit is in a light load state and the second switch element is off, and turns on the first switch element. It invalidates the detection output of the voltage detecting circuit when the load circuit is in a heavy load state and, after the second switch element is turned off, turns on the first switch element.

摘要翻译： 电感器设置在产生输出电压的电感器的输出侧和接地电位之间。 第一开关元件将电流从输入电压提供给电感器的输入侧，并且当第一开关元件断开时导通的第二开关元件将电感器的输入侧设定为规定电位。 当负载电路处于轻负载状态并且第二开关元件断开时，控制电路以对应于输入电压的高电压检测电感器的输入侧的电压到达，并且接通第一开关元件 。 当负载电路处于重负载状态时，使电压检测电路的检测输出无效，并且在第二开关元件断开之后，导通第一开关元件。

公开(公告)号：US08426910B2

公开(公告)日：2013-04-23

申请号：US13467536

申请日：2012-05-09

申请人： Nobuyuki Shirai ,  Nobuyoshi Matsuura ,  Yoshito Nakazawa

发明人： Nobuyuki Shirai ,  Nobuyoshi Matsuura ,  Yoshito Nakazawa

IPC分类号： H01L29/76

CPC分类号： H01L29/7806 ,  H01L27/0629 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/20 ,  H01L29/402 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/47 ,  H01L29/475 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/782 ,  H01L29/7823 ,  H01L29/872 ,  H01L29/8725

摘要： A semiconductor device for use in a power supply circuit has first and second MOSFETS. The source-drain path of one of the MOSFETS are coupled to the source-drain path of the other, and a load element is coupled to a connection node of the source-drain paths. The second MOSFET is formed on a semiconductor substrate with a Schottky barrier diode. First gate electrodes of the second MOSFET are formed in trenches in a first region of the semiconductor substrate, while second gate electrodes of the second MOSFET are formed in trenches in a second region of the semiconductor substrate. The first and second gate electrodes are electrically connected together. Portions of the Schottky barrier diode are formed between adjacent ones of the second gate electrodes. A center-to-center spacing between adjacent first gate electrodes is smaller than a center-to-center spacing between adjacent second gate electrodes.

摘要翻译： 用于电源电路的半导体器件具有第一和第二MOSFET。 MOSFET之一的源极 - 漏极路径耦合到另一个MOSFET的源极 - 漏极路径，并且负载元件耦合到源极 - 漏极路径的连接节点。 第二MOSFET形成在具有肖特基势垒二极管的半导体衬底上。 第二MOSFET的第一栅电极形成在半导体衬底的第一区域中的沟槽中，而第二MOSFET的第二栅电极形成在半导体衬底的第二区域中的沟槽中。 第一和第二栅极电连接在一起。 在相邻的第二栅电极之间形成肖特基势垒二极管的部分。 相邻的第一栅电极之间的中心到中心的间隔小于相邻的第二栅电极之间的中心间距。

公开(公告)号：US08193578B2

公开(公告)日：2012-06-05

申请号：US13214131

申请日：2011-08-19

申请人： Nobuyuki Shirai ,  Nobuyoshi Matsuura ,  Yoshito Nakazawa

发明人： Nobuyuki Shirai ,  Nobuyoshi Matsuura ,  Yoshito Nakazawa

IPC分类号： H01L29/76

CPC分类号： H01L29/7806 ,  H01L27/0629 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/20 ,  H01L29/402 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/47 ,  H01L29/475 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/782 ,  H01L29/7823 ,  H01L29/872 ,  H01L29/8725

摘要： A power supply circuit includes first and second switching MOSFETS. A semiconductor device, including the second switching MOSFET, has a plurality of transistor cell regions disposed in a semiconductor substrate. A source electrode of the second MOSFET is disposed over a main surface of the semiconductor substrate and is in contact with a top surface of a source region in each of the plurality of transistor cell regions. A drain electrode of the second MOSFET is disposed over a back surface of the semiconductor substrate and is electrically connected to the semiconductor substrate. A Schottky cell region is disposed between the plurality of transistor cell regions in the semiconductor substrate. The source electrode is in contact with a part of the main surface of the semiconductor so as to form a Schottky junction in the Schottky cell region.

摘要翻译： 电源电路包括第一和第二开关MOSFET。 包括第二开关MOSFET的半导体器件具有设置在半导体衬底中的多个晶体管单元区域。 第二MOSFET的源电极设置在半导体衬底的主表面上，并且与多个晶体管单元区域中的每一个中的源极区域的顶表面接触。 第二MOSFET的漏电极设置在半导体衬底的背面上并与半导体衬底电连接。 肖特基电池区设置在半导体衬底中的多个晶体管单元区域之间。 源电极与半导体的主表面的一部分接触，以便在肖特基电池区域中形成肖特基结。

公开(公告)号：US07518208B2

公开(公告)日：2009-04-14

申请号：US11482765

申请日：2006-07-10

申请人： Nobuyuki Shirai ,  Nobuyoshi Matsuura ,  Yoshito Nakazawa

发明人： Nobuyuki Shirai ,  Nobuyoshi Matsuura ,  Yoshito Nakazawa

IPC分类号： H01L29/47

CPC分类号： H01L29/7806 ,  H01L27/0629 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/20 ,  H01L29/402 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/456 ,  H01L29/47 ,  H01L29/475 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/782 ,  H01L29/7823 ,  H01L29/872 ,  H01L29/8725

摘要： A semiconductor device has a first region and a second region formed on a surface of a substrate. Plural first conductors and second conductors are formed in the first and second regions respectively. A first semiconductor region and a second semiconductor region are formed between adjacent first conductors. The second semiconductor region is in the first semiconductor region and has a conductivity type opposite to that of the first semiconductor. A third semiconductor region is formed between adjacent second conductors. The third semiconductor region has the same conductivity type as the second semiconductor region and is lower in density than the second semiconductor region. The third semiconductor region has a metal contact region for contact with a metal, which is electrically connected to the second semiconductor region. A center-to-center distance between adjacent first conductors is smaller than that between adjacent second conductors.

摘要翻译： 半导体器件具有形成在衬底的表面上的第一区域和第二区域。 多个第一导体和第二导体分别形成在第一和第二区域中。 在相邻的第一导体之间形成第一半导体区域和第二半导体区域。 第二半导体区域处于第一半导体区域并具有与第一半导体区域相反的导电类型。 在相邻的第二导体之间形成第三半导体区域。 第三半导体区域具有与第二半导体区域相同的导电类型，并且密度低于第二半导体区域。 第三半导体区域具有与金属接触的金属接触区域，其与第二半导体区域电连接。 相邻的第一导体之间的中心到中心的距离小于相邻的第二导体之间的距离。

公开(公告)号：US20160351702A1

公开(公告)日：2016-12-01

申请号：US14406991

申请日：2014-01-31

申请人： Hideo Numabe ,  Nobuyuki Shirai ,  Hirokazu Kato ,  Tomoaki Uno ,  Kazuyuki Umezu

发明人： Hideo Numabe ,  Nobuyuki Shirai ,  Hirokazu Kato ,  Tomoaki Uno ,  Kazuyuki Umezu

IPC分类号： H01L29/78 ,  H01L29/40 ,  H01L29/06 ,  H01L29/10 ,  H01L23/535 ,  H01L29/417 ,  H01L29/423 ,  H01L29/08

CPC分类号： H01L29/7813 ,  H01L23/535 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1033 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/4236 ,  H01L2224/05554 ,  H01L2224/0603 ,  H01L2224/371 ,  H01L2224/37124 ,  H01L2224/37147 ,  H01L2224/40245 ,  H01L2224/45144 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

摘要： A control electrode GE1 is formed in a lower portion of a trench TR1 formed in a semiconductor substrate SUB, and a gate electrode GE2 is formed in an upper portion inside the trench TR1. An insulating film G1 is formed between the control electrode GE1 and a side wall and a bottom surface of the trench TR1, an insulating film G2 is formed between the side wall of the trench TR1 and the gate electrode GE2, and an insulating film G3 is formed between the control electrode GE1 and the gate electrode GE2. A region adjacent to the trench TR1 includes an n+-type semiconductor region NR for a source, a p-type semiconductor region PR for a channel formation, and a semiconductor region for a drain. A wiring connected to the control electrode GE1 is not connected to a wiring connected to the gate electrode GE2, and is not connected to a wiring connected to the n+-type semiconductor region NR for a source.

摘要翻译： 控制电极GE1形成在形成在半导体衬底SUB中的沟槽TR1的下部，栅电极GE2形成在沟槽TR1内部的上部。 在控制电极GE1与沟槽TR1的侧壁和底面之间形成绝缘膜G1，在沟槽TR1的侧壁与栅电极GE2之间形成绝缘膜G2，绝缘膜G3为 形成在控制电极GE1和栅电极GE2之间。 与沟槽TR1相邻的区域包括用于源极的n +型半导体区域NR，用于沟道形成的p型半导体区域PR和用于漏极的半导体区域。 连接到控制电极GE1的布线不连接到与栅电极GE2连接的布线，并且不连接到与源的n +型半导体区域NR连接的布线。