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32 条记录 (耗时 0.032 秒)

    Digital fast recovery timing algorithm
    1.
    发明授权
    Digital fast recovery timing algorithm 失效
    数字快速恢复定时算法

    公开(公告)号：US4866739A

    公开(公告)日：1989-09-12

    申请号：US158346

    申请日：1988-02-22

    申请人： Oscar Agazzi ,  Chris Cole ,  Steve Levy

    发明人： Oscar Agazzi ,  Chris Cole ,  Steve Levy

    IPC分类号： H04L7/02 ,  H04L7/033 ,  H04L27/38

    CPC分类号： H04L7/007 ,  H04L27/38

    摘要： The present invention employs a four sample per baud timing recovery scheme to achieve fast acquistion of initial timing phase uncertainity and reliable fast tracking with low jitter for non-equalized QAM wave forms. The present invention operates for data timing frequency uncertainties up to 0.02 percent in the preferred embodiment. The timing recovery system is implemented with programmable digital signal processor code in connection with a programmable phase baud timer. The baud timer may be implemented in software or hardware. The present scheme is based on a pair of quadrature (T/4 spaced) timing error signals derived by a wave difference method. In the wave difference method, the envelope power of each baud sample is computed by square summing the real and imaginary samples of the received analog signal.

    摘要翻译： 本发明采用每个波特率定时恢复方案的四个采样来实现初始定时相位不确定性的快速采集和用于非均衡QAM波形的低抖动的可靠快速跟踪。 在优选实施例中，本发明用于高达0.02％的数据定时频率不确定性。 定时恢复系统采用可编程数字信号处理器代码与可编程相位波特率定时器相结合。 波特率定时器可以在软件或硬件中实现。 本方案基于通过波差法导出的一对正交（T / 4间隔）定时误差信号。 在波差方法中，每个波特率采样的包络功率通过对接收的模拟信号的实数和虚数样本进行平方和来计算。

    Phase jitter tracker
    2.
    发明授权
    Phase jitter tracker 失效
    相位抖动跟踪器

    公开(公告)号：US4953186A

    公开(公告)日：1990-08-28

    申请号：US157986

    申请日：1988-02-19

    申请人： Steve Levy ,  Dave Hedberg ,  Oscar Agazzi

    发明人： Steve Levy ,  Dave Hedberg ,  Oscar Agazzi

    IPC分类号： H04B1/12

    CPC分类号： H04B1/123

    摘要： The jitter tracker of the present invention uses a decision-directed error signal as an input to a feedback loop. The error signal is filtered and coupled to a phase locked loop centered at the center of the jitter tracking frequency range, which in the preferred embodiment is 55 Hz. The frequency width and center track and lock frequencies are set by a loop filter. A second order loop is used to acquire the frequency and phase jitter within an acceptable range. Once within this range, a first order loop is used to lock the amplitude to the input signal. The amplitude and phase values are subtracted from the incoming signal so that a new error may be calculated. In the preferred embodiment, the jitter tracker of the present invention is implemented in a digital signal processor. The jitter tracker of the preferred embodiment of the present invention comprises two filter loops. The first loop is used to generate the magnitude of the jitter error. The second loop generates the phase of the jitter error. The input to the jitter tracker is the quadrature portion of a normalized error term. This quadrature portion is multiplied by the cosine of the output of the error loops to generate the magnitude of the error signal. This term is multiplied by a scaling factor and is then integrated to generate a magnitude error term. The quadrature portion of the normalized error signal is multiplied in the second loop by the sine of the loop output. This phase error signal is coupled to a first order filter within a range in the preferred embodiment of plus or minus 10 Hz from a 55 Hz nominal frequency. The output of this first filter is multiplied by nominal 55 Hz vector and integrated to produce a phase error output. The real portion of this phase error signal is generated and combined with the magnitude error to produce a jitter correction factor for use in the receive channel circuitry.

    摘要翻译： 本发明的抖动跟踪器使用决策误差信号作为反馈回路的输入。 误差信号被滤波并耦合到以抖动跟踪频率范围的中心为中心的锁相环，其在优选实施例中为55Hz。 频率宽度和中心轨道和锁定频率由环路滤波器设置。 使用二阶环路来获取可接受范围内的频率和相位抖动。 一旦在该范围内，使用一阶循环将幅度锁定到输入信号。 从输入信号中减去振幅和相位值，从而可以计算新的误差。 在优选实施例中，本发明的抖动跟踪器在数字信号处理器中实现。 本发明的优选实施例的抖动跟踪器包括两个滤波器回路。 第一个循环用于产生抖动误差的大小。 第二个循环产生抖动误差的相位。 抖动跟踪器的输入是归一化误差项的正交部分。 该正交部分乘以误差环的输出的余弦以产生误差信号的幅度。 该项乘以缩放因子，然后被积分以产生幅度误差项。 归一化误差信号的正交部分在第二个循环中乘以循环输出的正弦。 该相位误差信号在55Hz额定频率的正或负10Hz的优选实施例的范围内耦合到一阶滤波器。 该第一个滤波器的输出乘以标称的55 Hz矢量并积分以产生相位误差输出。 该相位误差信号的实际部分被产生并与幅度误差组合以产生在接收信道电路中使用的抖动校正因子。

    Methods and systems for digitally processing data signals
    3.
    发明授权
    Methods and systems for digitally processing data signals 有权
    用于数字处理数据信号的方法和系统

    公开(公告)号：US07835387B2

    公开(公告)日：2010-11-16

    申请号：US12496211

    申请日：2009-07-01

    申请人： Oscar Agazzi ,  Venugopal Gopinathan

    发明人： Oscar Agazzi ,  Venugopal Gopinathan

    IPC分类号： H04L12/66

    CPC分类号： H04B10/6971 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0624 ,  H03M1/0836 ,  H03M1/1215 ,  H04B10/6933 ,  H04B10/697 ,  H04L7/0062 ,  H04L25/03057 ,  H04L25/03159 ,  H04L2025/03445

    摘要： Digital signal processing based methods and systems for receiving electrical and/or optical data signals include electrical receivers, optical receivers, parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a single path receiver. Alternatively, the present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal.

    摘要翻译： 用于接收电和/或光数据信号的基于数字信号处理的方法和系统包括电接收机，光接收机，并行接收机，多信道接收机，定时恢复方案，并且不限于均衡方案。 本发明被实现为单路径接收机。 或者，本发明被实现为多路径并行接收机，其中使用以较低速率操作的并行路径来实现模数转换器（“ADC”）和/或数字信号处理器（“DSP”） 比接收的数据信号。

    Method, Apparatus and System for High-Speed Transmission on Fiber Optic Channel
    4.
    发明申请
    Method, Apparatus and System for High-Speed Transmission on Fiber Optic Channel 失效
    光纤通道高速传输方法，装置及系统

    公开(公告)号：US20070047968A1

    公开(公告)日：2007-03-01

    申请号：US11552452

    申请日：2006-10-24

    申请人： Oscar Agazzi

    发明人： Oscar Agazzi

    IPC分类号： H04B10/04

    CPC分类号： H04L1/006 ,  H04B10/2575 ,  H04B10/2581 ,  H04B10/504 ,  H04B10/5055 ,  H04B10/541 ,  H04B10/548 ,  H04J14/02 ,  H04L25/0204 ,  H04L25/0224 ,  H04L27/2637 ,  H04L27/2653 ,  H04L27/2697 ,  H04L27/34

    摘要： Multi-carrier modulation fiber optic systems constructed using a series of electrical carriers, modulating the data on the electrical carriers and combining the carriers to form a wideband signal. The wideband signal can then be intensity modulated on a laser and coupled to a fiber optic channel. A receiver may then receive the laser signal from the fiber optic channel and convert it into an electrical signal. Multi-carrier modulation may be applied to existing fiber channels, which may be of lower quality. Existing fiber channels may have characteristics which prevent or restrict the transmission of data using intensity modulation at certain frequencies. An adaptive multi-carrier modulation transmitter may characterize an existing fiber optic channel and ascertain the overall characteristics of the channel. The transmitter and receiver can then be configured to use various bandwidths and various modulations in order to match the transfer characteristic of the fiber channel. A series of adaptive multi-carrier modulation transmitters and receivers can be integrated on a single integrated circuit. If multiple adaptive receivers and transmitters are integrated on a single integrated circuit, they may be used to upgrade existing networks by adding different wavelength lasers for the transmission of data in order to achieve any capacity desired. Each receiver and transmitter may characterize the fiber for its particular wavelength laser and may configure the modulation and bandpass to the fiber's characteristics.

    摘要翻译： 使用一系列电载体构建的多载波调制光纤系统，调制电载波上的数据并组合载波以形成宽带信号。 然后可以在激光器上对宽带信号进行强度调制并耦合到光纤通道。 然后，接收器可以从光纤通道接收激光信号并将其转换为电信号。 多载波调制可以应用于可能具有较低质量的现有光纤信道。 现有的光纤通道可以具有在某些频率下使用强度调制来防止或限制数据传输的特性。 自适应多载波调制发射机可以表征现有光纤信道并确定信道的总体特性。 然后可以将发射机和接收机配置为使用各种带宽和各种调制，以便匹配光纤信道的传输特性。 一系列自适应多载波调制发射机和接收机可集成在单个集成电路上。 如果多个自适应接收机和发射机集成在单个集成电路上，则它们可用于通过为数据传输添加不同波长的激光器来升级现有网络，以实现所需的任何容量。 每个接收器和发射器可以表征其特定波长激光器的光纤，并且可以配置对光纤的特性的调制和带通。

    Methods and Systems for Digitally Processing Optical Data Signals
    7.
    发明申请
    Methods and Systems for Digitally Processing Optical Data Signals 有权
    数字处理光数据信号的方法与系统

    公开(公告)号：US20090310665A1

    公开(公告)日：2009-12-17

    申请号：US12496211

    申请日：2009-07-01

    申请人： Oscar Agazzi ,  Venugopal Gopinathan

    发明人： Oscar Agazzi ,  Venugopal Gopinathan

    IPC分类号： H04L27/06 ,  H03H7/40

    CPC分类号： H04B10/6971 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0624 ,  H03M1/0836 ,  H03M1/1215 ,  H04B10/6933 ,  H04B10/697 ,  H04L7/0062 ,  H04L25/03057 ,  H04L25/03159 ,  H04L2025/03445

    摘要： Digital signal processing based methods and systems for receiving electrical and/or optical data signals include electrical receivers, optical receivers, parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a single path receiver. Alternatively, the present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal.

    摘要翻译： 用于接收电和/或光数据信号的基于数字信号处理的方法和系统包括电接收机，光接收机，并行接收机，多信道接收机，定时恢复方案，并且不限于均衡方案。 本发明被实现为单路径接收机。 或者，本发明被实现为多路径并行接收机，其中使用以较低速率操作的并行路径来实现模数转换器（“ADC”）和/或数字信号处理器（“DSP”） 比接收的数据信号。

    Methods and systems for DSP-based receivers
    10.
    发明授权
    Methods and systems for DSP-based receivers 有权
    基于DSP的接收机的方法和系统

    公开(公告)号：US07245638B2

    公开(公告)日：2007-07-17

    申请号：US10085071

    申请日：2002-03-01

    申请人： Oscar Agazzi ,  Venugopal Gopinathan

    发明人： Oscar Agazzi ,  Venugopal Gopinathan

    IPC分类号： H04J3/06

    CPC分类号： H04L25/03006 ,  H03M1/0604 ,  H03M1/0607 ,  H03M1/0609 ,  H03M1/0624 ,  H03M1/0836 ,  H03M1/1215 ,  H04B10/6933 ,  H04B10/697 ,  H04B10/6971 ,  H04L7/0054 ,  H04L7/0062 ,  H04L7/0337 ,  H04L25/03057 ,  H04L25/03133 ,  H04L25/03159 ,  H04L25/03203 ,  H04L2025/03445

    摘要： Digital signal processing based methods and systems for receiving data signals include parallel receivers, multi-channel receivers, timing recovery schemes, and, without limitation, equalization schemes. The present invention is implemented as a multi-path parallel receiver in which an analog-to-digital converter (“ADC”) and/or a digital signal processor (“DSP”) are implemented with parallel paths that operate at lower rates than the received data signal. In an embodiment, a parallel DSP-based receiver in accordance with the invention includes a separate timing recovery loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate automatic gain control (AGC) loop for each ADC path. In an embodiment, a parallel DSP-based receiver includes a separate offset compensation loop for each ADC path. In an embodiment the present invention is implemented as a multi-channel receiver that receives a plurality of data signals.

    摘要翻译： 用于接收数据信号的基于数字信号处理的方法和系统包括并行接收机，多信道接收机，定时恢复方案，并且不限于均衡方案。 本发明被实现为多路径并行接收机，其中使用平行路径来实现模数转换器（“ADC”）和/或数字信号处理器（“DSP”），该路径以比 接收数据信号。 在一个实施例中，根据本发明的基于并行DSP的接收机包括用于每个ADC路径的单独的定时恢复环路。 在一个实施例中，并行基于DSP的接收机包括用于每个ADC路径的单独的自动增益控制（AGC）环路。 在一个实施例中，并行基于DSP的接收机包括用于每个ADC路径的单独的偏移补偿环路。 在一个实施例中，本发明被实现为接收多个数据信号的多信道接收机。