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公开(公告)号:US20110247872A1
公开(公告)日:2011-10-13
申请号:US12756748
申请日:2010-04-08
申请人: Qing Ma , Jun He , Patrick Morrow , Paul B. Fischer , Sridhar Balakrishnan , Satish Radhakrishnan , Tatyana Tanya Andryushchenko , Guanghai Xu
发明人: Qing Ma , Jun He , Patrick Morrow , Paul B. Fischer , Sridhar Balakrishnan , Satish Radhakrishnan , Tatyana Tanya Andryushchenko , Guanghai Xu
CPC分类号: H01L24/19 , B23K1/0016 , H01L21/0334 , H01L24/11 , H01L2224/245 , H01L2924/01322 , H01L2924/14 , H05K3/4015 , H05K2201/1028 , H01L2924/00
摘要: The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.
摘要翻译: 本主题涉及制造微电子器件的领域。 在至少一个实施例中,本主题涉及形成具有其部分的互连,其在附接到外部设备之后在冷却期间从微电子器件脱粘。 脱粘部分允许互连件弯曲并吸收应力。
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公开(公告)号:US08637778B2
公开(公告)日:2014-01-28
申请号:US12756748
申请日:2010-04-08
申请人: Qing Ma , Jun He , Patrick Morrow , Paul B. Fischer , Sridhar Balakrishnan , Satish Radhakrishnan , Tatyana Tanya Andryushchenko , Guanghai Xu
发明人: Qing Ma , Jun He , Patrick Morrow , Paul B. Fischer , Sridhar Balakrishnan , Satish Radhakrishnan , Tatyana Tanya Andryushchenko , Guanghai Xu
CPC分类号: H01L24/19 , B23K1/0016 , H01L21/0334 , H01L24/11 , H01L2224/245 , H01L2924/01322 , H01L2924/14 , H05K3/4015 , H05K2201/1028 , H01L2924/00
摘要: The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.
摘要翻译: 本主题涉及制造微电子器件的领域。 在至少一个实施例中,本主题涉及形成具有其部分的互连,其在附接到外部设备之后在冷却期间从微电子器件脱粘。 脱粘部分允许互连件弯曲并吸收应力。
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公开(公告)号:US20140106560A1
公开(公告)日:2014-04-17
申请号:US14132157
申请日:2013-12-18
申请人: Qing Ma , Jun He , Patrick Morrow , Paul B. Fischer , Sridhar Balakrishnan , Satish Radhakrishnan , Tatyana Tanya Andryushcheko , Guanghai Xu
发明人: Qing Ma , Jun He , Patrick Morrow , Paul B. Fischer , Sridhar Balakrishnan , Satish Radhakrishnan , Tatyana Tanya Andryushcheko , Guanghai Xu
IPC分类号: H01L23/00
CPC分类号: H01L24/19 , B23K1/0016 , H01L21/0334 , H01L24/11 , H01L2224/245 , H01L2924/01322 , H01L2924/14 , H05K3/4015 , H05K2201/1028 , H01L2924/00
摘要: The present subject matter relates to the field of fabricating microelectronic devices. In at least one embodiment, the present subject matter relates to forming an interconnect that has a portion thereof which becomes debonded from the microelectronic device during cooling after attachment to an external device. The debonded portion allows the interconnect to flex and absorb stress.
摘要翻译: 本主题涉及制造微电子器件的领域。 在至少一个实施例中,本主题涉及形成具有其部分的互连,其在附接到外部设备之后在冷却期间从微电子器件脱粘。 脱粘部分允许互连件弯曲并吸收应力。
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公开(公告)号:US20150091182A1
公开(公告)日:2015-04-02
申请号:US14041722
申请日:2013-09-30
申请人: Chia-Pin Chiu , Qing Ma , Robert L. Sankman , Paul B. Fischer , Patrick Morrow , William J. Lambert , Charles A. Gealer , Tyler Osborn
发明人: Chia-Pin Chiu , Qing Ma , Robert L. Sankman , Paul B. Fischer , Patrick Morrow , William J. Lambert , Charles A. Gealer , Tyler Osborn
IPC分类号: H01L25/00 , H01L23/15 , H01L21/48 , H01L25/065
CPC分类号: H01L25/0655 , H01L21/4803 , H01L21/561 , H01L21/568 , H01L23/15 , H01L23/3121 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/19 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/24137 , H01L2224/2499 , H01L2224/32225 , H01L2224/73204 , H01L2924/12042 , H01L2924/181 , H01L2924/00
摘要: A die assembly formed on a thin dielectric sheet is described. In one example, a first and a second die have interconnect areas. A dielectric sheet, such as glass, silicon, or oxidized metal is applied over the interconnect areas of dies. Conductive vias are formed in the dielectric sheet to connect with pads of the interconnect areas. A build-up layer includes routing to connect pads of the first die interconnect area to pads of the second die interconnect area through the conductive vias and a cover is applied over the dies, the dielectric sheet, and the build-up layer.
摘要翻译: 描述了形成在薄介电片上的模具组件。 在一个示例中,第一和第二管芯具有互连区域。 将诸如玻璃,硅或氧化金属之类的电介质片施加在管芯的互连区域上。 导电孔形成在电介质片中以与互连区的焊盘连接。 堆积层包括通过导电通孔将第一管芯互连区的焊盘连接到第二管芯互连区的焊盘的路由,并且覆盖被施加在管芯,电介质层和堆积层上。
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公开(公告)号:US09177831B2
公开(公告)日:2015-11-03
申请号:US14041722
申请日:2013-09-30
申请人: Chia-Pin Chiu , Qing Ma , Robert L. Sankman , Paul B. Fischer , Patrick Morrow , William J. Lambert , Charles A. Gealer , Tyler Osborn
发明人: Chia-Pin Chiu , Qing Ma , Robert L. Sankman , Paul B. Fischer , Patrick Morrow , William J. Lambert , Charles A. Gealer , Tyler Osborn
CPC分类号: H01L25/0655 , H01L21/4803 , H01L21/561 , H01L21/568 , H01L23/15 , H01L23/3121 , H01L23/5384 , H01L23/5386 , H01L23/5389 , H01L24/19 , H01L24/97 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/24137 , H01L2224/2499 , H01L2224/32225 , H01L2224/73204 , H01L2924/12042 , H01L2924/181 , H01L2924/00
摘要: A die assembly formed on a thin dielectric sheet is described. In one example, a first and a second die have interconnect areas. A dielectric sheet, such as glass, silicon, or oxidized metal is applied over the interconnect areas of dies. Conductive vias are formed in the dielectric sheet to connect with pads of the interconnect areas. A build-up layer includes routing to connect pads of the first die interconnect area to pads of the second die interconnect area through the conductive vias and a cover is applied over the dies, the dielectric sheet, and the build-up layer.
摘要翻译: 描述了形成在薄介电片上的模具组件。 在一个示例中,第一和第二管芯具有互连区域。 将诸如玻璃,硅或氧化金属之类的电介质片施加在管芯的互连区域上。 导电孔形成在电介质片中以与互连区的焊盘连接。 堆积层包括通过导电通孔将第一管芯互连区的焊盘连接到第二管芯互连区的焊盘的路由,并且覆盖被施加在管芯,电介质层和堆积层上。
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公开(公告)号:US20120038379A1
公开(公告)日:2012-02-16
申请号:US12854697
申请日:2010-08-11
申请人: Qing Ma , Roy E. Swart , Paul B. Fischer , Johanna M. Swan
发明人: Qing Ma , Roy E. Swart , Paul B. Fischer , Johanna M. Swan
IPC分类号: G01R31/20
CPC分类号: G01R1/06716 , G01R1/07314 , G01R3/00
摘要: Embodiments of the invention describe forming a set of probes using semiconductor regions each including a plurality of vias. A first set of probe segments may be formed from a first set of vias on a first semiconductor region. A second set of probe segments may be formed from a second set of vias on a second semiconductor region and bonded to the first set of probe segments. At least one spring comprising a dielectric material may be formed to couple the first set of probe segments, while a set of metal tips disposed on the second set of probe segments.
摘要翻译: 本发明的实施例描述了使用包括多个通孔的半导体区形成一组探针。 第一组探针段可以由第一半导体区上的第一组通孔形成。 第二组探针段可以由第二半导体区上的第二组通孔形成并结合到第一组探针段上。 包括电介质材料的至少一个弹簧可以形成为耦合第一组探针段,而一组设置在第二组探针段上的金属尖端。
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公开(公告)号:US08513966B2
公开(公告)日:2013-08-20
申请号:US12854697
申请日:2010-08-11
申请人: Qing Ma , Roy E. Swart , Paul B. Fischer , Johanna M. Swan
发明人: Qing Ma , Roy E. Swart , Paul B. Fischer , Johanna M. Swan
IPC分类号: G01R31/20
CPC分类号: G01R1/06716 , G01R1/07314 , G01R3/00
摘要: Embodiments of the invention describe forming a set of probes using semiconductor regions each including a plurality of vias. A first set of probe segments may be formed from a first set of vias on a first semiconductor region. A second set of probe segments may be formed from a second set of vias on a second semiconductor region and bonded to the first set of probe segments. At least one spring comprising a dielectric material may be formed to couple the first set of probe segments, while a set of metal tips disposed on the second set of probe segments.
摘要翻译: 本发明的实施例描述了使用包括多个通孔的半导体区形成一组探针。 第一组探针段可以由第一半导体区上的第一组通孔形成。 第二组探针段可以由第二半导体区上的第二组通孔形成并结合到第一组探针段上。 包括电介质材料的至少一个弹簧可以形成为耦合第一组探针段,而一组设置在第二组探针段上的金属尖端。
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公开(公告)号:US10367070B2
公开(公告)日:2019-07-30
申请号:US15754804
申请日:2015-09-24
申请人: Intel Corporation , Patrick Morrow , Mauro J. Kobrinsky , Kimin Jun , Il-Seok Son , Paul B. Fischer
发明人: Patrick Morrow , Mauro J. Kobrinsky , Kimin Jun , Il-Seok Son , Paul B. Fischer
IPC分类号: H01L21/00 , H01L27/00 , H01L29/00 , H01L29/417 , H01L21/02 , H01L21/768 , H01L21/8234 , H01L23/522 , H01L23/528 , H01L27/088 , H01L29/08 , H01L29/10 , H01L29/165 , H01L29/66 , H01L29/78 , H01L21/84 , H01L27/12 , H01L21/265 , H01L21/306 , H01L21/324
摘要: Methods and structures formed thereby are described, of forming self-aligned contact structures for microelectronic devices. An embodiment includes forming a trench in a source/drain region of a transistor device disposed in a device layer, wherein the device layer is on a substrate, forming a fill material in the trench, forming a source/drain material on the fill material, forming a first source/drain contact on a first side of the source/drain material, and then forming a second source drain contact on a second side of the source/drain material.
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公开(公告)号:US20150008950A1
公开(公告)日:2015-01-08
申请号:US13977665
申请日:2011-12-31
摘要: Embodiments relate to the formation of test probes. One method includes providing a bulk sheet of an electrically conductive material. A laser is used to cut through the bulk sheet in a predetermined pattern to form a test probe. Other embodiments are described and claimed.
摘要翻译: 实施例涉及测试探针的形成。 一种方法包括提供导电材料的散装片材。 使用激光以预定图案切割散片,以形成测试探针。 描述和要求保护其他实施例。
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公开(公告)号:US07105925B2
公开(公告)日:2006-09-12
申请号:US11055453
申请日:2005-02-02
CPC分类号: H01L21/7684 , H01L21/76819 , H01L2924/0002 , H01L2924/00
摘要: Method and structure for optimizing and controlling chemical mechanical planarization are disclosed. Embodiments of the invention include planarization techniques to make nonplanar surfaces comprising alternating metal and intermetal layers. Relative protrusion dimensions and uniformity of various layers may be accurately controlled using the disclosed techniques.
摘要翻译: 公开了用于优化和控制化学机械平面化的方法和结构。 本发明的实施例包括使包括交替的金属和金属间层的非平面表面的平面化技术。 使用所公开的技术可以精确地控制各层的相对突出尺寸和均匀性。
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