公开(公告)号：US20120038379A1

公开(公告)日：2012-02-16

申请号：US12854697

申请日：2010-08-11

申请人： Qing Ma ,  Roy E. Swart ,  Paul B. Fischer ,  Johanna M. Swan

发明人： Qing Ma ,  Roy E. Swart ,  Paul B. Fischer ,  Johanna M. Swan

IPC分类号： G01R31/20

CPC分类号： G01R1/06716 ,  G01R1/07314 ,  G01R3/00

摘要： Embodiments of the invention describe forming a set of probes using semiconductor regions each including a plurality of vias. A first set of probe segments may be formed from a first set of vias on a first semiconductor region. A second set of probe segments may be formed from a second set of vias on a second semiconductor region and bonded to the first set of probe segments. At least one spring comprising a dielectric material may be formed to couple the first set of probe segments, while a set of metal tips disposed on the second set of probe segments.

摘要翻译： 本发明的实施例描述了使用包括多个通孔的半导体区形成一组探针。 第一组探针段可以由第一半导体区上的第一组通孔形成。 第二组探针段可以由第二半导体区上的第二组通孔形成并结合到第一组探针段上。 包括电介质材料的至少一个弹簧可以形成为耦合第一组探针段，而一组设置在第二组探针段上的金属尖端。

公开(公告)号：US08513966B2

公开(公告)日：2013-08-20

申请号：US12854697

申请日：2010-08-11

申请人： Qing Ma ,  Roy E. Swart ,  Paul B. Fischer ,  Johanna M. Swan

发明人： Qing Ma ,  Roy E. Swart ,  Paul B. Fischer ,  Johanna M. Swan

IPC分类号： G01R31/20

CPC分类号： G01R1/06716 ,  G01R1/07314 ,  G01R3/00

摘要： Embodiments of the invention describe forming a set of probes using semiconductor regions each including a plurality of vias. A first set of probe segments may be formed from a first set of vias on a first semiconductor region. A second set of probe segments may be formed from a second set of vias on a second semiconductor region and bonded to the first set of probe segments. At least one spring comprising a dielectric material may be formed to couple the first set of probe segments, while a set of metal tips disposed on the second set of probe segments.

摘要翻译： 本发明的实施例描述了使用包括多个通孔的半导体区形成一组探针。 第一组探针段可以由第一半导体区上的第一组通孔形成。 第二组探针段可以由第二半导体区上的第二组通孔形成并结合到第一组探针段上。 包括电介质材料的至少一个弹簧可以形成为耦合第一组探针段，而一组设置在第二组探针段上的金属尖端。

公开(公告)号：US09368429B2

公开(公告)日：2016-06-14

申请号：US13631744

申请日：2012-09-28

申请人： Qing Ma ,  Johanna M. Swan ,  Min Tao ,  Charles A. Gealer ,  Edward A. Zarbock

发明人： Qing Ma ,  Johanna M. Swan ,  Min Tao ,  Charles A. Gealer ,  Edward A. Zarbock

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L23/00 ,  G01P15/08 ,  B81C1/00 ,  H01L25/065 ,  H01L23/498 ,  H01L23/538

CPC分类号： B81C1/00301 ,  B81B7/007 ,  B81C1/00238 ,  B81C2203/0145 ,  G01P15/0802 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/5384 ,  H01L24/03 ,  H01L25/0652 ,  H01L2224/0401 ,  H01L2224/131 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2924/01327 ,  H01L2924/07811 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/00 ,  H01L2924/014

摘要： Integration of sensor chips with integrated circuit (IC) chips. At least a first sensor chip including a first sensor is affixed to a first side of an interposer to hermitically seal the first sensor within a first cavity. An IC chip is affixed to a second side of the interposer opposite the first sensor, the IC chip is electrically coupled to the first sensor by a through via in the interposer. In embodiments, the first sensor includes a MEMS device and the IC chip comprises a circuit to amplify a signal from the MEMS device. The interposer may be made of glass, with the first sensor chip and the IC chip flip-chip bonded to the interposer by compression or solder. Lateral interconnect traces provide I/O between the devices on the interposer and/or a PCB upon which the interpose is affixed.

摘要翻译： 传感器芯片与集成电路（IC）芯片的集成。 至少包括第一传感器的第一传感器芯片固定到插入件的第一侧，以将第一传感器密封在第一腔内。 IC芯片被固定到与第一传感器相对的插入件的第二侧，IC芯片通过插入器中的通孔电耦合到第一传感器。 在实施例中，第一传感器包括MEMS器件，并且IC芯片包括放大来自MEMS器件的信号的电路。 插入器可以由玻璃制成，其中第一传感器芯片和IC芯片倒装芯片通过压缩或焊接接合到插入器。 横向互连迹线在插入件上的器件和/或其上插入插入物的PCB之间提供I / O。

公开(公告)号：US20140003009A1

公开(公告)日：2014-01-02

申请号：US13993340

申请日：2012-03-07

申请人： Qing Ma ,  Johanna M. Swan

发明人： Qing Ma ,  Johanna M. Swan

IPC分类号： H05K1/03 ,  H05K3/40

CPC分类号： H01L23/49827 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/49894 ,  H01L24/16 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/16238 ,  H01L2224/81192 ,  H01L2924/00013 ,  H01L2924/12042 ,  H05K1/0306 ,  H05K1/181 ,  H05K3/40 ,  H05K2201/10378 ,  Y10T29/49147 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2224/05099 ,  H01L2224/05599 ,  H01L2924/014 ,  H01L2924/00

摘要： Embodiments of the present description relate to the field of fabricating microelectronic substrates. The microelectronic substrate may include a trace routing structure disposed between opposing glass layers. The trace routing structure may comprise one or more dielectric layers having conductive traces formed thereon and therethrough. Also disclosed are embodiments of a microelectronic package including a microelectronic device disposed proximate one glass layer of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects.

摘要翻译： 本说明书的实施例涉及制造微电子基板的领域。 微电子衬底可以包括布置在相对的玻璃层之间的迹线路由结构。 迹线布线结构可以包括一个或多个具有形成在其上并具有导电迹线的电介质层。 还公开了微电子封装的实施例，其包括微电子器件，微电子器件设置在微电子衬底的一个玻璃层附近，并通过多个互连与微电子衬底耦合。

公开(公告)号：US20160284637A1

公开(公告)日：2016-09-29

申请号：US15172029

申请日：2016-06-02

申请人： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

发明人： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

IPC分类号： H01L23/498 ,  H01L21/48 ,  H01L23/367 ,  H01L23/15

CPC分类号： H05K1/112 ,  H01L21/4803 ,  H01L21/486 ,  H01L23/15 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/10253 ,  H05K3/0014 ,  H05K3/4605 ,  H05K3/4644 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10287 ,  H05K2201/10371 ,  H05K2201/10674 ,  H05K2203/0108 ,  H05K2203/0228 ,  H05K2203/025 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/0401

摘要： Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.

摘要翻译： 公开了用于集成电路（IC）装置的玻璃芯基板的实施例。 玻璃芯基板包括在玻璃芯的相对侧上的玻璃芯和堆积结构。 导电端子可以形成在玻璃芯基板的两侧。 IC芯片可以与衬底的一侧上的端子耦合，而相对侧上的端子可以与诸如电路板的下一级组件耦合。 玻璃芯可以包括其中已经形成导体的单片玻璃，或者玻璃芯可以包括已经连接在一起的两个或更多个玻璃部分，每个部分具有导体。 导体延伸穿过玻璃芯，并且一个或多个导体可以与设置在玻璃芯上的积聚结构电耦合。 描述和要求保护其他实施例。

公开(公告)号：US09429427B2

公开(公告)日：2016-08-30

申请号：US13720876

申请日：2012-12-19

申请人： Qing Ma ,  Feras Eid ,  Kevin Lin ,  Johanna M. Swan ,  Weng Hong Teh ,  Valluri R. Rao

发明人： Qing Ma ,  Feras Eid ,  Kevin Lin ,  Johanna M. Swan ,  Weng Hong Teh ,  Valluri R. Rao

IPC分类号： G01C19/00 ,  G01C19/56 ,  G01C19/5776

CPC分类号： G01C19/56 ,  G01C19/5776

摘要： This invention relates to inductive inertial sensors employing a magnetic drive and/or sense architecture. In embodiments, translational gyroscopes utilize a conductive coil made to vibrate in a first dimension as a function of a time varying current driven through the coil in the presence of a magnetic field. Sense coils register an inductance that varies as a function of an angular velocity in a second dimension. In embodiments, the vibrating coil causes first and second mutual inductances in the sense coils to deviate from each other as a function of the angular velocity. In embodiments, self-inductances associated with a pair of meandering coils vary as a function of an angular velocity in a second dimension. In embodiments, package build-up layers are utilized to fabricate the inductive inertial sensors, enabling package-level integrated inertial sensing advantageous in small form factor computing platforms, such as mobile devices.

摘要翻译： 本发明涉及采用磁驱动和/或感测架构的感应惯性传感器。 在实施例中，平移陀螺仪利用在第一维度中制成的导电线圈作为在存在磁场的情况下驱动通过线圈的时变电流的函数。 感应线圈记录在第二维度上作为角速度的函数变化的电感。 在实施例中，振动线圈使得感测线圈中的第一和第二互感器作为角速度的函数彼此偏离。 在实施例中，与一对曲折线圈相关联的自感量作为第二维度中的角速度的函数而变化。 在实施例中，使用封装积层来制造感应惯性传感器，使得能够在诸如移动设备的小尺寸计算平台中有利的封装级集成惯性感测。

公开(公告)号：US20140085846A1

公开(公告)日：2014-03-27

申请号：US13625406

申请日：2012-09-24

申请人： Qing Ma ,  Johanna M. Swan ,  Robert Starkston ,  John S. Guzek ,  Robert L. Sankman ,  Aleksandar Aleksov

发明人： Qing Ma ,  Johanna M. Swan ,  Robert Starkston ,  John S. Guzek ,  Robert L. Sankman ,  Aleksandar Aleksov

IPC分类号： H05K1/18 ,  B32B38/04 ,  B32B38/10 ,  H05K1/00

CPC分类号： H01L23/5386 ,  B32B2457/08 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/56 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/15 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5389 ,  H01L24/09 ,  H01L24/13 ,  H01L24/17 ,  H01L24/19 ,  H01L24/24 ,  H01L24/81 ,  H01L24/82 ,  H01L25/0655 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/08238 ,  H01L2224/12105 ,  H01L2224/13025 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16235 ,  H01L2224/2402 ,  H01L2224/24137 ,  H01L2224/81192 ,  H01L2224/814 ,  H01L2224/81801 ,  H01L2224/8185 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2924/12042 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/15724 ,  H01L2924/15747 ,  H01L2924/18162 ,  H01L2924/2064 ,  H01L2924/20641 ,  H05K1/0298 ,  H05K1/0306 ,  H05K1/115 ,  H05K1/185 ,  H05K3/4688 ,  H05K2201/017 ,  H05K2203/1469 ,  Y10T156/1057 ,  H01L2924/014 ,  H01L2924/00

摘要： Embodiments of the present description relate to the field of fabricating microelectronic structures. The microelectronic structures may include a glass routing structure formed separately from a trace routing structure, wherein the glass routing structure is incorporated with the trace routing substrate, either in a laminated or embedded configuration. Also disclosed are embodiments of a microelectronic package including at least one microelectronic device disposed proximate to the glass routing structure of the microelectronic substrate and coupled with the microelectronic substrate by a plurality of interconnects. Further, disclosed are embodiments of a microelectronic structure including at least one microelectronic device embedded within a microelectronic encapsulant having a glass routing structure attached to the microelectronic encapsulant and a trace routing structure formed on the glass routing structure.

摘要翻译： 本说明书的实施例涉及制造微电子结构的领域。 微电子结构可以包括与轨迹路由结构分开形成的玻璃布线结构，其中玻璃布线结构以层叠或嵌入的形式结合到迹线布线基板中。 还公开了微电子封装的实施例，其包括设置在微电子衬底的玻璃布线结构附近并通过多个互连与微电子衬底耦合的至少一个微电子器件。 此外，公开了微电子结构的实施例，其包括嵌入微电子密封剂内的至少一个微电子器件，该微电子器件具有连接到微电子密封剂的玻璃布线结构和形成在玻璃布线结构上的迹线布线结构。

公开(公告)号：US10070524B2

公开(公告)日：2018-09-04

申请号：US13442092

申请日：2012-04-09

申请人： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

发明人： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

IPC分类号： H01R43/00 ,  H05K1/11 ,  H01L21/48 ,  H01L23/367 ,  H01L23/498 ,  H05K3/46 ,  H01L23/15 ,  H05K3/00

CPC分类号： H05K1/112 ,  H01L21/4803 ,  H01L21/486 ,  H01L23/15 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/10253 ,  H05K3/0014 ,  H05K3/4605 ,  H05K3/4644 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10287 ,  H05K2201/10371 ,  H05K2201/10674 ,  H05K2203/0108 ,  H05K2203/0228 ,  H05K2203/025 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/0401

摘要： A glass core substrate for an integrated circuit (IC) device may be formed to include a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.

公开(公告)号：US20120192413A1

公开(公告)日：2012-08-02

申请号：US13442092

申请日：2012-04-09

申请人： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

发明人： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

IPC分类号： H01R43/00

CPC分类号： H05K1/112 ,  H01L21/4803 ,  H01L21/486 ,  H01L23/15 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/10253 ,  H05K3/0014 ,  H05K3/4605 ,  H05K3/4644 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10287 ,  H05K2201/10371 ,  H05K2201/10674 ,  H05K2203/0108 ,  H05K2203/0228 ,  H05K2203/025 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/0401

摘要： Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.

摘要翻译： 公开了用于集成电路（IC）装置的玻璃芯基板的实施例。 玻璃芯基板包括在玻璃芯的相对侧上的玻璃芯和堆积结构。 导电端子可以形成在玻璃芯基板的两侧。 IC芯片可以与衬底的一侧上的端子耦合，而相对侧上的端子可以与诸如电路板的下一级组件耦合。 玻璃芯可以包括其中已经形成导体的单片玻璃，或者玻璃芯可以包括已经连接在一起的两个或更多个玻璃部分，每个部分具有导体。 导体延伸穿过玻璃芯，并且一个或多个导体可以与设置在玻璃芯上的积聚结构电耦合。 描述和要求保护其他实施例。

公开(公告)号：US20110147055A1

公开(公告)日：2011-06-23

申请号：US12653710

申请日：2009-12-17

申请人： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

发明人： Qing Ma ,  Quan A. Tran ,  Robert L. Sankman ,  Johanna M. Swan ,  Valluri R. Rao

IPC分类号： H05K1/03 ,  H05K3/10 ,  H05K3/36

CPC分类号： H05K1/112 ,  H01L21/4803 ,  H01L21/486 ,  H01L23/15 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/10253 ,  H05K3/0014 ,  H05K3/4605 ,  H05K3/4644 ,  H05K2201/096 ,  H05K2201/09827 ,  H05K2201/10287 ,  H05K2201/10371 ,  H05K2201/10674 ,  H05K2203/0108 ,  H05K2203/0228 ,  H05K2203/025 ,  Y10T29/49117 ,  Y10T29/49126 ,  Y10T29/49155 ,  H01L2924/00 ,  H01L2224/0401

摘要： Disclosed are embodiments of a glass core substrate for an integrated circuit (IC) device. The glass core substrate includes a glass core and build-up structures on opposing sides of the glass core. Electrically conductive terminals may be formed on both sides of the glass core substrate. An IC die may be coupled with the terminals on one side of the substrate, whereas the terminals on the opposing side may be coupled with a next-level component, such as a circuit board. The glass core may comprise a single piece of glass in which conductors have been formed, or the glass core may comprise two or more glass sections that have been joined together, each section having conductors. The conductors extend through the glass core, and one or more of the conductors may be electrically coupled with the build-up structures disposed over the glass core. Other embodiments are described and claimed.

摘要翻译： 公开了用于集成电路（IC）装置的玻璃芯基板的实施例。 玻璃芯基板包括在玻璃芯的相对侧上的玻璃芯和堆积结构。 导电端子可以形成在玻璃芯基板的两侧。 IC芯片可以与衬底的一侧上的端子耦合，而相对侧上的端子可以与诸如电路板的下一级组件耦合。 玻璃芯可以包括其中已经形成导体的单片玻璃，或者玻璃芯可以包括已经连接在一起的两个或更多个玻璃部分，每个部分具有导体。 导体延伸穿过玻璃芯，并且一个或多个导体可以与设置在玻璃芯上的积聚结构电耦合。 描述和要求保护其他实施例。