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    Semiconductor device
    4.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09324862B2

    公开(公告)日：2016-04-26

    申请号：US14638996

    申请日：2015-03-04

    Applicant: Renesas Electronics Corporation

    Inventor： Yoshinori Kaya ,  Yasushi Nakahara ,  Ryo Kanda ,  Tetsu Toda

    IPC: H01L29/66 ,  H01L29/78 ,  H01L29/40 ,  H01L29/06

    CPC classification number: H01L29/0619 ,  H01L27/0207 ,  H01L27/092 ,  H01L29/402 ,  H01L29/404 ,  H01L29/405 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/7835 ,  H03K19/017509

    Abstract: To prevent a current leak in an impurity region surrounding a transistor, in a region where a portion, of a second conductivity type region, extending from a first circuit region side toward a second circuit region side and an element separation film overlap each other in plan view, a field plate and conductive films are provided alternately from the first circuit region side toward the second circuit region side in plan view. Further, in this region, there is a decrease in the potential of the field plate and the potentials of the conductive films from the first circuit region toward the second circuit region. Further, at least one of the conductive films has a potential lower than the potential of the field plate adjacent to the conductive film on the second circuit region side in plan view. Further, this conductive film covers at least a part of the second conductivity type region without space in the extension direction of the second conductivity type region.

    Abstract translation: 为了防止在晶体管周围的杂质区域中的电流泄漏，在从第一电路区域侧朝向第二电路区域侧延伸的第二导电类型区域和元件分离膜的部分在计划中彼此重叠的区域中 在平面图中，从第一电路区域侧朝向第二电路区域侧交替地设置场板和导电膜。 此外，在该区域中，场板的电位和导电膜从第一电路区域朝向第二电路区域的电位降低。 此外，导电膜中的至少一个在平面图中具有低于第二电路区域侧上与导电膜相邻的场板的电位的电位。 此外，该导电膜覆盖第二导电类型区域的至少一部分，而在第二导电类型区域的延伸方向上没有空间。

    Semiconductor Device
    6.
    发明申请
    Semiconductor Device 有权
    半导体器件

    公开(公告)号：US20150270390A1

    公开(公告)日：2015-09-24

    申请号：US14638996

    申请日：2015-03-04

    Applicant: Renesas Electronics Corporation

    Inventor： Yoshinori Kaya ,  Yasushi Nakahara ,  Ryo Kanda ,  Tetsu Toda

    IPC: H01L29/78 ,  H01L29/06 ,  H01L29/40

    CPC classification number: H01L29/0619 ,  H01L27/0207 ,  H01L27/092 ,  H01L29/402 ,  H01L29/404 ,  H01L29/405 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/7835 ,  H03K19/017509

    Abstract: To prevent a current leak in an impurity region surrounding a transistor, in a region where a portion, of a second conductivity type region, extending from a first circuit region side toward a second circuit region side and an element separation film overlap each other in plan view, a field plate and conductive films are provided alternately from the first circuit region side toward the second circuit region side in plan view. Further, in this region, there is a decrease in the potential of the field plate and the potentials of the conductive films from the first circuit region toward the second circuit region. Further, at least one of the conductive films has a potential lower than the potential of the field plate adjacent to the conductive film on the second circuit region side in plan view. Further, this conductive film covers at least a part of the second conductivity type region without space in the extension direction of the second conductivity type region.

    Abstract translation: 为了防止在晶体管周围的杂质区域中的电流泄漏，在从第一电路区域侧朝向第二电路区域侧延伸的第二导电类型区域和元件分离膜的部分在计划中彼此重叠的区域中 在平面图中，从第一电路区域侧朝向第二电路区域侧交替地设置场板和导电膜。 此外，在该区域中，场板的电位和导电膜从第一电路区域朝向第二电路区域的电位降低。 此外，导电膜中的至少一个在平面图中具有低于第二电路区域侧上与导电膜相邻的场板的电位的电位。 此外，该导电膜覆盖第二导电类型区域的至少一部分，而在第二导电类型区域的延伸方向上没有空间。

    Semiconductor device
    7.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09048213B2

    公开(公告)日：2015-06-02

    申请号：US14325003

    申请日：2014-07-07

    Applicant: Renesas Electronics Corporation

    Inventor： Ryo Kanda ,  Tetsu Toda ,  Yasushi Nakahara ,  Yoshinori Kaya

    IPC: H01L29/78 ,  H01L29/40 ,  H01L29/10 ,  H01L29/06 ,  H01L27/02

    CPC classification number: H01L27/0207 ,  H01L21/761 ,  H01L29/0653 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/404 ,  H01L29/42368 ,  H01L29/7816 ,  H01L29/7835

    Abstract: A field plate electrode is repetitively disposed in a folded manner or a spiral shape in a direction along an edge of a first circuit region. A coupling transistor couples a first circuit to a second circuit lower in supply voltage than the first circuit. A second conductivity type region is disposed around the coupling transistor. A part of the field plate electrode partially overlaps with the second conductivity type region. The field plate electrode is electrically coupled to a drain electrode of the coupling transistor at a portion located on the first circuit region side from a center thereof in a width direction of the separation region. A ground potential or a power potential of the second circuit is applied to the field plate electrode at a portion located on the second conductivity type region side from the center.

    Abstract translation: 场板电极在沿着第一电路区域的边缘的方向上以折叠方式或螺旋形状重复地布置。 耦合晶体管将第一电路耦合到电源电压低于第一电路的第二电路。 第二导电类型区域设置在耦合晶体管周围。 场板电极的一部分与第二导电类型区域部分重叠。 场平板电极在分离区域的宽度方向上的位于第一电路区域侧的部分的电极上耦合到耦合晶体管的漏电极。 第二电路的接地电位或功率电位在距中心的第二导电类型区域侧的部分施加到场板电极。

    Semiconductor device and power control device
    8.
    发明授权
    Semiconductor device and power control device 有权

    公开(公告)号：US10396547B2

    公开(公告)日：2019-08-27

    申请号：US15702327

    申请日：2017-09-12

    Applicant: RENESAS ELECTRONICS CORPORATION

    Inventor： Ryo Kanda ,  Hiroshi Kuroiwa ,  Tetsu Toda ,  Yasushi Nakahara

    IPC: H02H7/08 ,  H02H1/04 ,  H01L29/40 ,  H01L29/78 ,  H01L29/861 ,  H03K17/0416 ,  H03K17/082

    Abstract: To realize a reduction in the number of parts in a system including a driver IC (semiconductor device). A high potential side power supply voltage is applied to a power supply application area. A high side area is formed with a circuit which includes a driver driving a high side transistor and is operated at a boot power supply voltage with a floating voltage as a reference. A low side area is formed with a circuit operated at a power supply voltage with a low potential side power supply voltage as a reference. A first termination area is disposed in a ring form so as to surround the power supply application area. A second termination area is disposed in a ring form so as to surround the high side area.

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